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I/O49

Catalog Datasheet MFG & Type PDF Document Tags

ULTRA37000

Abstract: I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 , CLK0 /I0 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 I/O48 CLK3 /I4 , I/O49 I/O48 CLK3/I4 GND NC VCCIO CLK2/I3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 I , I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 , blocks 64 I/O pins Five dedicated inputs including four clock pins In-System ReprogrammableTM (ISRTM
Cypress Semiconductor
Original

architecture of cypress FLASH370 cpld

Abstract: 84 PLCC pin configuration /O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I , /O47 F I/O17 CLK0 /I0 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 , 24 25 SDI VCCIO I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC , I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 , Description · · · · 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4
Cypress Semiconductor
Original

m4a-64/32

Abstract: MACH4A I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 I4/CLK3 GND GND VCC VCC I3/CLK2 I/O47 I/O46 I/O45 , 53 52 51 GND TDO TRST I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 I4/CLK3 GND , I/O43 I/O44 I/O45 I/O46 I/O47 I5 I6 I7 CLK1 GND VCC CLK2 I8 I9 I/O48 I/O49 I/O50 I , /O49 I/O50 I/O51 I/O52 I/O53 I/O54 I/O55 GND VCC I/O56 I/O57 I/O58 I/O59 I/O60 I/O61 I , N/C 1 GND I/O49 GND I/O52 I/O48 I/O53 TMS I/O50 I/O55 I/O51 I/O54 I/O56 GND
Vantis
Original
Abstract: 58 I/O 57 I/O 56 GND I/O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND , /O45 GND E I/O15 I/O14 I/O13 I/O49 I/O48 CLK3 /I4 D I/O12 I/O11 I , I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I4 GND NC VCCIO CLK2/I3 I/O47 I/O46 I/O45 I , I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 , · · · 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock Cypress Semiconductor
Original

84 PIN CERAMIC QUAD FLAT PACK

Abstract: CERAMIC leaded CHIP CARRIER CLCC 68 I/O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 , E I/O15 I/O14 I/O13 I/O49 I/O48 CLK3 /I4 D I/O12 I/O11 I/O51 I/O50 , /O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC VCCIO CLK2 /I3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 , VCCIO NC GND I/O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2 , Description · · · · 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4
Cypress Semiconductor
Original
Abstract: /O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I , I/O17 CLK0 /I0 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 I/O48 , 24 25 SDI VCCIO I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC , I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 , 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins Cypress Semiconductor
Original

CY7C374I-125JC

Abstract: /O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 I/O40 I/O34 I , GND I/O49 I/O48 CLK3 /I4 I/O50 I/O51 I/O54 SDI I/O59 I/O56 GND I/O52 I/O53 I/O60 8 I/O58 9 I/O57 10 I , /O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I4 GND NC VCCIO CLK2/I3 I/O47 I/O46 I/O45 I/O44 I , /O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I , logic blocks 64 I/O pins Five dedicated inputs including four clock pins In-System ReprogrammableTM
Cypress Semiconductor
Original

architecture of cypress FLASH370 cpld

Abstract: 100pinTQFP I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 , /O13 I/O49 I/O48 CLK3 /I4 D I/O12 I/O11 I/O51 I/O50 C I/O10 I/O8 SCLK , 57 56 55 54 53 52 51 SDI VCCIO I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 , I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 , Description · · · · 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4
Cypress Semiconductor
Original

CY7C373

Abstract: CY7C374 CLK0 VCC VCC I/O45 GND E I/O15 I/O13 I/O14 I/O49 I/O48 CLK3 /I4 I , 6 69 I/O51 I/O12 7 68 I/O50 I/O13 8 I/O14 9 67 I/O49 66 I , 64 29 I/O23 I/O37 I/O49 65 28 I/O21 I/O50 66 27 I/O22 I/O36 I , 128Macrocell Flash CPLD D D D 128 macrocells in eight logic blocks 64 I/O pins The 128 macrocells in , device. Like all members of the FLASH370 family, the CY7C374 is rich in I/O resources. Ev ery two
Cypress Semiconductor
Original
CY7C373 CY7C374-83GC 7C373 22V10 38-00214-D
Abstract: /O91 I/O90 I/O89 I/O88 GND I/O87 I/O86 I/O85 I/O84 I/O83 I/O82 I/O81 I/O80 GND GND I/O48 I/O49 I/O50 , I/O48 I/O49 GND I/O50 I/O51 I/O52 I/O53 I/O54 NC I/O55 I/O56 I/O57 I/O58 I/O59 VCC 1 2 3 4 5 6 7 , /O139 I/O140 I/O141 I/O142 M N I/O49 I/O50 I/O51 GND GND GND GND , /O144 I/O145 I/O146 I/O147 GND GND J GND GND I/O51 I/O50 I/O49 I/O48 , - 3.3V ISR - 5V tolerant · Up to 192 I/Os - Plus 5 dedicated inputs including 4 clock inputs · Cypress Semiconductor
Original
CY37256V 256-M 160-L 208-L 256-L CY37256

ULTRA37000

Abstract: I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 , /O17 CLK0 /I0 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 I/O48 , I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I4 GND NC VCCIO CLK2/I3 I/O47 I/O46 I , I/O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I , blocks 64 I/O pins Five dedicated inputs including four clock pins In-System ReprogrammableTM (ISRTM
Cypress Semiconductor
Original
ULTRA37000 ULTRA37000TM 128-M

CY7C374I-125JC

Abstract: /O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 I/O40 7C374i-2 I , /O45 GND I/O49 I/O48 CLK3 /I4 I/O50 I/O51 I/O54 SDI I/O59 I/O56 GND I/O52 I/O53 I/O60 8 I/O58 9 I/O57 , /O52 I/O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC VCCIO CLK2 /I3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 I , 7C374i-2 3 SDO 7C374i-4 GND I/O55 I/O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND , blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System ReprogrammableTM (ISRTM) Flash
Cypress Semiconductor
Original
CY7C374I-125JC 38-00496-F 100-P
Abstract: /O54 /SDI I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 , /O14 I/O13 I/O49 I/O48 CLK3 /I4 D I/O12 I/O11 I/O51 I/O50 C I/O10 , I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC VCC CLK2 /I3 I/O47 I/O46 I , Functional Description · · · · 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs , capabilities on all I/Os and dedicated inputs · No hidden delays · High speed - fMAX = 125 MHz - tPD = 10 Cypress Semiconductor
Original
38-00496-B

tea 1601 t

Abstract: tea 1601 or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General , 3.3 V Devices Feature Macrocells User I/O options M4A3-322 M4A3-642 M4A3-962 M4A3 , -962 M4A5-1282 M4A5-1921 M4A5-2562 Macrocells 32 64 96 128 192 256 User I/O , -5 M4A3-323 M4A5-323 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3
Lattice Semiconductor
Original
tea 1601 t tea 1601 O2-A2 160 e7 led matrix circuits ISPMACH 182MH M4A3-32/32 M4A3-64/32 M4A3-64/64 M4A3-96/48 M4A3-128/64
Abstract: or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General Publication# ISPM4A Amendment/0 Rev: I Issue Date: May 2001 Table 1. ispMACH 4A Device Features 3.3 , -384 M4A3-512 Macrocells 32 64 96 128 192 256 384 512 User I/O options 32 , User I/O options 32 32 48 64 96 128 tPD (ns) 5.0 5.5 5.5 5.5 6.0 -
Original
M4A3-192/96 M4A3-256/128 M4A3-256/160 M4A3-256/192 M4A3-384/160 M4A3-384/192

tea 1601 t

Abstract: Programmable pull-up or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - , on all major programmers including Data I/O, BP Microsystems, Advin, and System General , 3.3 V Devices Feature Macrocells User I/O options tPD (ns) fCNT (MHz) tCOS (ns) tSS (ns) Static Power (mA) JTAG Compliant PCI Compliant 5 V Devices Feature Macrocells User I/O options tPD (ns) fCNT (MHz , Commercial, C C C -5 C C C C C C C C -55 -6 -65 -7 C, I C, I C, I C, I C, I C, I C, I C C -10 C, I C, I C, I
Lattice Semiconductor
Original
M4A3-512/160 M4A3-512/192 M4A3-512/256 M4A5-32/32 M4A5-64/32 M4A5-96/48

O2-A2

Abstract: VCCIO11 or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , 32 64 96 128 192 256 384 512 User I/O options 32 32/64 48 64 , -128 M4A5-192 M4A5-256 Macrocells 32 64 96 128 192 256 User I/O options 32 , Speed Grade Device M4A3-32 M4A5-32 -5 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3-64/32 M4A5-64/32 C C, I C, I I M4A3-64/64 C C, I C, I I
Lattice Semiconductor
Original
VCCIO11 Lattice Mach OX2 ispMACH M4A3 M4A5-192 application note PAL 007 O64i M4A5-128/64 M4A5-192/96 M4A5-256/128 VNI48 M4A3-256/128-7YC-10YI

O158

Abstract: O2-A2 voltage system designs - Programmable pull-up or Bus-FriendlyTM inputs and I/Os - Hot-socketing - , 64 96 128 192 256 384 512 User I/O options 32 32/64 48 64 96 , -128 M4A5-192 M4A5-256 Macrocells 32 64 96 128 192 256 User I/O options 32 , Speed Grade Device -5 M4A3-32 M4A5-32 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3-64/32 M4A5-64/32 C C, I C, I I M4A3-64/64 C C, I C, I I
Lattice Semiconductor
Original
O158 1M4A3 12864a o248 512256 VNC48

Application Notes

Abstract: atmel 830 (A15) P.10 P.159 P.204 I/O, PGCK2 P.35 P.43 P.57 I/O49, GCK3 P.35 P , ) P.35 P.27 P.39 P.43 P.57 I/O49 GCK3 P.35 P.27 P.39 P.43 P.57 GCK3 , of the design will decrease in an Atmel part as we do not sacrifice lo gi c to i m pl eme nt th e , RAM Bits Register Typical RAM Bits I/O AT40K05 5K-10K 16 x 16 2,048 256 2 , XC4010 Typical RAM Bits I/O Equiv. Atmel Family Reg. RAM Bits 64 AT40K05 256
Atmel
Original
Application Notes atmel 830 atmel 432 atmel 936 XCS200 XCS200 FPGA AT40K XC4000 AT40K10 10K-20K AT40K20 20K-30K

CY7C373

Abstract: CY7C374 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 I/O48 CLK3 /I4 D I , 83 82 81 80 79 78 77 76 75 GND I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 , VCC I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3/I4 GND NC VCC CLK2/I3 I/O47 I , · · · Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays
Cypress Semiconductor
Original
CY7C374-66AI cypress flash 370

pasic 3

Abstract: QL3004-1PL68C /O52 I/O51 I/O50 I/O49 I/O48 CLK3/I 4 GND VCCIO CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I , /O47 F I/O17 CLK0 /I0 VCC VCC I/O45 GND E I/O15 I/O14 I/O13 I/O49 , 24 25 SDI VCCIO I/O55 I/O54 I/O53 I/O52 I/O51 I/O50 I/O49 I/O48 CLK3 /I4 GND NC , I/O50 I/O49 I/O48 CLK3/I 4 GND VCC CLK2/I 3 I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41
QuickLogic
Original
pasic 3 QL3004-1PL68C QL3004 QL3012-1PF144C QL3004E Military Plastic pASIC 3 Family
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