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I/O161

Catalog Datasheet MFG & Type PDF Document Tags

U208

Abstract: /O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E F I , I/O106 I/O 121 I/O 124 I/O127 I/O99 6 TMS 7 I/O133 I/O136 I/O139 I/O142 I/O157 I/O159 I/O161 I , I/O125 GND GND I/O143 VCC I/O161 I/O146 I/O148 I/O149 NC GND GND 6 , standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 264 I/Os - Plus 5 dedicated inputs including 4 , I/Os Low-power option on individual logic block basis User-Programmable Bus Hold capabilities on all
Cypress Semiconductor
Original
U208 CY37512V 512-M 208-L 256-L 352-L 400-L
Abstract: D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E F I/O30 , /O183 I/O179 I/O174 I/O169 I/O160 I/O161 I/O162 E I/O35 I/O34 I/O33 I , - 3.3V ISR - 5V tolerant · Up to 192 I/Os - Plus 5 dedicated inputs including 4 clock inputs · , Product-term clocking IEEE 1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low power option on individual logic block basis User-Programmable Bus-Hold capabilities on all I/Os Simple Cypress Semiconductor
Original
CY37256V 256-M 160-L CY37256 CY37128/37128V CY37192/37192V

CY37512

Abstract: CY37512V TDI I/O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E , I/O133 I/O136 I/O139 I/O142 I/O157 I/O159 I/O161 I/O163 I/O166 I/O146 I/O180 I/O181 I/O154 AD , changes · IEEE standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 264 I/Os - plus 5 , rate control on individual I/Os Low power option on individual logic block basis User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant[1] Available in 208-pin PQFP
Cypress Semiconductor
Original
CY37512 CY37256/37256V CY37384/37384V CA95134 I/O0-I/O11 I/O12-I/O23

208-Lead

Abstract: CY37512 TDI I/O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E , I/O133 I/O136 I/O139 I/O142 I/O157 I/O159 I/O161 I/O163 I/O166 I/O146 I/O180 I/O181 I/O154 AD , changes · IEEE standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 264 I/Os - plus 5 , rate control on individual I/Os Low power option on individual logic block basis User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant[1] Available in 208-pin PQFP
Cypress Semiconductor
Original
208-Lead ultraISR CABLE CY37512VP208-66NI I/O24-I/O35 I/O36-I/O47 I/O48-I 2VP208-66NI 208-P CY37512VP256-66BGI

k 1821

Abstract: a30c5 /O? 1= 26 WE C 26 Ne a 30 C5, d 32 c&c NC CZ 34 36 GND ZZ 38 i/o161= 40 i/o17 c 42 1/018CZ 44 , accomplished when the appropriate_chip selects (C§n) an,i write enable (WE) inputs are both LOW. Data on the input/output pins (I/Ox) 's written into the memory location specified on the address pins (Ao through , will appear on the data input/output pins (I/Ox). The data input/output pins stay in the , standard modules can be interchanged. Pin Configuration ZIP Top View PDq - GND PDq C 2 I/OoC 4 I/O
-
OCR Scan
CYM1821 k 1821 a30c5 CYM1821PZ-15C jedec 64-pin simm A10C 512-K CYM1821PM CYM1821PZ 38-M-00015-E 001S0M7

a30c5

Abstract: I8101 Ne a 30 C5, d 32 C&C NC CZ 34 36 GND ZZ 38 i/o161= 40 i/o17 c 42 1/018CZ 44 i/o19 cz 46 A10C 4B An 1 , accomplished when the appropriate_chip selects (C§n) an,i write enable (WE) inputs are both LOW. Data on the input/output pins (I/Ox) 's written into the memory location specified on the address pins (Ao through , will appear on the data input/output pins (I/Ox). The data input/output pins stay in the high-impedance , standard modules can be interchanged. Pin Configuration ZIP Top View PDq - GND PDQ C 2 I/OOC 4 I/O, cz 6 l
-
OCR Scan
I8101 l891 0G15D4

CY37512P208-100UMB

Abstract: CY37512 GND I/O164 TDI I/O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I , /O136 I/O139 I/O142 I/O157 I/O159 I/O161 I/O163 I/O166 I/O146 I/O180 I/O181 I/O154 I/O130 I/O134 I/O137 , changes don't cause pinout changes - Design changes don't cause timing changes · Up to 264 I/Os - Plus 5 , rate control on individual I/Os Low-power option on individual logic block basis 5V and 3.3V I/O capability User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant Available in
Cypress Semiconductor
Original
CY37512P208-100UMB CY37512P208-83UMB CY37512-125 37512p208 NT208 CY37512P208-100UM 37256/37256V BG256 BG352 51-85069-B

CY37512

Abstract: CY37512V /O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E F I/O30 TCK I/O28 VCCO , /O139 I/O142 I/O157 I/O159 I/O161 I/O163 I/O166 I/O146 I/O180 I/O181 I/O154 AD I/O130 I/O134 I , Design changes don't cause pinout changes - Design changes don't cause timing changes · Up to 264 I/Os , Programmable slew rate control on individual I/Os Low power option on individual logic block basis 5V and 3.3V I/O capability User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI
Cypress Semiconductor
Original
AE O47 I/O48-I/O59 I/O60-I/O71 FLASH370

CY37512P256-125BGI

Abstract: O249 /O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E F I/O30 TCK I/O28 VCCO , /O139 I/O142 I/O157 I/O159 I/O161 I/O163 I/O166 I/O146 I/O180 I/O181 I/O154 AD I/O130 I/O134 I , changes don't cause pinout changes - Design changes don't cause timing changes · Up to 264 I/Os - , Programmable slew rate control on individual I/Os Low power option on individual logic block basis 5V and 3.3V I/O capability User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI
Cypress Semiconductor
Original
CY37512P256-125BGI O249 O-220 CY37512P208-125NI io1B

57B8

Abstract: xc4000 pin Independent of Logic Cells 84 - 384 PCI Compliant I/Os ­ 3V/5V Capability ­ Programmable Output Drive ­ , 576 1,024 2,304 RAM Bits 2,048 4,608 8,192 18,432 I/O (max) 128 192 , data), automatic component generators, and range in size from 5,000 to 50,000 usable gates. I/O counts , programmable I/O. Devices range in size from 5,000 to 50,000 usable gates in the initial family, and 256 to 2 , Array Surrounded by I/O (AT40K20) = I/O Pad = AT40K Cell = Repeater Row = Repeater Column 3
Atmel
Original
57B8 xc4000 pin o4413 dsp o212 PQ304 atmel 144 XC4000 XC5200 0896B

MQFPF256

Abstract: O349 /O161 153 I/O15 I/O158 154 I/O6, A19 (Address) I/O157 155 I/O5, A18 (Address , 1 1.9 PIN ASSIGNMENT Function Pin MQFP-F160 MQFP-F256 1 VDD I/O384, GCLK8 (Global Clock), A15 (Address) 2 I/O384, GCLK8 (Global Clock), A15 (Address) I/O383, A14 (Address) 3 I/O383, A14 (Address) I/O382 4 I/O382 I/O381 5 I/O381 I/O378 6 I/O372, A13 (Address) I/O377 7 I/O371, A12 (Address) VSS 8 I/O370 VDD 9 I
European SPace COmponents Coordination
Original
MQFPF256 O349 AT40KEL040

cpld internal

Abstract: CY37384 /O164 TDI I/O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I , - 5V tolerant · Up to 192 I/Os - plus 5 dedicated inputs including 4 clock inputs · High speed , Programmable slew rate control on individual I/Os Low power option on individual logic block basis User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant[1] Available in 208 , Note: 1. Due to the 5V tolerant nature of the I/Os, the I/Os are not clamped to VCC. Clock/ Input
Cypress Semiconductor
Original
CY37384V CY37384 cpld internal 384-M CY37512/37512V I/O72-I/O83 I/O84-I/O95

CY37384

Abstract: CY37384V /O164 TDI I/O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I , tolerant · Up to 192 I/Os - plus 5 dedicated inputs including 4 clock inputs · High speed - fMAX = 83 , control on individual I/Os Low power option on individual logic block basis User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant[1] Available in 208-pin PQFP and 256-lead BGA , tolerant nature of the I/Os, the I/Os are not clamped to VCC. Clock/ Input Input Logic Block Diagram
Cypress Semiconductor
Original
256-P

ultraISR CABLE

Abstract: /O25 NC I/O163 I/O161 I/O159 I/O156 E F I/O30 TCK I/O28 VCCO VCCO , standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 192 I/Os - Plus 5 dedicated inputs including 4 , individual I/Os Low-power option on individual logic block basis User-Programmable Bus Hold capabilities on all I/Os Simple Timing Model PCI compliant[1] Available in 208-Lead PQFP and 256-Lead BGA packages , edge rate mode, outputs switch at 1V/ns max. There is a nominal delay for I/Os using the slow edge rate
Cypress Semiconductor
Original
37384VP256-83BGC CY37384VP208-66NC CY37384VP256-66BGC CY37384VP208-66NI CY37384VP256-66BGI

5962-9951902QYA

Abstract: CY37128P100-125AXC to 512 macrocells - 32 to 264 I/O pins - Five dedicated inputs including four clock pins · Simple timing model - No fanout delays - No expander delays - No dedicated vs. I/O pin delays - , capabilities on all I/Os · Intelligent product term allocator provides: - 0 to 16 product terms to any , user programmable bus-hold capabilities on all I/Os. Ultra37000 5.0V Devices The Ultra37000 devices operate with a 5V supply and can support 5V or 3.3V I/O levels. VCCO connections provide the capability
Cypress Semiconductor
Original
CY37032P44-125JXC CY37128P100-125AXC 5962-9951902QYA CY37032V CY37064 CY37064V CY37128 37000TM 22V10 CY37032P44-200AXC CY37032P44-200JXC CY37032P44-154AXI CY37032P44-154JXI

CY37064P44-154YMB

Abstract: CY37512P208-100UMB High density - 32 to 512 macrocells - 32 to 264 I/O pins - 5 dedicated inputs including 4 clock pins · Simple timing model - No fanout delays - No expander delays - No dedicated vs. I/O pin , ] Programmable Bus-Hold capabilities on all I/Os Intelligent product term allocator provides: - 0 to 16 , user programmable bus-hold capabilities on all I/Os. Ultra37000 5.0V Devices The Ultra37000 devices operate with a 5V supply and can support 5V or 3.3V I/O levels. V CCO connections provide the capability
Cypress Semiconductor
Original
CY37064P44-154YMB CY37256P160-125UMB CY37032VP44-100AI CY37032 CY37128V CY37192 N208/NT208

CY37032VP44-100AI

Abstract: CY37032 512 macrocells - 32 to 264 I/O pins - 5 dedicated inputs including 4 clock pins · Simple timing model - No fanout delays - No expander delays - No dedicated vs. I/O pin delays - No additional , on all I/Os Intelligent product term allocator provides: - 0 to 16 product terms to any macrocell , timing requirements. The Ultra37000 family features user programmable bus-hold capabilities on all I/Os. Ultra37000 5.0V Devices The Ultra37000 devices operate with a 5V supply and can support 5V or 3.3V I/O
Cypress Semiconductor
Original
100-P 51-85048-B 100-B BB100 160-P

CY37128P100-125AXC

Abstract: CY37032VP44-100AI I/O pins - Five dedicated inputs including four clock pins · Simple timing model - No fanout delays - No expander delays - No dedicated vs. I/O pin delays - No additional delay through PIM - No , versions · PCI-compatible[1] · Programmable bus-hold capabilities on all I/Os · Intelligent product term , )-free packages available Note: 1. Due to the 5V-tolerant nature of 3.3V device I/Os, the I/Os are not , requirements. The Ultra37000 family features user programmable bus-hold capabilities on all I/Os. Ultra37000
Cypress Semiconductor
Original
CY37032P44-125AXC CY37064P44-200AXC CY37064P44-200JXC CY37064P100-200AXC CY37064P44-154AXI CY37064P44-154JXI

CY37512P208-100UMB

Abstract: CY37512P208-100UM 512 macrocells - 32 to 264 I/O pins - 5 Dedicated Inputs including 4 clock pins · High speed - 222 , expander delays - No dedicated vs. I/O pin delays - No additional delay through PIM - No penalty for , versions PCI Compatible[1] Programmable Bus-Hold capabilities on all I/Os Intelligent product term , features user programmable bus-hold capabilities on all I/Os. Ultra37000 5.0V Devices The Ultra37000 devices operate with a 5V supply, can support 5V or 3.3V I/O levels. VCCO connections provide the
Cypress Semiconductor
Original
CERAMIC leaded CHIP CARRIER CLCC 68 CY37256P160-83UM 222-MH
Abstract: "¢ DATASHEET Features  Ultra High Performance Ì̶ System Speeds to 100MHz Array Multipliers > 50MHz 10ns Flexible SRAM Internal Tri-state Capability in Each Cell ÌÌ FreeRAMâ"¢ Ì , Independent of Logic Cells Ì 128 â'" 384 PCI Compliant I/Os Ì̶ Programmable Output Drive Fast, Flexible Array Access Facilitates Pin Locking Pin-compatible with XC4000 and XC5200 FPGAs Ì Eight Global Clocks ̶ Fast, Low Skew Clock Distribution Programmable Rising/Falling Atmel
Original
AT40K05AL AT40K10AL AT40K20AL AT40K40AL 100MH

B272

Abstract: /O160 D E I/O27 I/O26 I/O25 NC I/O163 I/O161 I/O159 I/O156 E F I , I/O106 I/O 121 I/O 124 I/O127 I/O99 6 TMS 7 I/O133 I/O136 I/O139 I/O142 I/O157 I/O159 I/O161 I , I/O125 GND GND I/O143 VCC I/O161 I/O146 I/O148 I/O149 NC GND GND 6
Lattice Semiconductor
Original
B272 3192-100LM 240-P 3192-100LB272 272-B 3192-70LM 3192-70LB272
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