HV227/HV228 HV227 HV228 HV22716X HV22716P HV22716PJ HV22716WG HV22816X HV22816P - Datasheet Archive

 

HV227 HV228 Low Charge Injection 8-Channel High Voltage Analog Switch Ordering Information Package Options Operating VPP VPP

 

HV227/HV228 HV227/HV228 HV227 HV227 HV228 HV228 Low Charge Injection 8-Channel High Voltage Analog Switch Ordering Information Package Options Operating VPP VPP ­ VNN Die in waffle pack 28-pin plastic DIP 28-lead plastic chip carrier 28-lead SOW 40V to 80V 160V HV22716X HV22716X HV22716P HV22716P HV22716PJ HV22716PJ HV22716WG HV22716WG 80V to 150V 160V HV22816X HV22816X HV22816P HV22816P HV22816PJ HV22816PJ HV22816WG HV22816WG Features General Description s HVCMOS® technology for high performance Not recommended for new designs. Please use HV202/203 HV202/203 or HV204/205/206 HV204/205/206. s Low charge injection This device is a low charge injection 8-channel high-voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feedthrough noise, Latch Enable Bar (LE) should be left high until all bits are clocked in. Using HVCMOS technology, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. s Very low quiescent power dissipation ­ 10µA s Output On-resistance typically 22 ohms s Low parasitic capacitances s DC to 10MHz analog signal frequency s 50dB typical output off isolation at 5 MHz s CMOS logic circuitry for low power s Excellent noise immunity s On-chip shift register, latch and clear logic circuitry s Flexible high voltage supplies s Surface mount package available Absolute Maximum Ratings* VDDlogic power supply voltage VPP - VNN supply voltage -0.5V to +18V 174V VPP positive high voltage supply -0.5V to +160V VNN Negative high voltage supply +0.5V to -160V -160V Logic input voltages -0.5V to VDD +0.3V Analog signal range VNN to VPP Peak analog signal current/channel Storage temperature Power dissipation 3.0A -65°C to +150°C Plastic Package 0.8W Ceramic Package 2.0W * Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. 13-76 HV227/HV228 HV227/HV228 Electrical Characteristics (over operating conditions, VPP = +80V, VNN = -80V, and VDD = 15V unless otherwise noted) DC Characteristics Characteristics Sym 0°C min max min +25°C typ max +70°C min max Units Test Conditions Small Signal Switch (ON) RONS 24 22 25 28 ohms ISIG = 5mA Resistance RONS 18 18 20 23 ohms ISIG = 200mA Small Signal Switch (ON) Resistance Matching RONS 20 5.0 20 20 % Large Signal Switch (ON) Resistance RONL 13 22 Switch Off Leakage Per Switch ISOL 5.0 1.0 10 DC Offset Switch Off 300 100 DC Offset Switch On 500 100 ISW = 5mA ohms VSIG = VPP -10V, ISIG = 1.0A 15 µA VSIG = VPP -10V and VNN +10V 300 300 mV RL = 100K 500 500 mV RL = 100K Pos. HV Supply Current IPPQ 10 50 µA Neg. HV Supply Current INNQ -10 -50 µA ALL SWS OFF Pos. HV Supply Current IPPQ 10 50 µA Neg. HV Supply Current INNQ -10 -50 µA ALL SWS ON ISW = 5mA 3.0 3.0 2.0 A VSIG 0.1% Duty Cycle Switch Output Peak Current 2.0 Output Switch Frequency fSW KHz Duty Cycle = 50% IPP Supply Current IPP 4.0 3.5 5.0 50 5.5 mA INN Supply Current INN 4.0 3.5 5.0 5.5 mA HV output switching frequency = 50KHz Logic Supply Average Current IDD 6.0 4.0 6.0 6.0 mA fCLK = 3MHz Logic Supply Quiescent Current IDDQ 10 10 10 µA Data Out Source Current ISOR 0.45 0.45 0.70 0.40 mA VOUT = VDD - 0.7V Data Out Sink Current ISINK 0.45 0.45 0.70 0.40 mA VOUT = 0.7V 13 13-77 HV227/HV228 HV227/HV228 AC Characteristics Characteristics 0°C Sym min Time to Turn Off VSIG* +25°C max tSIG (OFF) min typ +70°C max min Units Test Conditions max 0 ns Set Up Time Before LE Rises tSD 150 150 150 ns Time Width of LE tWLE 150 150 150 ns Clock Delay Time to Data Out tDO 175 175 190 ns Turn On Time tON 3.0 3.0 3.0 µs RL = 10K Turn Off Time tOFF 5.0 5.0 5.0 µs RL = 10K Time Width of CL tWCL 150 150 Off Isolation KO -30 -30 -45 -45 150 ns -33 -30 dB f = 5MHz, 1K// 15pF load -50 -45 dB f = 5MHz, 50 load 5.0 5.0 5.0 Clock Freq fCLK Set Up Time Data to Clock tSU 15 15 Hold Time Data from Clock tH 35 35 KCR -60 -60 -70 Off Capacitance SW to GND CSG(OFF) 5.0 17 5.0 12 17 5.0 On Capacitance SW to GND CSG(ON) 25 50 25 38 50 25 Output Voltage Spike +VSPK 150 ­VSPK 150 MHz Switch Crosstalk 8.0 50% duty cycle fDATA = fCLK/2 20 ns 35 ns -60 dB f = 5MHz, 50 load 17 pF 0V, 1MHz 50 pF 0V, 1MHz VPP = +80V, mV VNN = -80V, RL = 50 * Time required for analog signal to turn off before output switch turns off (critical timing). Operating Conditions* Device Symbol HV22716 HV22716 VPP HV22816 HV22816 X Value 40V to 80V X 80V to 150V VNN X X -10V to VPP -160V -160V VDD X X 10V to 15.5V VIH X X VDD -2.0V to VDD VIL X X 0V to 2.0V VSIG X X VNN +10V to VPP -10 TA X X 0°C to 70°C Note: Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. * VSIG must be VNN VSIG V PP or floating during power up/down transistion. Rise and fall times of power supplies, VDD, V PP, and VNN should not be less than 1.0msec. 13-78 HV227/HV228 HV227/HV228 Test Circuits VPP ­10 VPP ­10V VIN = 10 VP­P @5MHz ISOL RL 10K VOUT 50 NC 50 VNN +10 +80V VPP ­80V VNN +80V GND VPP VDD ­80V 15V VDD VNN GND KCR = 20Log Switch OFF Leakage +80V VPP VDD ­80V 15V VNN GND 15V VOUT VIN TON /TOFF Crosstalk +VSPK VIN = 10 VP­P @5MHz VOUT VOUT ­VSPK 50 VOUT RL 100K RL 1K +80V VPP ­80V VNN 15V VDD GND KO = 20Log +80V VPP VDD ­80V VNN 15V GND RL +80V VPP VDD -80V VNN 15V GND VOUT VIN OFF Isolation DC Offset ON/OFF Output Voltage Spike Logic Timing Waveforms DN DN­1 DATA IN 50% LE 50% DN+1 50% 13 50% t WLE t SD 50% CLOCK t SU 50% th t DO DATA OUT 50% t OFF OFF V OUT (TYP) ON CLR t ON 90% 10% 50% 50% t WCL 13-79 HV227/HV228 HV227/HV228 Logic Diagram LEVEL SHIFTERS LATCHES OUTPUT SWITCHES DIN D LE CL SW0 CLK D LE CL SW1 D LE CL SW2 D LE CL SW3 D LE CL SW4 D LE CL SW5 D LE CL SW6 D LE CL SW7 8 BIT SHIFT REGISTER DOUT VNN V PP CL VDD LE Truth Table D0 D1 D2 D3 D4 D5 D6 D7 LE CL SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 L L L L L L L L L L L L L L L L L H OFF ON L H X X L L L L L L L L L L L L L L L L H X L H L H L H L H L H L H L H X X X X X X X X X X X X X X Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L H transition CLK. OFF ON 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. OFF ON OFF ON 4. DOUT is high when switch 7 is on. OFF ON 5. Shift register clocking has no effect on the switch states if LE is H. OFF ON OFF ON OFF ON HOLD PREVIOUS STATE OFF OFF OFF OFF OFF OFF OFF OFF 13-80 HV227/HV228 HV227/HV228 Typical Performance Curves RON vs. Ambient Temp TA VDD = 15V & VPP/VNN = ±80V 40 RON vs. VPP/VNN VDD = 15V 50 35 RON (ohms) @ 5mA RON (ohms) 30 25 ISW = 5mA 20 15 10 40 30 TA = 125°C TA = 85°C 20 TA = 25°C TA = 0°C TA = -45°C 5 0 -55 -25 10 0 20 40 60 80 100 120 140 160 VPP VNN -160 -140 -120 -100 -80 -60 -40 -20 0 0 25 50 75 100 125 150 Ambient Temp TA (°C) Switch Current vs Switch Voltage Drop I PP /I NN vs Output Switching Frequency VDD = 15V & VPP/VNN = ±80V VDD = 15V & VPP/VNN = ±80V 400 40 I PP /I NN Average Current (mA) T A = 0 °C 300 TA = 25 °C I SWITCH (mA) 200 100 TA = 70 °C 0 -100 -200 T A = 125 ° C 30 TA = 70 °C 20 TA = 25 °C 10 T A = -55° C -300 -400 0 0 -4 -3 -2 -1 0 1 2 3 0 4 V SWITCH (volts) Junction Temp T j vs Switch Peak Current VSIG Freq = 10KHz & Duty Cycle = 0.1% VDD = 15V & VPP/VNN = ±80V 275 200 300 400 TDO vs. Ambient Temp TA VPP/VNN = ±80V 250 175 T A = 75 ° C 150 225 VDD = 10V 200 125 TDO (ns) Junction Temp T j (°C) 200 100 HV Output Switching Freq (KHz) 100 T A = 25 ° C 75 175 150 50 125 25 VDD = 15V 100 75 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -50 -25 0 25 50 75 Ambient Temp TA (°C) 4.0 Switch Peak Current (A) 13-81 100 125 13 HV227/HV228 HV227/HV228 Typical Performance Curves 40 TWLE vs. Ambient Temp VPP/VNN = ±80V 110 36 100 32 90 28 TSD (ns) TWLE (ns) VDD = 10V 24 20 16 80 VDD = 15V 70 50 40 8 VDD = 15V 30 -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) TH vs. Ambient Temp VPP/VNN = ±80V 16 17 12 TSU vs. Ambient Temp VPP/VNN = ±80V 14 16 VDD = 10V TSU (ns) 15 TH (ns) VDD = 10V 60 12 18 TSD vs. Ambient Temp VPP/VNN = ±80V 14 13 12 10 8 VDD = 15V 6 VDD = 15V 4 11 2 10 0 -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) 800 VDD = 10V -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) TON vs. Ambient Temp VPP/VNN = ±80V 2.5 TOFF vs. Ambient Temp VPP/VNN = ±80V 700 VDD = 10V 2.0 500 400 TOFF (ns) TON (ns) 600 VDD = 15V 300 200 VDD = 10V VDD = 15V 1.5 1 100 0 0 -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) -50 -25 0 25 50 75 100 125 Ambient Temp TA (°C) 13-82 HV227/HV228 HV227/HV228 Typical Performance Curves I DD vs CLK Frequency VDD = 15V, VPP/VNN = ±80V, TA = 0°C to 70°C Off Isolation vs Signal Voltage Frequency VDD = 15V, VPP/VNN = ±80V 5 -100 Off Isolation (db) -120 4 3 -80 -60 2 -40 1 -20 10K 100K 1M 10K 10M 100K 1M 10M Signal Voltage Frequency (Hz) CLK Frequency (Hz) Crosstalk vs Analog Signal Frequency VDD = 15V, VPP/VNN = ±80V -100 -90 Crosstalk (db) I DD Current (mA) 6 -80 70 ° C -70 0° C -60 -50 100K 1M 10M 100M Analog Signal Frequency (Hz) 13 13-83 HV227/HV228 HV227/HV228 Pin Configurations Package Outlines 28-Pin DIP Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Function SW3 SW3 SW2 SW2 SW1 SW1 SW0 SW0 VPP VNN N/C GND VDD N/C Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 28 2 27 3 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 top view 28-pin DIP 28-Pin J-Lead Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Function SW3 SW3 SW2 SW2 SW1 SW1 SW0 SW0 VPP VNN N/C GND VDD N/C Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 25 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4 24 23 22 21 20 19 26 18 27 17 28 16 1 15 2 14 3 13 4 12 5 6 7 8 9 10 11 top view 28-pin J-Lead Package 28-Lead SOW Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Function N/C SW6 SW6 SW5 SW5 SW4 SW4 SW3 SW3 SW2 SW2 SW1 SW1 N/C Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 Function SW0 SW0 N/C VPP VNN GND VDD DIN CLK LE CL DOUT SW7 SW7 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 top view 28-pin SOW 13-84