HUFA76443P3 HUFA76443S3S 76443P 76443S HUFA76443S3ST TB334 ISO9000 QS9000 - Datasheet Archive

 

Data Sheet November 2000 File Number 4986 75A, 60V, 0.0095 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging JEDEC

 

HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Data Sheet November 2000 File Number 4986 75A, 60V, 0.0095 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB SOURCE DRAIN GATE DRAIN (FLANGE) GATE SOURCE DRAIN (FLANGE) HUFA76443P3 HUFA76443P3 HUFA76443S3S HUFA76443S3S Features · Ultra Low On-Resistance - rDS(ON) = 0.008, VGS = 10V - rDS(ON) = 0.0095, VGS = 5V · Simulation Models - Temperature Compensated PSPICE® and SABERTM Electrical Models - Spice and SABER Thermal Impedance Models - www.Intersil.com · Peak Current vs Pulse Width Curve · UIS Rating Curve Symbol · Switching Time vs RGS Curves D Ordering Information PART NUMBER G PACKAGE BRAND HUFA76443P3 HUFA76443P3 S TO-220AB 76443P 76443P HUFA76443S3S HUFA76443S3S TO-263AB 76443S 76443S NOTE: When ordering, use the entire part number. Add the suffix T to obtain the variant in tape and reel, e.g., HUFA76443S3ST HUFA76443S3ST. Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 60 V V Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Drain Current Continuous (TC = 25oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM ±16 V 75 75 75 75 Figure 4 A A A A Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief TB334 TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg NOTES: Figures 6, 17, 18 260 1.75 -55 to 175 W W/oC oC 300 260 oC oC 1. TJ = 25oC to 150oC. CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/ Reliability data can be found at: http://www.mtp.intersil.com/automotive.html. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 ISO9000 and QS9000 QS9000 quality systems certification. ©2001 Fairchild Semiconductor Corporation HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS ID = 250µA, VGS = 0V (Figure 12) 60 - - V ID = 250µA, VGS = 0V , TC = -40oC (Figure 12) 55 - - V OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage BVDSS Gate to Source Leakage Current IDSS IGSS VDS = 55V, VGS = 0V - - 1 µA VDS = 50V, VGS = 0V, TC = 150oC Zero Gate Voltage Drain Current - - 250 µA VGS = ±16V - - ±100 nA ON STATE SPECIFICATIONS Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 11) 1 - 3 V Drain to Source On Resistance rDS(ON) ID = 75A, VGS = 10V (Figures 9, 10) - 0.0067 0.008 ID = 75A, VGS = 5V (Figure 9) - 0.0079 0.0095 ID = 75A, VGS = 4.5V (Figure 9) - 0.0083 0.010 TO-220 and TO-263 - - 0.57 oC/W - - 62 oC/W THERMAL SPECIFICATIONS Thermal Resistance Junction to Case RJC Thermal Resistance Junction to Ambient RJA SWITCHING SPECIFICATIONS (VGS = 4.5V) Turn-On Time Turn-On Delay Time tON td(ON) Rise Time VDD = 30V, ID = 75A VGS = 4.5V, RGS = 2.7 (Figures 15, 21, 22) - - 380 ns - 18 - ns ns tr - 235 - td(OFF) - 47 - ns tf Turn-Off Delay Time - 116 - ns tOFF - - 245 ns - - 90 ns - 12 - ns Fall Time Turn-Off Time SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time tON td(ON) VDD = 30V, ID = 75A VGS = 10V, RGS = 2.7 (Figures 16, 21, 22) - 48 - ns td(OFF) - 65 - ns tf Rise Time - 117 - ns tOFF - - 275 ns - 107 129 nC tr Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 5V Threshold Gate Charge Qg(TOT) VGS = 0V to 10V Qg(5) VGS = 0V to 5V Qg(TH) VGS = 0V to 1V VDD = 30V, ID = 75A, Ig(REF) = 1.0mA (Figures 14, 19, 20) - 59 71 nC - 4.1 4.9 nC Gate to Source Gate Charge Qgs - 12 - nC Gate to Drain "Miller" Charge Qgd - 27 - nC CAPACITANCE SPECIFICATIONS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 13) - 4115 - pF - 1185 - pF - 215 - pF UNITS Source to Drain Diode Specifications PARAMETER Reverse Recovery Time Reverse Recovered Charge ©2001 Fairchild Semiconductor Corporation MIN TYP MAX ISD = 75A - - 1.25 V ISD = 37.5A Source to Drain Diode Voltage SYMBOL - - 1.0 V trr ISD = 75A, dISD/dt = 100A/µs - - 107 ns QRR ISD = 75A, dISD/dt = 100A/µs - - 275 nC VSD TEST CONDITIONS HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Typical Performance Curves 80 VGS = 10V 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 60 VGS = 4.5V 40 20 0.2 0 0 0 25 50 75 100 125 150 175 25 50 TC , CASE TEMPERATURE (oC) 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 ZJC, NORMALIZED THERMAL IMPEDANCE 1 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 2000 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: IDM, PEAK CURRENT (A) 1000 I = I25 175 - TC 150 VGS = 10V VGS = 5V 100 50 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-5 10-4 10-3 10-2 t, PULSE WIDTH (s) 10-1 100 101 FIGURE 4. PEAK CURRENT CAPABILITY ©2001 Fairchild Semiconductor Corporation HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Typical Performance Curves (Continued) 1000 100µs 100 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 10 1ms 10ms SINGLE PULSE TJ = MAX RATED TC = 25oC 1 1 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 1000 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] STARTING TJ = 25oC 100 STARTING TJ = 150oC 10 10 0.01 100 0.1 1 10 tAV, TIME IN AVALANCHE (ms) VDS, DRAIN TO SOURCE VOLTAGE (V) NOTE: Refer to Intersil Application Notes AN9321 AN9321 and AN9322 AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY FIGURE 5. FORWARD BIAS SAFE OPERATING AREA 150 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 15V 120 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 150 90 60 TJ = 175oC 30 TJ = 25oC VGS = 10V VGS = 5V 120 VGS = 4V 60 VGS = 3V 30 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC TJ = -55oC 0 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 1 VGS, GATE TO SOURCE VOLTAGE (V) 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS FIGURE 8. SATURATION CHARACTERISTICS 25 2.5 20 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC NORMALIZED DRAIN TO SOURCE ON RESISTANCE ID = 75A rDS(ON), DRAIN TO SOURCE ON RESISTANCE (m) VGS = 3.5V 90 ID = 40A 15 10 ID = 20A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 75A 2.0 1.5 1.0 0.5 5 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT ©2001 Fairchild Semiconductor Corporation -80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Typical Performance Curves (Continued) 1.2 1.2 ID = 250µA NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS, ID = 250µA 1.0 0.8 0.6 1.1 1.0 0.9 0.4 -80 -40 0 40 80 120 160 -80 200 -40 TJ, JUNCTION TEMPERATURE (oC) FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 40 80 120 160 200 FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 10 10000 1000 VGS , GATE TO SOURCE VOLTAGE (V) CISS = CGS + CGD C, CAPACITANCE (pF) 0 TJ , JUNCTION TEMPERATURE (oC) COSS CDS + CGD CRSS = CGD VGS = 0V, f = 1MHz 100 0.1 1 8 6 4 WAVEFORMS IN DESCENDING ORDER: ID = 75A ID = 40A ID = 20A 2 0 25 0 60 10 VDD = 30V 50 75 100 125 Qg, GATE CHARGE (nC) VDS , DRAIN TO SOURCE VOLTAGE (V) NOTE: Refer to Intersil Application Notes AN7254 AN7254 and AN7260 AN7260. FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT 700 1000 VGS = 10V, VDD = 30V, ID = 75A VGS = 4.5V, VDD = 30V, ID = 75A tr SWITCHING TIME (ns) SWITCHING TIME (ns) 600 500 td(OFF) 400 300 tf 200 800 td(OFF) 600 400 tf 200 100 tr td(ON) td(ON) 0 0 0 10 20 30 40 RGS, GATE TO SOURCE RESISTANCE () FIGURE 15. SWITCHING TIME vs GATE RESISTANCE ©2001 Fairchild Semiconductor Corporation 50 0 10 20 30 40 50 RGS, GATE TO SOURCE RESISTANCE () FIGURE 16. SWITCHING TIME vs GATE RESISTANCE HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN REQUIRED PEAK IAS + RG VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01 tAV FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS VDS VDD RL Qg(TOT) VDS VGS = 10V VGS Qg(5) + VDD VGS = 5V VGS DUT VGS = 1V Ig(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS VDS tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + VGS VDD - 10% 0 10% DUT 90% RGS VGS VGS 0 FIGURE 21. SWITCHING TIME TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation 10% 50% 50% PULSE WIDTH FIGURE 22. SWITCHING TIME WAVEFORM HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S PSPICE Electrical Model .SUBCKT HUFA76443 HUFA76443 2 1 3 ; rev 26 August 1999 CA 12 8 5.50e-9 CB 15 14 5.50e-9 CIN 6 8 3.90e-9 LDRAIN DPLCAP DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD 10 DBREAK + RSLC2 5 51 ESLC 11 - RDRAIN 6 8 ESG EVTHRES + 19 8 + LGATE GATE 1 + 17 EBREAK 18 50 - IT 8 17 1 EVTEMP RGATE + 18 22 9 20 21 DBODY - 16 MWEAK 6 MMED MSTRO RLGATE LSOURCE CIN MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD 8 SOURCE 3 7 RSOURCE RLSOURCE S1A RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 2.80e-3 RGATE 9 20 0.84 RLDRAIN 2 5 10 RLGATE 1 9 49.2 RLSOURCE 3 7 23.9 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 3.20e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B RLDRAIN RSLC1 51 EBREAK 11 7 17 18 66.05 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 LDRAIN 2 5 1.00e-9 LGATE 1 9 5 4.92e-9 LSOURCE 3 7 2.39e-9 DRAIN 2 5 12 S2A 14 13 13 8 S1B 17 18 RVTEMP S2B 13 CA RBREAK 15 CB 6 8 EGS 19 - - IT 14 + + VBAT 5 8 EDS - + 8 22 RVTHRES 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 )} .MODEL DBODYMOD D (IS = 3.16e-12 RS = 2.54e-3 TRS1 = 2.21e-3 TRS2 = 0 CJO = 4.95e-9 TT = 6.81e-8 M = 0.50) .MODEL DBREAKMOD D (RS = 1.41e-1 TRS1 = 1.09e-4 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 3.47e-9 IS = 1e-30 M = 0.85) .MODEL MMEDMOD NMOS (VTO = 1.90 KP = 5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.84) .MODEL MSTROMOD NMOS (VTO = 2.31 KP = 195 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.68 KP = 0.12 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 8.4 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1.14e-3 TC2 = 0) .MODEL RDRAINMOD RES (TC1 = 9.91e-3 TC2 = 2.75e-5) .MODEL RSLCMOD RES (TC1 = 1.01e-3 TC2 = 3.23e-5) .MODEL RSOURCEMOD RES (TC1 = 1.00e-3 TC2 =0) .MODEL RVTHRESMOD RES (TC1 = -2.59e-3 TC2 = -8.95e-6) .MODEL RVTEMPMOD RES (TC1 = -1.56e-3 TC2 = 0) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -5.00 VOFF= -3.00) VON = -3.00 VOFF= -5.00) VON = -0.50 VOFF= 0.0) VON = 0.0 VOFF= -0.50) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. ©2001 Fairchild Semiconductor Corporation HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S SABER Electrical Model REV 26 August 1999 template hufa76443 n2,n1,n3 electrical n2,n1,n3 { var i iscl d.model dbodymod = (is = 3.16e-12, cjo = 4.95e-9, tt = 6.81e-8, m = 0.50) d.model dbreakmod = () d.model dplcapmod = (cjo = 3.47e-9, is = 1e-30, m = 0.85 ) m.model mmedmod = (type=_n, vto = 1.90, kp = 5, is = 1e-30, tox = 1) m.model mstrongmod = (type=_n, vto = 2.31, kp = 195, is = 1e-30, tox = 1) m.model mweakmod = (type=_n, vto = 1.68, kp = 0.12, is = 1e-30, tox = 1) sw_vcsp.model s1amod = (ron = 1e-5, roff = 0.1, von = -5.0, voff = -3.0) sw_vcsp.model s1bmod = (ron =1e-5, roff = 0.1, von = -3.0, voff = -5.0) sw_vcsp.model s2amod = (ron = 1e-5, roff = 0.1, von = -0.50, voff = 0.0) sw_vcsp.model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.0, voff = -0.50) LDRAIN DPLCAP 10 RSLC1 51 c.ca n12 n8 = 5.50e-9 c.cb n15 n14 = 5.50e-9 c.cin n6 n8 = 3.90e-9 RLDRAIN RDBREAK RSLC2 72 ISCL RDRAIN 6 8 ESG EVTHRES + 19 8 + i.it n8 n17 = 1 LGATE GATE 1 EVTEMP RGATE + 18 22 9 20 MWEAK MSTRO CIN DBODY EBREAK + 17 18 MMED m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u 71 11 16 6 RLGATE res.rbreak n17 n18 = 1, tc1 = 1.14e-3, tc2 = 0 res.rdbody n71 n5 = 2.54e-3, tc1 = 2.21e-3, tc2 = 0 res.rdbreak n72 n5 = 1.41e-1, tc1 = 1.09e-4, tc2 = 0 res.rdrain n50 n16 = 2.8e-3, tc1 = 9.91e-3, tc2 = 2.75e-5 res.rgate n9 n20 = 0.84 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 49.2 res.rlsource n3 n7 = 23.9 res.rslc1 n5 n51 = 1.0e-6, tc1 = 1.01e-3, tc2 = 3.23e-5 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 3.2e-3, tc1 = 1.0e-3, tc2 = 0 res.rvtemp n18 n19 = 1, tc1 = -1.56e-3, tc2 = 0 res.rvthres n22 n8 = 1, tc1 = -2.59e-3, tc2 = -8.95e-6 21 RDBODY DBREAK 50 - d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod l.ldrain n2 n5 = 1.00e-9 l.lgate n1 n9 = 4.92e-9 l.lsource n3 n7 = 2.39e-9 DRAIN 2 5 - 8 LSOURCE 7 SOURCE 3 RSOURCE RLSOURCE S1A 12 S2A 13 8 14 13 S1B CA RBREAK 15 17 18 RVTEMP S2B 13 CB 6 8 EGS 19 - - IT 14 + + VBAT 5 8 EDS - + 8 22 RVTHRES spe.ebreak n11 n7 n17 n18 = 66.05 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ( )* 3) } } ©2001 Fairchild Semiconductor Corporation HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. A HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S SPICE Thermal Model th JUNCTION REV 25 August 1999 HUFA76443T HUFA76443T CTHERM1 th 6 5.50e-3 CTHERM2 6 5 2.50e-2 CTHERM3 5 4 1.75e-2 CTHERM4 4 3 1.00e-2 CTHERM5 3 2 4.85e-2 CTHERM6 2 tl 12.55 RTHERM1 th 6 3.89e-3 RTHERM2 6 5 9.69e-3 RTHERM3 5 4 2.73e-2 RTHERM4 4 3 1.53e-1 RTHERM5 3 2 2.31e-1 RTHERM6 2 tl 3.07e-2 RTHERM1 CTHERM1 6 RTHERM2 CTHERM2 5 RTHERM3 CTHERM3 SABER Thermal Model SABER thermal model HUFA76443T HUFA76443T template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 = 5.50e-3 ctherm.ctherm2 6 5 = 2.50e-2 ctherm.ctherm3 5 4 = 1.75e-2 ctherm.ctherm4 4 3 = 1.00e-2 ctherm.ctherm5 3 2 = 4.85e-2 ctherm.ctherm6 2 tl = 12.55 4 RTHERM4 CTHERM4 3 RTHERM5 rtherm.rtherm1 th 6 = 3.89e-3 rtherm.rtherm2 6 5 = 9.69e-3 rtherm.rtherm3 5 4 = 2.73e-2 rtherm.rtherm4 4 3 = 1.53e-1 rtherm.rtherm5 3 2 = 2.31e-1 rtherm.rtherm6 2 tl = 3.07e-2 } CTHERM5 2 RTHERM6 CTHERM6 tl ©2001 Fairchild Semiconductor Corporation CASE HUFA76443P3 HUFA76443P3, HUFA76443S3S HUFA76443S3S Rev. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H