HFA1103 CA5260 74HC4053 AN9514 1-888-INTERSIL ISO9000

Restore (HFA1103) Application Note June 1995 Introduction Because the HFA1103 contains no active pull-down, output linearity

Video Amplifier with Sync Stripper and DC Restore (HFA1103 HFA1103) Application Note June 1995 Introduction Because the HFA1103 HFA1103 contains no active pull-down, output linearity degrades as the signal approaches ground. To deal with this a 6.8k pull-up resistor (R8) and a 75 pull down resistor (R10) on the output ensure a fixed positive voltage offset, in this case +50mV. This offset was arbitrarily chosen as a good compromise between linearity near the DC level and minimum residual sync. Increasing R8 decreases residual sync, at the expense of linearity. Conversely, decreasing R8 decreases linearity error, but increases residual sync.Other applications benefitting from sync removal are HDTV systems and video digitizing circuits. Consider a typical 1VP-P RGB video signal with a -300mV sync pulse and +700mV video data. By stripping off the unwanted sync pulse and digitizing only the active video, designers can use the full dynamic range of the A/D converter for the +700mV video data. This results in a 30% increase in resolution using the same A/D converter. The circuit in Figure 1 transmits 200MHz (-3dB bandwidth) video signals while stripping off the sync pulse and performing DC restoration. It is configured for a typical video cable driver application driving a double-terminated 75 load, where the HFA1103 HFA1103 (IC3) is configured for a gain of +2 to ensure unity gain throughout. Sync Stripping In component video systems it is frequently necessary to remove the sync pulse from an RGB signal. Sync is often combined with one or more of the red, green, and blue video signals in video distribution amplifiers, routers and switchers to decrease the number of input and output channels required in a switching network. In many applications, however, as the video signals exit the switching network the sync pulse must be removed. DC Restore The HFA1103 HFA1103 video op amp is specially designed to perform sync stripping. Its open emitter NPN output forms an emitterfollower with the load resistor, and passes the active video signal while virtually eliminating the negative sync pulse (see Figure 2). Residual sync of the HFA1103 HFA1103, defined as the remainder of the original -300mV sync pulse, referenced to ground, is only 8mV at the cable output. A particular advantage of sync stripping with the HFA1103 HFA1103 is the resultant larger (by 0.7V) output voltage swing, compared to simply using a wideband video op amp with an external emitter-follower. TO SYNC SEPARATOR + - C1 0.1µF OPT. IC1a + IC1b = CA5260 CA5260 DUAL AMP IC2 = 74HC4053 74HC4053 SWITCH IC3 = HFA1103 HFA1103 VIDEO OP AMP IC1b R6 750 R5 1K 750 - - R4 1K R8 6.8K R7 +5VDC -5V + IC2 VIN This circuit accomplishes DC restoration using a CA5260 CA5260 dual op amp (IC1a, IC1b) coupled with a sample-and-hold circuit based on the 74HC4053 74HC4053 switch (IC2). VIN, consisting of the input video signal and a DC offset (VDC), is routed to the non-inverting input of the HFA1103 HFA1103 (IC3). The HFA1103 HFA1103 is configured in a gain of +2 (to compensate for the attenuation resulting from double terminating the cable), which would result in an output of 2 x VIN = (2 x Video + 2 x VDC), if not for the DC restore circuit. R3 10K R2 10K IC1a R1 1K Another common video function is DC restoration, used when AC coupled signals have lost their DC reference and must have it periodically reset in order to retain brightness information. +5V S/H CONTROL AN9514 AN9514 IC3 R11 75 VOUT + C2 47µF R10 75 R9 10K R12 75 FIGURE 1. HFA1103 HFA1103 BASED VIDEO AMPLIFIER WITH SYNC STRIPPING AND DC RESTORE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Application Note 9514 VIN also travels through half of the dual CA5260 CA5260 amplifier to the sample-and-hold circuit, where the 0.1µF capacitor (C1) is the hold capacitor. The sample-and-hold control is triggered by a back-porch pulse from a sync separator or by a horizontal video blanking signal. The DC output signal (VDC) from the sample-and-hold circuit is then amplified at a gain of +2 by the second op amp (IC1b); the gain is required because VDC is input to the HFA1103s inverting input which provides only a gain of -1, but as discussed earlier, the output contains a term of 2 x VDC. Thus 2 x VDC is summed into the HFA1103 HFA1103 inverting input, is subtracted from the output signal, and yields a DC restored video signal. Because the output impedance of IC1b is high, and would affect the gain at the non-inverting input of the HFA1103 HFA1103, a 47µF capacitor (C2) is used to provide an AC ground and to maintain good high-frequency gain accuracy. A potentiometer (R3) is used prior to IC1b to null out any offset voltage contributed by the DC restore circuitry. Conclusion The circuit's resultant output is a 200MHz, DC restored video signal in which the sync pulse has been stripped to a residual level of no more than 8mV. IRE:FLT 100.0 IRE:FLT 100.0 0.6 0.4 50.0 VOLTS VOLTS 0.4 0.6 0.2 0.0 0.0 0.2 0.0 -0.2 0.0 -0.2 -50.0 -40.0 50.0 -50.0 -30.0 -20.0 -10.0 µS 0.0 10.0 FIGURE 2A. VIDEO AND SYNC GO IN -40.0 -30.0 -20.0 µS -10.0 0.0 10.0 FIGURE 2B. ONLY VIDEO COMES OUT FIGURE 2. SIGNALS AT HFA1103 HFA1103 INPUT AND CABLE OUTPUT All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 2 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029