HEF4069UB HEF4069UBP DIP14 HEF4069UBT HEF4069UBTT TSSOP14 BAW62 050G04 MO-001 - Datasheet Archive

 

Hex inverter Rev. 05 - 23 July 2009 Product data sheet 1. General description The HEF4069UB is a general purpose hex inverter.

 

HEF4069UB HEF4069UB Hex inverter Rev. 05 - 23 July 2009 Product data sheet 1. General description The HEF4069UB HEF4069UB is a general purpose hex inverter. Each inverter has a single stage. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is suitable for use over both the industrial (-40 °C to +85 °C) and automotive (-40 °C to +125 °C) temperature ranges. 2. Features I I I I I Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Operates across the automotive temperature range from -40 °C to +125 °C Complies with JEDEC standard JESD 13-B 3. Applications I Oscillator I Automotive and industrial 4. Ordering information Table 1. Ordering information All types operate from -40 °C to +125 °C. Type number Package Name Description Version HEF4069UBP HEF4069UBP DIP14 DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 HEF4069UBT HEF4069UBT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 HEF4069UBTT HEF4069UBTT TSSOP14 TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 5. Functional diagram 1A 2A 3A 4A 5A 6A 1 2 3 4 5 6 9 8 11 10 13 12 1Y 2Y 3Y 4Y VDD 5Y A 6Y VSS 001aag154 001aag152 Fig 1. Y Functional diagram Fig 2. Schematic diagram (one inverter) 6. Pinning information 6.1 Pinning 1A 1 14 VDD 1Y 2 13 6A 2A 3 12 6Y 2Y 4 HEF4069UB HEF4069UB 11 5A 3A 5 10 5Y 3Y 6 9 4A VSS 7 8 4Y 001aag153 Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 6A 1, 3, 5, 9, 11, 13 input 1Y to 6Y 2, 4, 6, 8, 10, 12 output VSS 7 ground (0 V) VDD 14 supply voltage HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 2 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 7. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O input/output current IDD supply current - Tstg storage temperature -65 +150 °C Tamb ambient temperature -40 +125 °C Ptot total power dissipation -0.5 VI < -0.5 V or VI > VDD + 0.5 V +18 V ±10 -0.5 VO < -0.5 V or VO > VDD + 0.5 V Unit mA VDD + 0.5 V - ±10 mA - ±10 mA 50 mA Tamb = -40 °C to +125 °C DIP14 DIP14 750 mW [2] - 500 mW TSSOP14 TSSOP14 power dissipation - SO14 P [1] [3] - 500 mW - 100 mW per output [1] For DIP14 DIP14 packages: above Tamb = 70 °C, Ptot derates linearly with 12 mW/K. [2] For SO14 packages: above Tamb = 70 °C, Ptot derates linearly with 8 mW/K. [3] For TSSOP14 TSSOP14 packages: above Tamb = 60 °C, Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 4. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VDD supply voltage 3 - 15 V VI input voltage 0 - VDD V Tamb ambient temperature in free air -40 - +125 °C t/V input transition rise and fall rate VDD = 5 V - - 3.75 ns/V VDD = 10 V - - 0.5 ns/V VDD = 15 V - - 0.08 ns/V HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 3 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 9. Static characteristics Table 5. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter Conditions VDD Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °C Unit Min Max Min Max 5V 4 - 4 - 4 - 4 - V 8 - 8 - 8 - 8 - V 12.5 - 12.5 - 12.5 - 12.5 - V 5V - 1 - 1 - 1 - 1 V - 2 - 2 - 2 - 2 V 15 V LOW-level input voltage Min 10 V VIL Max 15 V HIGH-level input voltage Min 10 V VIH Max - 2.5 - 2.5 - 2.5 - 2.5 V |IO| < 1 µA |IO| < 1 µA HIGH-level |IO| < 1 µA output voltage 4.95 - 4.95 - 4.95 - V - 9.95 - 9.95 - 9.95 - V 14.95 - 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 - 0.05 V - 0.05 - 0.05 - 0.05 - 0.05 V HIGH-level VO = 2.5 V output current V = 4.6 V O 5V -1.7 - -1.4 - -1.1 - -1.1 - mA 5V -0.64 - -0.5 - -0.36 - -0.36 - mA VO = 9.5 V IOL - 9.95 10 V -1.6 - -1.3 - -0.9 - -0.9 - mA VO = 13.5 V IOH 4.95 15 V VOL 5V 10 V 15 V VOH 15 V -4.2 - -3.4 - -2.4 - -2.4 - mA 5V 0.64 - 0.5 - 0.36 - 0.36 - mA 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA LOW-level |IO| < 1 µA output voltage LOW-level VO = 0.4 V output current V = 0.5 V O 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA II input leakage current VO = 1.5 V 15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 µA IDD supply current all valid input 5V combinations; 10 V IO = 0 A 15 V - 0.25 - 0.25 - 7.5 - 7.5 µA - 0.5 - 0.5 - 15.0 - 15.0 µA - 1.0 - 1.0 - 30.0 - 30.0 µA input capacitance - - - 7.5 - - - - pF CI digital inputs HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 4 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 10. Dynamic characteristics Table 6. Dynamic characteristics Tamb = 25 °C; CL = 50 pF; tr = tf 20 ns; for test circuit see Figure 5. LOW to HIGH propagation delay tTHL nA to nY; see Figure 4 HIGH to LOW output transition time tPLH output nY; see Figure 4 Typ 5V 18 + 0.55 × CL - 45 90 ns 10 V 9 + 0.23 × CL - 20 40 ns 7 + 0.16 × CL - 15 25 ns 5V 13 + 0.55 × CL - 40 80 ns 10 V 9 + 0.23 × CL - 20 40 ns 7 + 0.16 × CL - 15 30 ns 5V 10 + 1.0 0× CL - 60 120 ns 10 V 9 + 0.42 × CL - 30 60 ns 15 V nA to nY; see Figure 4 Min 15 V HIGH to LOW propagation delay tPHL Conditions Extrapolation formula[1] 15 V Symbol Parameter 6 + 0.28 × CL - 20 40 ns VDD Max Unit [1] output nY; see Figure 4 5V 10 + 1.00 × CL - 60 120 ns 10 V 9 + 0.42 × CL - 30 60 ns 15 V LOW to HIGH output transition time tTLH 6 + 0.28 × CL - 20 40 ns The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF). Table 7. Dynamic power dissipation VSS = 0 V; tr = tf 20 ns; Tamb = 25 °C. Symbol Parameter PD dynamic power dissipation VDD Typical formula 5 V PD = 600 × fi + (fo × CL) × where VDD2 (µW) 10 V PD = 4000 × fi + (fo × CL) × VDD2 (µW) 15 V PD = 22000 × fi + (fo × CL) × VDD2 fi = input frequency in MHz; fo = output frequency in MHz; (µW) CL = output load capacitance in pF; (fo × CL) = sum of the outputs; VDD = supply voltage in V. HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 5 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 11. Waveforms tr VI 90 % VM input 0V tf 10 % tPHL VOH tPLH 90 % VM output 10 % VOL tTHL tTLH 001aag185 Measurement points: VM = 0.5VDD. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Propagation delay and transition times VDD VI VO G DUT RT CL 001aag182 Definitions for test circuit: VDD = 5 V to 15 V; VI = VSS or VDD; CL = load capacitance including jig and probe capacitance = 50 pF; RT = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 5. Test circuit for measuring switching times HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 6 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 11.1 Transfer characteristics 001aag159 5.0 VO (V) (1) 5 (2) (2) 0 0 ID (mA) 5 250 (2) (1) (2) 0 0 5.0 2.5 10 VO (V) ID (µA) 2.5 001aag160 10 500 0 0 5 VI (V) 10 VI (V) a. VDD = 5 V; IO = 0 A b. VDD = 10 V; IO = 0 A 001aag161 20 20 VO (V) ID (mA) 10 10 (2) (1) (2) 0 0 0 10 20 VI (V) c. VDD = 15 V; IO = 0 A (1) VO = output voltage. (2) ID = drain current. Fig 6. Typical transfer characteristics HEF4069UB HEF4069UB_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 - 23 July 2009 7 of 16 HEF4069UB HEF4069UB NXP Semiconductors Hex inverter 12. Application information Some examples of applications for the HEF4069UB HEF4069UB. Figure 7 shows an astable relaxation oscillator using two HEF4069UB HEF4069UB inverters and 2 BAW62 BAW62 diodes. The oscillation frequency is mainly determined by R1 × C1, provided R1