1000BASE-T HBCU-5710R 1000BASE-X HCBU-5710R 8B/10B RJ-45 GMII/1000BASE-X - Datasheet Archive

 

HBCU-5710R Gigabit Ethernet Small Form Pluggable Electrical Transceivers over Category 5 Unshielded Twisted Pair Cable

 

1000BASE-T 1000BASE-T Interface and other functionality of HBCU-5710R HBCU-5710R Gigabit Ethernet Small Form Pluggable Electrical Transceivers over Category 5 Unshielded Twisted Pair Cable Application Note 5030 Contents II. Functional Description I. Introduction 1 II. Functional Description 1 III. 1000BASE-T 1000BASE-T electrical test parameters 4 IV. Cable Types 6 V. Autonegotiation 7 VI. SGMII 9 VII. Programmable Features VIII. SFP MSA Status and Control signal I/O functionality IX. X. 11 The HBCU-5710R HBCU-5710R is a 1000BASE-X 1000BASE-X 1.25 Gigabit Ethernet small form hot pluggable low voltage (3.3 V) electrical transceiver on the host interface. It performs the translation to a 1000BASE-T 1000BASE-T interface for Category 5 unshielded twisted pair cable. It also contains a two-wire serial interface, for access to serial ID EEPROM contents and transceiver link status and control registers. 15 Figure 1 illustrates how the HBCU-5710R HBCU-5710R SFP functionally fits into a typical application. Avago Technologies copper SFP evaluation tool 15 References 16 I. Introduction The present document outlines the functionality and electrical characteristics of Avago Technologies' HBCU-5710R HBCU-5710R Gigabit Ethernet Small Form Factor Pluggable copper transceivers. The electrical requirements for 1000BASE-T 1000BASE-T interface are defined in IEEE 802.3 standard document. In addition, the HBCU-5710R HBCU-5710R autonegotiation process is described, and applicable types and examples of auto-negotiation are listed. Finally, the present document outlines some special test modes and features specific to HBCU-5710R HBCU-5710R transceivers that can be enabled by implementing the transceiver's internal ASIC registers. The HCBU-5710R HCBU-5710R module in its default mode establishes a Gigabit Ethernet link by handling the auto-negotiations at both ends of the link and necessary data conversions. The transceiver operates up to 100 meters with Category 5 unshielded twisted pair cable. The HBCU-5710R HBCU-5710R consists of an ASIC, an EEPROM, a slow start circuit, and RJ45 connector with integrated magnetics. The ASIC handles the translation of MAC side 1.25 GBd Ethernet 8B/10B 8B/10B encoded data and translates it to four parallel channels of five level Pulse Amplitude Modulation (PAM-5) on signals on the cable side. The ASIC contains an 8B/10B 8B/10B SerDes and a DSP (Digital Signal Processor). The DSP decodes the 8B/10B 8B/10B data to 8 bits and then encodes that to the PAM-5 protocol. The electrical interface from the host to the HCBU-5710R HCBU-5710R is the same 1000BASE-X 1000BASE-X fiber interface used on optical SFP transceivers for Gigabit Ethernet applications. As far as MAC/host is concerned, it is driving a fiber transceiver. Switch HBCU-5710R HBCU-5710R Remote Partner MAC SFP 1000BASE-X 1000BASE-X Connector SGMII Interface SerDes / SGMII Interface RJ45 Connector CAT 5 Cable 10/100/1000 Mbps RJ45 Connector Figure 1: Simplified HBCU-5710R HBCU-5710R SFP transceiver application diagram On the transmit path, the ASIC removes the 8B/10B 8B/10B encoding, and then separates the serial data into four PAM-5 encoded transceiver channels of 250 Mb/s, 2 bits per symbol with a symbol rate of 125 MBd. These four channels go through to the magnetics and are then sent down the four wire pairs of the Category 5 cable. On the receive path, the aggregate 1000 Mb/s data from the four BASE-T channels is converted back to serial 1.25 Gb Ethernet 8B/ 10B coding by the HBCU-5710R HBCU-5710R. The slow start circuit makes the module hotpluggable and able to satisfy the current inrush specification and guarantees reliable module start-up. The RJ45 connector with integrated magnetics is the MDI interface of the module, to the Category 5 cable. The magnetics in the copper SFP are needed for the following: - To provide DC voltage isolation - To reduce common mode noise and improve EMI The EEPROM contains the SFP MSA compliant Serial ID memory that describes the module. - To filter out noise from remote end Figure 2 shows a simplified block diagram of the HCBU-5710R HCBU-5710R. TX_DATA RX_DATA A TX_DISABLE B TX_FAULT RX_LOS RATE_SELECT SerDes/ DSP NC RJ45 Adapter Magnetics C MOD_DEF2 D MOD_DEF1 MOD_DEF0 EEPROM Figure 2. Simplified block diagram of HBCU-5710R HBCU-5710R transceiver. 1 2 1000Base-X RD+/RD- Gigabit MAC/Serdes TD+/TD- MOD_DEF pins (two-wire interface) and other SFP I/O 8 7 6 3 Cat 5 | RJ-45 RJ-45 10/100/1000Mbps 4 5 1000Base-X RD+/RD- Gigabit MAC/Serdes TD+/TD- MOD_DEF pins (two-wire interface) and other SFP I/O 9 Figure 3. Block diagram illustrating typical system implementation of Avago Technologies HBCU-5710R HBCU-5710R SFP transceiver 2 Table 1. Avago Technologies Gigabit copper SFP transceiver system interoperability MAC/SerDes Interface (1,2) GMII/1000BASE-X GMII/1000BASE-X SFP (3) HBCU-5710R HBCU-5710R Cable Type (4) Cat 5or 5e Link Partner (5) 10BASE-T 10BASE-T Remote MAC/SerDes (6, 7) MII/10BASE-T MII/10BASE-T Link up? No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R Cat 5 or 5e 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R Cat 5 or 5e 1000BASE-T 1000BASE-T Yes SGMII HBCU-5710R HBCU-5710R Cat 5or 5e 10BASE-T 10BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII MII/10BASE-T MII/10BASE-T SGMII HBCU-5710R HBCU-5710R Cat 5 or 5e 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T Yes SGMII HBCU-5710R HBCU-5710R Cat 5 or 5e 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII Yes GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 10BASE-T 10BASE-T MII/10BASE-T MII/10BASE-T No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII Yes SGMII HBCU-5710R HBCU-5710R 10BASE-T 10BASE-T MII/10BASE-T MII/10BASE-T Yes SGMII HBCU-5710R HBCU-5710R 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T Yes SGMII HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII Yes GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 10BASE-T 10BASE-T MII/10BASE-T MII/10BASE-T No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T No GMII/1000BASE-X GMII/1000BASE-X HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII No SGMII HBCU-5710R HBCU-5710R 10BASE-T 10BASE-T MII/10BASE-T MII/10BASE-T No SGMII HBCU-5710R HBCU-5710R 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T No SGMII HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII No MII/100BASE-X MII/100BASE-X HBCU-5710R HBCU-5710R Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 or 5e - 1000BASE-T 1000BASE-T MDI-X crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5 - FDDI 100BASE-T 100BASE-T crossover Cat 5or 5e 10BASE-T 10BASE-T MII/10BASE-T MII/10BASE-T No MII/100BASE-X MII/100BASE-X HBCU-5710R HBCU-5710R Cat 5 or 5e 100BASE-T 100BASE-T MII/100BASE-T MII/100BASE-T No MII/100BASE-X MII/100BASE-X HBCU-5710R HBCU-5710R Cat 5 or 5e 1000BASE-T 1000BASE-T GMII/1000BASE-X GMII/1000BASE-X or SGMII No Any HBCU-5710R HBCU-5710R Cat 3 Any 3 Yes No Implementation Notes SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) SGMII mode must be enabled by host on local copper SFP via write to 0xAC registers (8,9) HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed to work with IEEE802 IEEE802.3 1000BASE-T 1000BASE-T MDI-X crossover definition only HBCU-5710R HBCU-5710R designed and tested to work with Gigabit MAC/SerDes only HBCU-5710R HBCU-5710R designed and tested to work with Gigabit MAC/SerDes only HBCU-5710R HBCU-5710R designed and tested to work with Gigabit MAC/SerDes only HBCU-5710R HBCU-5710R not tested and designed for use with Category 3 cable Table 1 is an interoperability matrix, which summarizes different system implementation cases (MAC/SerDes, cable type, link partner speed, etc.) for the Avago Technologies HBCU5710R HBCU5710R copper SFP transceiver, and whether or not a proper link is established. Figure 3 is a block diagram illustrating how the system elements and stages mapped on the columns in table 2 fit into a typical copper transceiver application. The numbers designating each part in figure 3 correspond to columns in table 2. On Figure 3, the case of a full 1000BASE-T 1000BASE-T system link is illustrated. Note, though, that the sub-elements in the diagram (MAC/SerDes, link partner, cable type ,etc.) can be replaced by sub-element types from table 2 to constitute a different implementation scenario. Two-wire interface Bidirectional Transfer Bus (BDT) The HBCU-5710R HBCU-5710R supports a two-wire interface, which consists of a serial data line (SDA) and a serial clock line (SCL). The interface complies with an industry standard Multisource Agreement that defines the serial interface protocol. The protocol uses the two-wire serial bus definition of the ATMEL AT24C01A AT24C01A CMOS EEPROM or equivalent. The two-wire interface allows access to thirty two 16 bit registers (located on address 0xAC) and the 128 byte serial ID memory (located on address 0xA0 and defined on SFP MSA.). Since individual two-wire serial operations are defined as 8byte, data must be read or written in blocks of two-bytes, when performing two-wire serial commands to the 16-bit registers located at address 0xAC. Please refer to HBCU-5710R HBCU-5710R datasheet for byte contents of the serial ID memory space located on two-wire address 0xA0. III. 1000BASE-T 1000BASE-T electrical test parameters The present section lists and briefly describes key electrical performance parameters, as defined by IEEE802 IEEE802.3 section 40.6 [1], for a 1000BASET 1000BASET physical medium attachment (PMA.) Avago Technologies has verified HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T SFP transceiver performance for all of these test parameters, to ensure adequate performance at the customer application level. Note: For more detailed HBCU-5710R HBCU-5710R test results, as well as a listing of all the major 1000BASE-T 1000BASE-T electrical test parameters, please refer to Avago Technologies Application Note 5044 (HBCU-5710R HBCU-5710R Characterization report.) 4 Peak Differential Output Voltage and Level Accuracy (A/B and C/D Symmetry) The output symmetry tests require the device under test (DUT) to operate in transmitter test mode 1, as defined by sub-clause 40.6.1.1.2 of IEEE standard 802.3-2000. As part of symmetry test, the peak differential output voltage for MDI interface channels (BI_DA, BI_DB, BI_DC, and BI_DD) is measured at test mode 1 waveform points A, B, C, and D, as described in figure 40-19 of IEEE802 IEEE802.3 section 40.6 (see figure 3.). The magnitude of the voltage at points A and B shall be between 670 and 820mV. The standard document states that the magnitude of the voltage at point B and shall not differ from the magnitude of the voltage at point A by more than one percent a. In addition, the magnitudes of the voltages at points C and D shall not differ from 0.5 times the average of the voltage magnitudes at points A and B by more than two percent. The transmitter test fixture needed for test is specified in figure 40-22 of IEEE802 IEEE802.3 standard document. Note a: HBCU-5710R HBCU-5710R A/B symmetry as specified by IEEE802 IEEE802.3 1000BASET 1000BASET may exceed the one percent variation requirement over specified operating conditions. To ensure required performance at the customer system level, Avago Technologies tests its HBCU-5710R HBCU-5710R transceivers for link error performance, in addition to testing 1000BASE-T 1000BASE-T electrical test parameters, over specified operating conditions and implementation scenarios. Specifically, Avago Technologies does link error tests for cable lengths greater than the 100m max cable length specified by the standard, so as to guarantee bit error rate less than 10-10 at the system level. Maximum output droop The output droop test requires the device under test (DUT) to operate in transmitter test mode 1, as defined by sub-clause 40.6.1.1.2 of IEEE standard 802.3-2000. As part of the maximum output droop test, the MDI channel differential output voltage is measured at test mode 1 waveform points F, G, H, and J (see figure 4.). Points G and J are exactly 500 ns from points F and H respectively. Ethernet standard requires the magnitude of the voltage at point G to be greater than 73.1% of the magnitude of the voltage at point F. In addition, the magnitude of the voltage at point J needs to be greater than 73.1% of the magnitude of the voltage at point H. The transmitter test fixture needed for test is specified in figure 40-23 of IEEE802 IEEE802.3 standard document. Differential output templates The differential output template test requires the device under test (DUT) to operate in transmitter test mode 1. As part of the output template tests, the MDI channel test mode 1 waveform output segments around points A, B, C, D, F, and H are compared to differential output templates as defined in figure 40-26 of IEEE802 IEEE802.3 standard document. The waveforms around points A, B, C, and D are compared to normalized time domain transmit template 1 after the following normalization factors are applied [1,2]: · The waveform around point A is normalized to the peak voltage at point A. · The waveform around point B is normalized to the negative of the peak voltage at point A. · The waveform around point C is normalized to 0.5 times the peak voltage at point A. · The waveform around point D is normalized to the negative of 0.5 times the peak voltage at point A. The waveforms around points F and H are compared to time domain transmit template 2 after the following normalization factors are applied [1,2]: · The waveform around point F is normalized to the peak voltage at point F. · The waveform around point H is normalized to the peak voltage at point H. Per Gigabit Ethernet 1000BASE-T 1000BASE-T standard requirement, the waveform segments around points A, B, C, D, F, and H are required to fit within their corresponding templates. The waveform may be shifted in time to achieve the best fit. MDI return loss To match the characteristic impedance of the Category 5 cabling, 1000BASE-T 1000BASE-T transceivers ideally need a differential impedance of 100 W b. If the 1000BASE-T 1000BASE-T device and category 5 cabling have any sort of impedance mismatch, reflection of the transmitted signals will occur. Since the impedances can never be exactly 100 W, and because impedance varies with frequency, some reflections will occur. Return loss is the basic metric that gives indication of the signal power that gets reflected due to impedance mismatch. IEEE 802.3-2000 specifies that the reflected power at the MDI must be at least 16 dB less than the incident power, over the range of 1.0 to 40 MHz. Furthermore, the return loss must be at least 10 ­ 20 * log10 (f /80) dB from 40 to 100MHz. This return loss requirement needs to be met, per standard requirement, when transceiver is connected to cabling with a characteristic impedance of 100 W ± 15%, and while transmitting data or control symbols [1,2]. Note b: It is recommended that customer terminate MDI channels with 100 differential impedance, when performing return loss tests on Avago Technologies HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T transceivers. Figure 4. Example of transmitter test mode 1 waveform (figure 40-19 from IEEE802 IEEE802.3 document 2000 edition) 5 IV. Twisted-pair cables The ANSI/TIA/EIA-568-B ANSI/TIA/EIA-568-B.2-2001 specification [3] is the standard document that defines the industry-accepted categories of twisted-pair cable. The recognized categories of twisted-pair cabling, per standard document, are the following: · Category 5e: This designation applies to 100 cables whose transmission characteristics are specified up to 100 MHz. · Category 3: This designation applies to 100 cables whose transmission characteristics are specified up to 16 MHz. Category 1, 2, 4 and 5 cables are not recognized as part of the standard and, therefore, their transmission characteristics are not specified. Category 5 cabling was made obsolete in the standard by Category 5e cabling. Category 5 twisted-pair cable is the type specified by IEEE802 IEEE802.3 Ethernet standard document for both 100BASE-T 100BASE-T and 1000BASE-T 1000BASE-T applications. To meet standard requirements, the HBCU-5710R HBCU-5710R was designed and tested to operate with Category 5 and Category 5e cabling. Mechanical requirements The mechanical requirement definitions in the standard include aspects such as the physical design of the cables, cable assembly, cable diameter, breaking strength, bending radius and thermal performance. Please refer to standard document for detailed mechanical specifications. Transmission requirements The key electrical transmission requirements for twisted-pair cable, as specified in the standard [3], are the following: · Return loss Return loss is a measure of the reflected energy caused by impedance variations in the cable and is especially important for applications that use simultaneous bidirectional transmission. Return loss is expressed in dB relative to the reflected signal level and it is frequency dependent. Return loss is specified for Category 5 cables, but not specified for category 3 cables. 6 · Insertion loss (or attenuation) Insertion loss is a measure of the signal loss resulting from the insertion of a cable of a given length between a transmitter and receiver. Insertion loss is expressed in dB relative to the received signal level and it is frequency dependent. · Crosstalk (NEXT, FEXT) Crosstalk refers to noise or other external signal(s) that can couple into the electrical receive signal path under question. The signal degradation due to crosstalk is taken into account by standards (both 1000BASE-T 1000BASE-T specification and the cable standard) by imposing a maximum power loss requirement on the test channel (due to crosstalk) in dB. The test channel crosstalk power losses must be measured for the maximum allowed cable length (100m for the case of 100BASE-T 100BASE-T and 1000BASE-T 1000BASE-T.) As it relates to twisted-pair cabling, there are two basic types of crosstalk: - Near-end crosstalk (NEXT) loss is a measure of the unwanted signal coupling from a transmitter at the near-end into neighboring pairs measured at the near-end. NEXT loss is expressed in dB relative to the launched signal level. - Far-end crosstalk (FEXT) loss is a measure of the unwanted signal coupling from a transmitter at the far-end into neighboring pairs measured at the near-end. FEXT is expressed in dB as the difference between the measured FEXT loss and the insertion loss of the disturbed pair. · Propagation delay Propagation delay is the time it takes for a signal to propagate from one end to the other and is typically expressed in nanoseconds (ns). Propagation delay shall be measured for all cable pairs in accordance with cable standard, for the maximum specified cable length (100m in the case of 100BASE-T 100BASE-T and 1000BASE-T 1000BASE-T.) 1000BASE-T 1000BASE-T Crossover cable Section 40.8 of the IEEE802 IEEE802.3 standard document defines the 1000BASE-T 1000BASE-T Medium Dependent Interface (MDI), including the MDI-X crossover function needed. Table 1 below illustrates the assignment of physical medium attachment (PMA) signal (bi-directional channel pairs A, B, C and D) to MDI and MDI-X pin-outs: Table 2. Assignment of PMA signal to MDI and MDI-X pin-outs per IEEE802 IEEE802.3 1000BASE-T 1000BASE-T specification (table 40-12 in standard document) C o n ta c t 1 M DI B I_ D A + M D I-X B I_ D B + 2 B I_ D A - B I_ D B - 3 B I_ D B + B I_ D A + 4 B I_ D C + B I_ D D + 5 B I_ D C - B I_ D D - 6 B I_ D B - B I_ D A - 7 B I_ D D + B I_ D C + 8 B I_ D D - B I_ D C - Note: The FDDI specification, original standard document that introduced 100BASE-T 100BASE-T, defines a crossover pin-out that is different than the IEEE802 IEEE802.3 1000BASE-T 1000BASE-T crossover. The 1000BASE-T 1000BASE-T MDI-X crossover definition is meant to replace the older crossover definition for both 100BASE-T 100BASE-T and 1000BASE-T 1000BASE-T applications. The HBCU-5710R HBCU-5710R Gigabit copper SFP transceiver is designed to interoperate with MDI-X category 5 crossover twisted-pair cable only. MDI-X crossover twisted-pair cable is generally explicitly labeled "MDI-X" on the cable's outside marking. Please contact Avago Technologies for more information on the automatic MDI-X crossover detect functionality of the HBCU-5710R HBCU-5710R transceiver and crossover twisted-pair cable interoperability. From MAC perspective, the MAC is driving an optical transceiver, and acknowledgements it receives during auto-negotiation are from the remote link partner. In actuality, the Avago Technologies copper SFP resolves both the fiber and copper auto-negotiation. The Avago Technologies SFP uses the 1000BASE-X 1000BASE-X information from the MAC to configure which features are advertised during copper autonegotiation. In its default mode, the Avago Technologies copper SFP speed is fixed at 1000 Mbps. Hence, duplex and flow control are the only configurable options, as it relates to AN advertisements. The Avago Technologies copper SFP holds back acknowledgement to the MAC until copper auto-negotiation is resolved. This allows the MAC to complete 1000BASE-X 1000BASE-X auto-negotiation without knowing that 1000BASE-T 1000BASE-T auto-negotiation took place. It also allows 1000BASE-X 1000BASE-X AN optical SFP system applications to incorporate Avago Technologies copper SFPs without having to change the system software. Auto-negotiation is initiated by the copper SFP when any of the following functional events take place: - power-up reset - software reset (0xAC register 0 bit 15) V. Auto-Negotiation Upon installation, the HBCU-5710R HBCU-5710R begins an initialization process called auto-negotiation (AN) per the IEEE 802.3:2000 edition standard. There are two types of Auto-negotiation that begin simultaneously. 1000BASE-T 1000BASE-T Clause 28 auto-negotiation occurs between modules at each end of the category 5 cable. 1000BASE-X 1000BASE-X Clause 37 auto-negotiation occurs between the module and the MAC in the host system. Autonegotiation is the basic mechanism for transferring information from the local host to the link partner, so as to establish preferred speed, duplex, and master/slave link conditions. The 1000BASE-T 1000BASE-T auto-negotiation must complete before the 1000BASE-X 1000BASE-X auto-negotiation can. The HBCU-5710R HBCU-5710R will not allow the MAC to complete its auto-negotiation until the 1000BASE-T 1000BASE-T has completed. The transceivers adjust to a common configuration, per the auto-negotiation protocol. 7 - auto-negotiation re-start (0xAC register 0 bit 9) - software power-up (0xAC register 0 bit 11) 1000BASE-X 1000BASE-X Auto-Negotiation Bypass Mode The 1000BASE-X 1000BASE-X Auto-Negotiation bypass feature allows the SFP to work with a MAC whether it has 1000BASE-X 1000BASE-X Auto-Negotiation turned on or off. The 1000BASE-X 1000BASE-X AN bypass feature is enabled by default, so no software command to copper SFP is required. The module will wait for the 1000BASE-T 1000BASE-T link to come up. After the 1000BASE-T 1000BASE-T link is up, the module will wait for 200 ms. If during this time only idles are received from the MAC, the module will go into bypass mode and begin transmitting and receiving data. To automatically enable autonegotiation bypass: 1000BASE-X 1000BASE-X - set 0xAC register 27 bit 12 to `1' Power-on or reset start 1000BASE-X 1000BASE-X and 1000BASE-T 1000BASE-T Auto-Neg 1000BASE-T 1000BASE-T Auto-Neg is independent of 1000BASE-X 1000BASE-X Auto-Neg Detect and store MAC abilities (1000BASE-X 1000BASE-X); advertise null capabilities (all 0's) to MAC, so MAC cannot complete AN If link is down (either 1000BASE-X 1000BASE-X or 1000BASE-T 1000BASE-T) Re-start 1000BASE-T 1000BASE-T Autoneg (keep holding back acknowledge to MAC) If 1000BASE-X 1000BASE-X Auto-neg is not complete: if 200ms have passed, 1000BASE-T 1000BASE-T link is up, no AutoNeg advertise info is received from MAC, and idles are received from MAC Bypass 1000BASE-X 1000BASE-X Auto-Neg Bring up 1000BASE-X 1000BASE-X link If 1000BASE-T 1000BASE-T link comes up (takes 1-3 seconds) Complete 1000BASE-X 1000BASE-X AutoNeg 1000BASE-T 1000BASE-T link partner abilities now known; advertise to MAC via 1000BASE-X 1000BASE-X AN If 1000BASE-X 1000BASE-X link comes up properly, in 1000BASE-X 1000BASE-X Auto-Neg bypass mode If 1000BASE-X 1000BASE-X Auto-Neg is successfully completed 1000BASE-X 1000BASE-X and 1000BASE-T 1000BASE-T links are both up; begin data traffic Figure 5. 1000BASE-X 1000BASE-X and 1000BASE-T 1000BASE-T Auto-negotiation flowchart for Avago Technologies HBCU-5710R HBCU-5710R gigabit copper SFP 8 Auto-Negotiation Examples Case 1: The module in a switch is connected to a second module in another switch through a copper cable. The 1000BASE-T 1000BASE-T abilities advertised on each side will be based on the abilities of its own MAC. The abilities advertisements sent to the MAC on the 1000BASE-X 1000BASE-X side will be based on the link partner's capabilities. The link partner's capabilities are found from the 1000BASE-T 1000BASE-T Auto-Negotiation, but the abilities are originally from the link partner's MAC. As far as the two MACs are concerned, they are establishing a 1000BASE-X 1000BASE-X link with another 1000BASE-X 1000BASE-X link partner. Case 2: The module is inserted into a switch with no copper cable. The module will not allow the 1000BASE-X 1000BASE-X Auto-Negotiation to complete. The AutoNegotiation process will be unable to proceed further without a 1000BASE-T 1000BASE-T link. No link can be established. Case 3: After the module is inserted into a switch, with 1000BASE-X 1000BASE-X Auto-Negotiation, a copper cable is inserted. The module will store the 1000BASE-X 1000BASE-X abilities advertisements from the MAC. 1000BASE-T 1000BASE-T Auto-Negotiation will restart using the abilities advertisements from the MAC. After the 1000BASE-T 1000BASE-T link is completed, the module will send 1000BASE-X 1000BASE-X abilities advertisements and acknowledgment code words to the MAC. A 1000BASE-X 1000BASE-X link will then be established. Case 4: After the module is inserted into a switch, without 1000BASE-X 1000BASE-X Auto-Negotiation, a copper cable is inserted. The module will detect that only idles are received from the MAC. The 1000BASE-T 1000BASE-T link will be established base on the abilities advertisements set within the module. After the 1000BASE-T 1000BASE-T link is established, the module will wait for 200 ms and go into bypass mode. A 1000BASE-X 1000BASE-X link will then be established. Case 5: Both 1000BASE-T 1000BASE-T and 1000BASE-X 1000BASE-X links have been established. The copper cable is unplugged. When the copper cable is unplugged, the 1000BASE-T 1000BASE-T link will be broken. This will restart Auto-Negotiation for 1000BASE-X 1000BASE-X and remain in the same state as Case 1. 9 Case 6: The copper cable is first plugged into the module, and then the module with the cable is plugged into a switch. This case is the same as cases 2 and 3. If the module is powered up with the copper cable already plugged in, it will begin both AutoNegotiation processes. Case 7: The module is powered up with the MAC powered down or inactive. With no active MAC, the 1000BASE-X 1000BASE-X AutoNegotiation/link will not complete. A 1000BASET 1000BASET Auto-Negotiation and link can be established. The abilities advertised will be based on the abilities advertisements set within the module. VI. SGMII The HBCU-5710R HBCU-5710R supports the Serial Gigabit Media Independent Interface (SGMII.). This interface enables the SFP to handle 10/100/ 1000BASE-T 1000BASE-T links while maintaining a 1.25 GHz serial speed on the module 1000BASE-X 1000BASE-X MAC side. The host MAC must support the SGMII interface with no clocks to utilize the module's 10/100/1000BASE-T 10/100/1000BASE-T functionality. The module handles the rate conversions between the 1000BASE-X 1000BASE-X and 1000BASE-T 1000BASE-T sides. Whether it is operating in the default mode or the SGMII mode, the interface between the MAC and the copper SFP module is the same as optical modules. It contains TD+, TD-, RD+ and, RD-. In both modes, the traffic rate and data structure are the same. The only difference is in how the MAC and Module interpret the traffic. In the 10 Mbps mode of operation, each data byte is repeated 100 times on the 1000BASE-X 1000BASE-X side of the module. In the 100 Mbps mode, each byte is repeated 10 times. The 1000BASE-X 1000BASE-X side is always 8B/10B 8B/10B 1.25 Gigabit Ethernet. The RJ45 cable side of the module can be 10/100/1000BASE-T 10/100/1000BASE-T. SGMII Auto-Negotiation uses the same initialization process as the SerDes Auto-Negotiation. The only differences are that the module controls the cable-side rate, and the link and status information exchanged with the MAC are different. SGMII Summary · SGMII was developed to allow 10/100/1000 Mbps speeds cable-side operation over 1.25 GBd serial interface · To take advantage of SFP 10/100/1000 operation, MAC must support SGMII Note on SGMII and 10/100/1000 functionality of Avago Technologies HBCU-5710R HBCU-5710R: · SGMII AN is a slight variant of 1000BASE-X 1000BASE-X AN: MAC abilities are set by SFP (module advertises abilities resulting from AN on copper side) Avago Technologies' HBCU-5710R HBCU-5710R copper SFP transceivers are only compatible with 10BASET 10BASET and/or 100BASE-T 100BASE-T remote link partners when local MAC host has SGMII functionality, and local MAC/host enables SGMII autonegotiation. Please contact Avago Technologies for additional information on SGMII operation and testing of Avago Technologies' copper SFP transceiver. · SGMII AN is resolved by SFP; results of AN are sent to MAC · SGMII interface runs at 1.25 GHz using 1000BASE-X 1000BASE-X encoding, regardless of cable-side speed (10M, 100M or 1000M 1000M) SGMII Example The HBCU-5710R HBCU-5710R is connected to a Switch with an SGMII capable MAC on the 100BASEX 100BASEX side. On the RJ45 side, it is connected to a 100BASE-T 100BASE-T module through a length of Cat 5 cable. Through SGMII Auto-Negotiation, the HBCU-5710R HBCU-5710R has informed the SGMII capable MAC that a 100BASE-T 100BASE-T module is the remote partner. Additional details on SGMII · SGMII is enabled on the Avago Technologies module by performing an I2C write sequence to the HBCU-5710R HBCU-5710R I2C address 0xAC registers: address 0x1B 0x00 write data 0x9084 0x9140 The HBCU-5710R HBCU-5710R is transmitting and receiving 100BASE-T 100BASE-T traffic on two of the four pairs in the CAT 5 cable connected to the module. One pair is transmit and the other pair is receive. The module converts the 100BASE-T 100BASE-T data to 8B/10B 8B/10B Gigabit Ethernet and repeats it 10 times for the SGMII capable MAC. In the opposite direction, the module is receiving 10 replicated frames from the SGMII capable MAC and converting them to one 100BASE-T 100BASE-T frame for the remote 100BASE-T 100BASE-T module. · 0xAC register writes can be performed on the SFP, to force it to advertise a specific mode (full or half duplex, 10BASE-T 10BASE-T, 100BASE-T 100BASE-T or 1000BASE-T 1000BASE-T) · Avago Technologies has successfully tested SGMII functionality both at customer switch application level, and using a SmartBits based setup · Avago Technologies has performed 100m link error tests on HBCU-5710R HBCU-5710R units in SGMII mode for all three cable side speeds; There should be no penalty in link error performance going from default mode to SGMII 10/100/ 1000 mode Figure 6 shows how data appears on each side of the module. The data labeled "Data in 100 Mbits/s Domain" refers to the data present on the RJ45 CAT5 copper cable at the 100BASE-T 100BASE-T rate. Below that is the serial data stream from the 1000BASE-X 1000BASE-X side, after being converted to the 1000BASE-X 1000BASE-X rate by the module. The data stream labeled ENC_RXD[0:9] is the parallel data after the SerDes. This is an example of how 100Mb/s data passes through the module in SGMII mode to the MAC. · For 10 Mbps, Each Data Byte is Repeated 100 Times · For 100 Mbps, Each Bata Byte is Repeated 10 Times 125 MHz Clock RX_D V Data in 100 Mbit/s Domain Data0 Data1 Data2 RXD[7:0] after Rate Adaptation D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D1 D1 D1 D1 D1 D1 D1 D1 D1 D1 D2 D2 D2 D2 D2 D2 D2 D2 D2 ENC_RXD[0:9] /S/ d0 d0 d0 d0 d0 d0 d0 d0 d0 d1 d1 d1 d1 d1 d1 d1 d1 d1 d1 d2 d2 d2 d2 d2 d2 d2 d2 d2 SAMPLE_EN Figure 6. Example timing diagram of SGMII Interface for 100BASE-T 100BASE-T mode 10 VII. Programmable Features MII Registers The HBCU-5710R HBCU-5710R contains 32 control/status MII registers accesible on two-wire serial address 0xAC. Each register contains 16 bits which serve link status and/or control functionality. The register status bits allow for mode changes to the module. Some of the features include: 1000BASE-X 1000BASE-X loopback, cable side loop-back, IEEE802 IEEE802.3 1000BASE-T 1000BASE-T test modes, CRC error count, and virtual cable test. The status registers can be used to access the results of the autonegotiation process. The register bits can be one of 5 types: Read and Write, Read only, Latched High, Latched low, and Self Cleared. See the HBCU-5710R HBCU-5710R data sheet for complete register descriptions. Commonly used status and control registers (located in address 0xAC) Registers 0, 1, 4, 9, and 10 located on hex address 0xAC contain the most practical and commonly used status and control functions of the copper SFP, from host perspective. Below is a summary of the functionality of key bits, for each of these 0xAC registers (0, 1, 4, 9 and 10): Table 3. 0xAC address register 0 bit functionality Register 0 - Control register Bit 0.15 R/W 0.14 R/W 0.11 R/W Name Software reset bit Loop-back Power Down Description 1 = PHY reset 0 = Normal Operation 1 = enable 0 = disable 1 = power down 0 = normal operation 0.9 Auto-negotiation 1 = re-start AN R/W re-start 0 = normal operation Common write commands to 0xAC register 0 (in HEX) Details Setting bit 15 to binary '1' performs software reset. The bit will self-clear after a '1' is written. Serial data on SFP RD+/- is de-serialized then re-serialized and sent out to SFP TD+/Power down shuts down the internal PHY IC except for the MAC interface if 16.3 is set to 1. If 16.3 is set to 0, then the MAC interface also shuts down. Module will re-start auto-negotiation process. Bit 9 is selfclearing. 0x9140 ­ Software reset, 0x0940 ­ power down Table 4. 0xAC address register 1 bit functionality Register 1 Bit 1.5 Read-only 1.4 Read-only 1.3 Read-only 1.2 Read-only 11 Status register Name Auto-Negotiation complete Remote fault Auto-negotiation ability Link Status Description 1 = AN process completed 0 = AN process not completed 1 = remote fault condition detected 0 = no remote fault condition detected 1 = module is able to perform AN0 = module is unable to perform AN 1 = link is up 0 = link is down Details Always set to 1 on Avago Technologies SFP Table 5. 0xAC address register 4 bit functionality Register 4 - Auto-negotiation advertisement Bit Name Description Details 4.8 R/W 4.7 R/W 4.6 R/W 4. 5R/W 100BASE-T 100BASE-T full-duplex 100BASE-T 100BASE-T half-duplex 10BASE-T 10BASE-T full-duplex 10BASE-T 10BASE-T half-duplex 1 = Advertise 0 = not advertise 1 = Advertise 0 = not advertise 1 = Advertise 0 = not advertise 1 = Advertise 0 = not advertise Only valid when SFP module is in SGMII operational (see SGMII section on current document) Only valid when SFP module is in SGMII operational (see SGMII section on current document) Only valid when SFP module is in SGMII operational (see SGMII section on current document) Only valid when SFP module is in SGMII operational (see SGMII section on current document) mode mode mode mode Common write commands to 0xAC register 4 (in HEX): Note: for the individual writes below to take effect, they must be followed by software reset operation (writing 0x9140 to 0xAC register 0) and the SFP must be in SGMII mode of operation. Advertise 100BASE-T 100BASE-T full-duplex ­ 0x0D81, 100BASE-T 100BASE-T half-duplex ­ 0x0C81, 10BASE-T 10BASE-T full-duplex ­ 0x0C41, 10BASE-T 10BASE-T half-duplex ­ 0x0C21 Table 6. 0xAC address register 9 bit functionality Register 9 - Master-Slave Control Bit Name Description Details 9.15:13 R/W Transmitter test mode 9.12 R/W Master-slave manual configuration enable This bit takes effect after autonegotiation is re-started via bit 0.9 9.11 R/W Master-slave configuration value 000 = normal operation 0001 = transmit waveform test 010 = transmit jitter test in master mode 011 = transmit jitter test in slave mode 1 = enable manual master-slave configuration per setting of register 9.11 0 = disable manual master-slave configuration per setting of register 9.11 1 = configure PHY as master during AN 0 = configure PHY as slave during AN 9.9 R/W 9.8 R/W 1000BASE-T 1000BASE-T full-duplex 1000BASE-T 1000BASE-T half-duplex 1 = Advertise 0 = not advertise 1 = Advertise 0 = not advertise This bit takes effect after autonegotiation is re-started via bit 0.9. This bit is ignored unless bit 9.12 is 1 This bit takes effect after autonegotiation is re-started via bit 0.9 This bit takes effect after autonegotiation is re-started via bit 0.9 Table 7. 0xAC address register 10 bit functionality Register 10 - Master-Slave status Bit Name Description 10.14 R/W 10.11 R/W 10.10 R/W 12 Master-slave configuration resolution Link partner full-duplex Link partner half-duplex 1 = Local PHY resolved to master 0 = Local PHY resolved to slave 1 = link partner is capable of 1000BASE-T 1000BASE-T full-duplex 0 = link partner is not capable of 1000BASE-T 1000BASE-T full-duplex 1 = link partner is capable of 1000BASE-T 1000BASE-T half-duplex 0 = link partner is not capable of 1000BASE-T 1000BASE-T half-duplex Details Fiber and Copper Register Selection The 0xAC page status/control registers have a dual copper and fiber identity. Register 22, bits 7:0 are used to select between the two identities. 0x00 selects the copper (i.e cable side) control and status values for registers 0, 1, 4, 5, 6, 7, 8, 17, 18, 19. 0x01 selects the fiber (i.e 1000BASE-X 1000BASE-X MAC side) control and status values for registers 0, 1, 4, 5, 6, 7, 8, 17, 18, 19. Internal Loopback Mode In internal loopback mode, enabled by setting register 0 bit 14 to `1', the module receives data from the MAC, passes it into the module's internal 8B/10B 8B/10B gigabit SerDes block and loops back before the DSP based 1000BASE-T 1000BASE-T block back through the SerDes and back to the MAC. For the internal loopback mode of operation to be enabled, fiber auto-negotiation needs to be disabled both on the HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T module and on the local MAC. The reason is that the HBCU-5710R HBCU-5710R requires a handshake between the fiber auto-negotiation on the MAC side and copper auto-negotiation on the cable side, before it can establish traffic. Since when in internal loopback mode, the module's copper side receive functionality is disabled, it will be impossible to carry out the handshake. The complete set of register writes below will enable internal loopback on the HBCU-5710R HBCU-5710R copper SFP: In Test mode 3 the PHY transmits {+2,-2} repeatedly on all channels in Slave mode. Test mode 4 is a sequence of symbols generated by scrambler generator polynomial. The transmitter test modes are enabled by performing writes to 0xAC register 9 bits 15 to 13. Please refer to table 6 on current document for register 9 bit settings for the various test modes. Cable Side Loopback For production testing the 1000BASE-T 1000BASE-T SFP, a cable side loopback configuration mode allows testing of the complete data path of the module. An external loopback stub is required for this functional configuration. This loopback stub consists of a RJ45 connector where MDI pins 1,2 are connected to MDI pins 3,6 and MDI pins 4,5 are connected to MDI pins 7,8. See Figure 8. The Cable Side Loopback mode can be enables by writing to the following 0xAC registers: Reg 09 (e.g. Reg 09: 0x1D00) Reg 0 0x0007 Reg 30 0x0808 Reg 29 0x0010 Reg 30 0x0002 Reg 29 0x0012 Reg 22 0x4001 Reg 30 0x8001 Reg 0 0x0100 Reg 22 0x0001 Reg 0 0x9140 Reg 20 0x0C60 Reg 0 0x4000 Reg 0 0x9140 Test Modes There are four test modes available in two wire serial address 0xAC definition. Test mode 1 is a Transmit waveform test. The PHY in the HBCU-5710R HBCU-5710R transmits a repeating sequence from all four transmitters in master mode. In Test mode 2 the PHY transmits {+2,-2} repeatedly on all channels in Master mode. 13 =11 0x9140 Reg 29 12:11 The Cable-Side Loopback test setup requires a MAC that will originate the frames to be sent out through the module. The loopback stub is used instead of a normal RJ45 cable. The loopback stub allows the module to self-link. The MAC should see the same packets it sent, looped back to it. Line Loopback CRC Error Counter The line loopback mode of operation allows the HBCU-5710R HBCU-5710R gigabit copper SFP transceiver to receive frames from a remote cable link partner and send them back, so as to test the copper transmit and receive data path. When the HBCU5710R HBCU5710R is configured to line loopback mode, it will loop back data received from copper side before it reaches the 1000BASE-X 1000BASE-X MAC interface pins, and send it out on the line side. The module contains a CRC counter. This feature is enabled through register writes. The counter is stored in an eight-bit register. Figure 7 shows a schematic illustrating the HBCU-5710R HBCU-5710R line loopback test setup. Before line loopback is enabled on the HBCU-5710R HBCU-5710R gigabit copper transceiver, the SFP must first establish a link with the remote cable partner. Once a copper link is established, line loopback mode is enabled by writing to bit 14 on 0xAC address register 20: The counter is enabled using the following register writes. Reg 29 0x0010 Reg 30 0x0001 To read the counter write to the following registers Reg 29 0x000C Reg 30 bits Bits 7:0 contain the CRC error count. To disable and clear the counter, write to the following registers. 20.14 = 1 (line loopback is enabled) Reg 29 0x0010 20.14 = 0 (line loopback is disabled) Reg 30 0x0000 Once line loopback is enabled, the remote link partner can send data to the HBCU-5710R HBCU-5710R over copper and receive the same data back. The counter remains at its limit of 255 and will not roll over to zero. It must be disabled and enabled to be reset to zero. Enable line loopback in the copper PHY to bypass MAC MAC not available System under test Copper Link Partner HBCU-5710R HBCU-5710R CAT-5 cable Figure 7. Basic schematic of test setup implementing HBCU-5710R HBCU-5710R transceiver line loop-back configuration 14 TAB 1 2 3 4 5 6 7 8 Figure 8. Basic illustration of loopback of MDI channels on 1000BASE-T 1000BASE-T transceiver VIII. SFP MSA Status and Control signal I/O functionality The SFP MSA defines three status and control hard signal I/O lines: TX_Disable, RX_LOS and TX_Fault. Below is a brief description of the functionality implemented by Avago Technologies' HBCU-5710R HBCU-5710R transceiver for those respective signal I/O's: TX_Disable TX Disable as described in the SFP MSA is not applicable to the 1000BASE-T 1000BASE-T module, but is used for convenience as an input to reset the internal ASIC. When TX_Disable is toggled, the transceiver will re-start 1000BASE-T 1000BASE-T autonegotiation (link is temporarily down.) The TX_Disable pin is pulled up within the module with a 4.7 k resistor. RX_LOS By default, LOS (Loss of Signal) is not used and is always tied to ground on Avago Technologies standard HBCU-5710R HBCU-5710R transceiver. Per customer request, nevertheless, a special version of Avago Technologies 1000BASE-T 1000BASE-T SFP transceiver can be generated which is pre-set in factory to have a RX_LOS pin that functions as a 1000BASE-T 1000BASE-T link up/link down indicator. Please contact Avago Technologies for more information on functional implementation of RX_LOS on Avago Technologies HBCU-5710R HBCU-5710R transceivers. TX_Fault By default, TX_Fault is not used and is always tied to ground on Avago Technologies standard HBCU-5710R HBCU-5710R transceiver. IX. Avago Technologies copper SFP evaluation tool Avago Technologies has an evaluation kit available to customers to provide a convenient means for evaluating SFP transceivers such as the HBCU-5710R HBCU-5710R, which have digital functionality accessible over the SFP MSA defined two-wire serial interface. The HFBR-0534 HFBR-0534 evaluation board implements a micro-controller to emulate twowire serial interface commands and functions executed by a master device such as a 1000BASE-T 1000BASE-T host. Graphical user interface (GUI) based, Windows software is included with the HFBR-0534 HFBR-0534 evaluation kit (see figure 9.) The GUI software included in the kit is designed to give the user an easy, straightforward way to communicate to SFPs, via the two-wire serial interface, using a PC. The evaluation software is customized to allow quick verification of the feature sets implemented by Avago Technologies' HBCU-5710R HBCU-5710R 1000BASE-T 1000BASE-T transceivers. The HFBR-0534 HFBR-0534 evaluation board is also suitable for evaluating optical/electrical SFP transceivers. Please contact Avago Technologies for more information on the HFBR-0534 HFBR-0534 evaluation kit and software evaluation of HBCU-5710R HBCU-5710R transceivers. Figure 9. Screen capture of initial window for Avago Technologies 1000BASE-T 1000BASE-T evaluation GUI software 15 X. References [1] IEEE Gigabit Ethernet Standard 802.3, 2000 Edition [2] Gigabit Ethernet PMA Test Suite Technical Document, Gigabit Ethernet Consortium, University of New Hampshire, November 29, 2000 [3] ANSI/TIA/EIA-568-B ANSI/TIA/EIA-568-B.2-2001Commercial Building Telecommunications Cabling Standard, Part 2: Balanced TwistedPair Cabling Components, May 2001 For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved.Obsoletes 5989-0430EN 5989-0430EN AV01-0068EN AV01-0068EN - March 22, 2006