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Abstract: GS8642Z18 GS8642Z18(B)/GS8642Z36 /GS8642Z36(B)/GS8642Z72 /GS8642Z72(C) 119- & 209-Bump BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 300 MHz­167 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mode enable (ZZ) ... Original
datasheet

35 pages,
573.65 Kb

GS8642Z72 GS8642Z18B GS8642Z18 /GS8642Z36 /GS8642Z72 GS8642Z18 abstract
datasheet frame
Abstract: Product Preview GS8642Z18 GS8642Z18(B)/GS8642Z36 /GS8642Z36(B)/GS8642Z72 /GS8642Z72(C) 119- & 209-Bump BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 300 MHz­167 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep ... Original
datasheet

34 pages,
861.81 Kb

GS8642Z72 GS8642Z18B GS8642Z18 /GS8642Z36 /GS8642Z72 GS8642Z18 abstract
datasheet frame
Abstract: Product Preview GS8642Z18 GS8642Z18(B/E)/GS8642Z36 /GS8642Z36(B/E)/GS8642Z72 /GS8642Z72(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 300 MHz­167 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include ... Original
datasheet

38 pages,
767.02 Kb

GS8642Z72 GS8642Z18B GS8642Z18 /GS8642Z36 /GS8642Z72 GS8642Z18 abstract
datasheet frame
Abstract: Preliminary GS8642Z18 GS8642Z18(B)/GS8642Z36 /GS8642Z36(B)/GS8642Z72 /GS8642Z72(C) 119- & 209-Bump BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 300 MHz­167 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mod ... Original
datasheet

34 pages,
872.22 Kb

GS8642Z72 GS8642Z18B GS8642Z18 /GS8642Z36 /GS8642Z72 GS8642Z18 abstract
datasheet frame
Abstract: GS8642Z18/36/72 GS8642Z18/36/72(B/C)-xxxV 119- & 209-Bump BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features · NBT (No Bus Turn Around) functionality allows zero wait Read-Write-Read bus utilization; fully pin-compatible with both pipelined and flow through NtRAMTM, NoBLTM and ZBTTM SRAMs · 1.8 V 2.5 V core power supply · 1.8 V or 2.5 V I/O supply · User-configurable Pipeline and Flow Through mode · ZQ mode pin for user-selectable high/low output ... Original
datasheet

33 pages,
546.57 Kb

GS8642Z18/36/72 GS8642Z18/36/72 abstract
datasheet frame
Abstract: Preliminary GS8642Z18/36/72 GS8642Z18/36/72(B/C)-xxxV 119- & 209-Bump BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features · NBT (No Bus Turn Around) functionality allows zero wait Read-Write-Read bus utilization; fully pin-compatible with both pipelined and flow through NtRAMTM, NoBLTM and ZBTTM SRAMs · 1.8 V 2.5 V core power supply · 1.8 V or 2.5 V I/O supply · User-configurable Pipeline and Flow Through mode · ZQ mode pin for user-selectable hig ... Original
datasheet

33 pages,
867.4 Kb

GS8642Z18/36/72 GS8642Z18/36/72 abstract
datasheet frame