NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Purpose Output 2 with Tristate 25 GPO3 DIO General Purpose Input/Output with Tristate may be , in the input crystal being buffered out to GPO3 as shown in Figure 12. This is useful for example to , and DN output control signals (Figure 24) to be routed to pins GPO1, GPO3 and GPO2 respectively. This , to GPO3, GPO2, and GPO1 respectively. These lines will be active during frequency pull-in and will , path divider output and the sine reference input are buffered out to GPO1,GPO2 and GPO3 respectively ... | Original |
46 pages, |
HMC508LP5E HMC513LP5E HMC515LP5E HMC529LP5E HMC587LC4B HMC702LP6CE HMC588LC4B hmc515 multi modulus divider 12GHz FMCW circuit FMCW HMC584 FMCW Radar HMC702 HMC702LP6CE abstract |
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| Abstract: Purpose Output 2 with Tristate 25 GPO3 DIO General Purpose Input/Output with Tristate may be , out to GPO3 as shown in Figure 12. This is useful for example to generate a copy of the input crystal , GPO1, GPO3 and GPO2 respectively. This option gives insight into the Lock Detection Process and could , which holds the PFD at maximum gain, are routed to GPO3, GPO2, and GPO1 respectively. These lines will , reference input are buffered out to GPO1,GPO2 and GPO3 respectively as shown in Figure 14. In this mode ... | Original |
46 pages, |
programming smt machine GP01 GP02 GP03 H701 HMC vco HMC701 microwave proximity sensor CMOS ring oscillators FMCW FMCW circuit FMCW Radar HMC701LP6CE 16-BIT HMC701LP6CE abstract |
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| Abstract: Down 0= Start with Ramp Up 5 R/W ramp_trig_ext_en 0 Enable hardware trigger on GPO3 pin , 0001 GPO3 , Port Mirror GPO3 - VSDO GPO2 = VSCK GPO1 = SVLE gpo_sel ... | Original |
22 pages, |
HMC-C083 HMC-C070 HMC vco GP03 GP02 GP01 datasheet abstract |
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| Abstract: 1-pin header. JP4 GPO37 Connector. 1-pin header. JP5 GPO36Connector. 1-pin header. JP9 , Num 1 4.3.26 Signal GPO37 General Purpose I/O Port (36) JP5 A 1-pin header. Pin Num 1 4-12 SPECIFICATIONS Signal GPO36 SuperI/O PC87360 PC87360 Evaluation Board Reference Manual 4.3.27 , C29 R83 AVI4 R85 AVSS R65 0 OHM GPO36 AVI6 R60 R61 0 OHM % &% R64 0 OHM GPIO40 GPIO40 GPO37 AVSS B % &% % &% C31 AVSS C34 R84 AVSS % &% AVDD 1 ... | Original |
66 pages, |
10-PIN 26-PIN 34-PIN FDC14 GP*37 GPIO33 IDC16 RSL2 PC87360 idc-26 BLM31A02PT BLM31A02 IDC26 IDC-16 DB15 MALE TO DB9 male connector pinout PC87360 abstract |
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| Abstract: 1-pin header. J22 LPC Bridge Connector. JP3 GPIO43 GPIO43 Connector. 1-pin header. JP4 GPO37 Connector. 1-pin header. JP5 GPO36 Connector. 1-pin header. JP9 GPIO45 GPIO45, 44 Connector. 2-pin , Pin Num 1 4.3.25 Signal GPO37 General Purpose I/O Port (36), JP5 A 1-pin header. Pin Num 1 4-12 SPECIFICATIONS Signal GPO36 SuperI/O PC87365 PC87365 Evaluation Board Reference Manual ... | Original |
70 pages, |
b14 smd diode 8 pin mini-din male to 6 pin mini-din 5VSB 34-PIN 26-PIN 18-Pin IDC26 J6 a7 TRANSISTOR DIODE SOT-23 PACKAGE SW-SPDT-mom SO20W SMD diode b24 PC87365 PC MOTHERBOARD SERVICE MANUAL PC87365 abstract |
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| Abstract: 1-pin header. J22 LPC Bridge Connector JP3 GPIO43 GPIO43 Connector. 1-pin header. JP4 GPO37 Connector. 1-pin header. JP5 GPO36 Connector. 1-pin header. JP9 GPIO45 GPIO45, 44 Connector. 2-pin , ), JP4 A 1-pin header. Pin Num 1 4.3.26 Signal GPO37 General Purpose I/O Port (36), JP5 A 1-pin header. Pin Num 1 4-12 SPECIFICATIONS Signal GPO36 SuperI/O PC87363 PC87363 Evaluation Board , 0 OHM JP3 1 AVSS R82 JP8 AVSS C29 R83 R85 AVSS R65 0 OHM GPO36 ... | Original |
68 pages, |
10-PIN PC87363 PC MOTHERBOARD SERVICE MANUAL motherboard ga 26-PIN IDC26 34-PIN atx connector idc16 lad1 relay smd diode b27 DB15 MALE TO DB9 male connector pinout PC87363 abstract |
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| Abstract: PCI1520EP PCI1520EP PC Card Controllers Data Manual 2003 PCIBus Solutions SGLS168 SGLS168 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and c ... | Original |
131 pages, |
PCI1520IGHKEP PCI1520-EP PCI1520 marking CODE W04 AD12 82365SL PCI1520EP PCI1520EP abstract |
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| Abstract: 11 GPO4 Horizontal Start reg_gpo4_pstart 03 FA 03 FA 26 AE 8 GPO3 Control Register reg_gpo3_cont 00 25 AD AC 11 GPO3 Vertical Duration reg_gpo3_Icount 00 00 00 00 24 AB AA 11 GPO3 Vertical Start reg_gpo3_Istart 00 01 00 01 23 A9 A8 11 GPO3 Horizontal Duration reg_gpo3_pcount 02 A0 00 00 22 A7 A6 11 GPO3 Horizontal Start reg_gpo3_pstart 03 86 00 02 21 A5 8 GPO2 Control Register ... | Original |
28 pages, |
FPD87310 FPD87310 abstract |
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| Abstract: configured as PCI LOCK, GPI3, GPO3, socket activity LED output, ZV switching outputs, CardBus audio PWM, GPE ... | Original |
27 pages, |
XCPS016 82365SL diagram transistor tt 2206 PCI930 PCI950 430TX SCPS016 transistor tt 2206 PCI1220 TT 2206 TT 2206 datasheet TPS2202/2206 PCI1220 abstract |
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| Abstract: GPIO12-GPIO14 20Char Hardware Interface Signals NC NC NC NC NC NC PM3/GPO3 TONE PM0/GPO0 PM1/GPO1 PM2/GPO2 , /GPO2 PM3/GPO3 VDRAM RASn CAS0n CAS1n CAS2n DWRn eXtended FAXENGINE Device Set VSS NC SM0 , VDD3 YCLK XCLK XTLO XTLI ~RESET GPO0 GPO1 GPO2 ~IRQ1 ~CTS DGND2 GPO3 GPO4 GPO5 GPO6 , GPI6 GPI7/RINGD GPO7 GPO6 GPO5 GPO4 GPO3 DGND2 CTSn IRQ1n GPO2 GPO1 GPO0 RESETn XTLI ... | Original |
30 pages, |
R96XFE-P MC24 MD-139 R144EFX R144XFE-B R144XFE-M R144XFE-MVS R96DFX R96XFE-B R96XFE-M R96XFE-MP MD139 opo7 datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| begin 755 chkinit.Z M'YV0 ;X!.!##G*M, !(J5(@$PH$ "P $ &"@ 0:)00@D- 5%(@XJ"04L3!B M!QP &D5JU'@ 0 $ V#&8#*RILV%+N"$(7/3)@62['K61.""3AD\=$:*#)FP MXD4 2X4N!)%SI]2%Z"@^>'H5 %$R8>B$N1H@(T4(714" www.datasheetarchive.com/download/52161151-960442ZC/chkinitr.uue |
Xilinx | 05/09/1996 | 397.58 Kb | UUE | chkinitr.uue |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Signal Description printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/sigdesc.htm |
Intel | 04/05/1999 | 155.8 Kb | HTM | sigdesc.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Testability printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/tstablty.htm |
Intel | 04/05/1999 | 121.78 Kb | HTM | tstablty.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Pinout Information printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/pinout.htm |
Intel | 04/05/1999 | 72.73 Kb | HTM | pinout.htm |
| begin 644 4kefixsn.tar.Z M'YV0-&# F%'&A9@Y9 H7,BPH www.datasheetarchive.com/download/37542492-960430ZC/4kefixsn.uue |
Xilinx | 05/09/1996 | 1804.08 Kb | UUE | 4kefixsn.uue |
| | * | COPYRIGHT(C) ADI 2006 | * | [IBIS Ver] 4.0 [File Name] adv7180_lqfp_64.ibs [File Rev] 0.1 | [Source] This file originated at Analog Devices. I/V Curves based on simulations. Package RLC from vendor. Author: John Cullinane, Video Design Engineer, ADI Questions or Comments: john.cullinane@analog www.datasheetarchive.com/files/analog-devices/ibismodels/adv7180_lqfp_64.ibs |
Analog Devices | 30/07/2009 | 297.73 Kb | IBS | adv7180_lqfp_64.ibs |
| |=| | This file is an IBIS representation of the | | analog devices | | AD9277- AD9277- AD9277- AD9277- (valid for all speeds) | | | |= Header Section -| |* www.datasheetarchive.com/files/analog-devices/ibismodels/ad9277bsv.ibs |
Analog Devices | 17/12/2009 | 63.11 Kb | IBS | ad9277bsv.ibs |
| |* | [IBIS ver] 3.2 [File name] tlk3132.ibs [File Rev] 1.2 [Date] May 22, 2009 [Source] TI [Copyright] Copyright 2008 Texas Instruments, Inc. [Notes] The following is the IBIS model for the parallel interfaces in the TLK3132 TLK3132 TLK3132 TLK3132. All serial pins should be modeled using HSPICE. All pins associated with the jitter cleaner are also not model www.datasheetarchive.com/download/70239728-918964ZC/sllm054.zip (tlk3132.ibs) |
Texas Instruments | 06/08/2011 | 307.22 Kb | ZIP | sllm054.zip |
| |* | [IBIS ver] 3.2 [File name] tlk3131.ibs [File Rev] 1.2 [Date] May 22, 2009 [Source] TI [Copyright] Copyright 2008 Texas Instruments, Inc. [Notes] The following is the IBIS model for the parallel interfaces in the TLK3131 TLK3131 TLK3131 TLK3131. All serial pins should be modeled using HSPICE. All pins associated with the jitter cleaner are also not model www.datasheetarchive.com/download/15721870-918963ZC/sllm053.zip (tlk3131.ibs) |
Texas Instruments | 06/08/2011 | 306.92 Kb | ZIP | sllm053.zip |
| [IBIS Ver] 3.2 [Comment Char] |_char [File Name] pcm1602ky.ibs [File Rev] 3.0 [Source] | | This model file was created by Teraspeed Consulting Group LLC | (http://www.teraspeed.com/). | [Date] 07-26-2004 [Notes] Quality Check of this IBIS model: Model Passes IBIS Check Model parses into ICX IS. Simulation done with Hyperlynx. 1. MIN TYP MAX information is based on Temprature and Voltage characteristics only. | [Disclaimer] | | www.datasheetarchive.com/download/95660042-917947ZC/slac190.zip (pcm1602ky.ibs) |
Texas Instruments | 23/10/2012 | 18.13 Kb | ZIP | slac190.zip |