GD16575A STM-16 OC-48 B82432A1224K B64290-A36-X33 GD16575A-32BA DK-2740

Laser Driver GD16575A Preliminary General Description Features The GD16575A is a high performance low power 2.5 Gbit/s Laser

2.5 Gbit/s Laser Driver GD16575A GD16575A Preliminary General Description Features The GD16575A GD16575A is a high performance low power 2.5 Gbit/s Laser Driver. A Mark-Space monitor is available on the pins MARKP and MARKN. l Complies with ITU-T STM-16 STM-16 and SONET OC-48 OC-48 standards. The GD16575A GD16575A is designed to meet and exceed ITU-T STM-16 STM-16 or SONET OC-48 OC-48 fiberoptic communication systems requirements. The GD16575A GD16575A is implemented in a Silicon Bipolar process and requires a single +5 V supply or a single -5.2 V supply. l Intended for driving a 50 load, e.g. a laser diode with 50 input impedance. The circuit is available in a thermally enhanced 32-pin TQFP plastic package. l Large modulation current adjustment range from 5 mA to 60 mA. l Output voltage over / undershoot less than ±2 % respectively ±5 %. l Rise / fall times less than 110/100 ps. l Laser diode pre-bias adjustable up to 50 mA. l Mark-Space monitor. l Internal 50 termination of data inputs. l Operates up to 3.5 Gbit/s. l Power dissipation: 0.38 W. Excluding Modulation Current and Pre-bias Current. l Silicon Bipolar process. l 32 pin thermally enhanced TQFP plastic package. The GD16575A GD16575A is designed to sink a Modulation Current into the IOUT pin and a Pre-Bias Current into the IPRE pin. The Modulation Current is adjustable up to 60 mA by means of the pin VMOD. The Pre-Bias Current may be adjusted up to 50 mA by means of the VPRE pin. Applications Tele Communication: SDH STM-16 STM-16 SONET OC-48 OC-48 l Datacom up to 3.125 Gbit/s. l Data Sheet Rev. 06 l Electro Absorption laser driver. l Direct Modulation laser driver. Functional Details GD16575A GD16575A is a 2.5 Gbit/s laser driver. It is capable of driving high power laser diodes, typically having input impedance of 50 , at a maximum modulation current of 60 mA and a maximum pre-bias current of 50 mA. The differential data inputs (DINT and DINQT) are internally terminated to the DINT and DINQT respectively with 50 resistors. This allows loop-through termination on both inputs and ensures optimum jitter performance. The input sensitivity when driven with a single ended signal is better than 150 mV. The output pin (IOUT) is an open collector output designed for driving external loads with 50 characteristic impedance. Because of the nature of an open collector the output therefore may be regarded as a current switch, with infinite output impedance. The characteristic impedance through the package is approximately 50 . Optimum performance of GD16575A GD16575A therefore is achieved if the output is terminated into a 50 impedance. The output modulation current is controlled by the pin VMOD and can be controlled in the range from 0 mA to 60 mA, however DC-coupling of the output is only possible in the range from 5 mA to 40 mA. Operated with an AC-coupling, the output modulation current can be controlled in the range 5 mA to 60 mA. When DC coupled the output swing will be limited by IOUT output voltage specified to -2 V. For maximum output voltage swing the output should be AC coupled as shown on Figure 2 or VDD should be raised. VDD L3 220uH L2 100nF 100nF IOUTN 50 VDD Figure 2. AC Coupled Output Laser Diode Equivalent 50 Input Impedance VPRE / 16 VDD IPRE / 19 VDD DINT / 26 50 50 DIN / 27 50 Input Buffer 50 L Output Driver DINQ / 30 C IOUT / 13, 14 50 C 50 IOUTN / 11, 12 50 L1 and L3 = Siemens Chip Inductors (B82432A1224K B82432A1224K). L2 and L4 = Siemens ferrite cores B64290-A36-X33 B64290-A36-X33 with 8 turns of 0.22mm Cu-Wire. L4 IOUT Control Voltage from Pre-Bias Current Control System Pre-Bias Current Control VDD L1 220uH An important parameter for laser drivers is voltage overshoot on the output pin (IOUT), because it determines the extinction ratio. GD16575A GD16575A has been designed with special emphasis on achieving a very small voltage overshoot. For GD16575A GD16575A the voltage overshoot is less than 2 % across the full modulation Modulation Current Control 100n AC Coupled Output The pre-bias current is controlled by the pin VPRE and can be controlled from 0 mA to 50 mA. The modulation current control on pin VPRE is implemented as a current mirror and therefore sinks a current proportional to the Pre-bias current. The current sink into the VPRE pin is approximately 3/500 of the modulation current. VMOD / 20 Differential or Single-ended Data Signal A mark-space monitor is provided through the pins MARKP and MARKN. These may be connected as shown in the application diagram below, with a capacitor across the two outputs and a comparator (or Op-amp) to determine the mark density. Two additional pins (VADJBUF and VADJEF) are available in order to optimise the performance of the output signal quality, specifically with respect to overshoot and undershoot. Typically best performance is obtained if these pins are connected to VMOD. Control Voltage from Modulation Current Control System 100n current range, when driving a 50 load. Similarly the voltage undershoot is less than 5 %. The output voltage swing across the external load may be varied accordingly. The modulation current control on pin VMOD is implemented as a current mirror and therefore sinks a current proportional to the modulation current. The current sink into the VMOD pin is approximately 3/80 of the modulation current. L DINQT / 31 Mark/Space Monitor VDD VDD MARKP / 7 100n MARKN / 6 - VEEP / 18 Negative Supply Figure 1. + Ref. Application Diagram Data Sheet Rev. 06 GD16575A GD16575A Page 2 of 6 Pin List Mnemonic: Pin No.: Pin Type: DIN, DINQ 27, 30 AC IN Data inputs. Internally terminated in 50 to DINT and DINQT respectively. DINT, DINQT 26, 31 ANL IN Termination voltages for DIN and DINQ. IOUT, IOUTN 14, 11 OPEN COLLECTOR Laser Driver Output (2.5 Gbit/s). IOUT and IOUTN sink a modulation current, which is controlled by the pin VMOD. The current into IOUT is low when data is high on DIN. IPRE 19 OPEN COLLECTOR Pre-bias current output. IPRE sinks a current, which is controlled by the pin VPRE. VMOD 20 ANL IN Modulation current control input. The control system is made as a current mirror. VMOD sinks a current proportional to the modulation current. This current is approximately 3/80 times "The modulation current". VPRE 16 ANL IN Pre-bias current control input. The control system is made as a current mirror. VPRE sinks a current proportional to the pre-bias current. This current is approximately 3/500 times "The pre-bias current". MARKP MARKN 7 6 ANL OUT Mark-space monitor outputs. High impedance CML outputs. The output voltage of the MARKP pin is the same polarity as the voltage on the DIN input. VADJBUF VADJEF 22 21 ANL IN Pins used to optimise the performance of the output in terms of overshoot and undershoot. Typically optimum performance will be achieved when shorted to VMOD. 2, 4, 9, 10, 12, 13, 15, 24, 28, 29 PWR Ground pins for laser driver part. 3 PWR Ground pin for modulation current control system. 1, 5, 8, 23, 25, 32 PWR Negative supply pins for laser driver part. VEEP 18 PWR Negative supply pin for output driver. VEEB 17 PWR Negative supply pin for pre-bias circuitry. VDD VDDCONT VEE Heat sink Description: Package back Connect to VDD. Package Pinout VEE DINQT DINQ VDD VDD DIN DINT VEE 32 31 30 29 28 27 26 25 VEE 1 24 VDD VDD 2 23 VEE VDDCONT 3 22 VADJBUF VDD 4 21 VADJEF VEE 5 20 VMOD MARKN 6 19 IPRE MARKP 7 18 VEEP VEE 8 17 VEEB 9 10 11 12 13 14 15 16 VDD VDD IOUTN VDD VDD IOUT VDD VPRE Figure 3. Package 32 TQFP, Top View Data Sheet Rev. 06 GD16575A GD16575A Page 3 of 6 Maximum Ratings These are the limits beyond which the component may be damaged. All voltages in table are referred to VDD. All currents in table are defined positive out of the pin. Symbol: Characteristic: VEE Power Supply VO MAX.: UNIT: -6 0 V Applied Voltage (All Outputs) VEE -0.5 2 V VI Applied Voltage (All Inputs) VEE -0.5 0.5 V II AC IN Input Current (AC IN) -1 1 mA II VMOD Input Current (VMOD) -4 1 mA II VPRE Input Current (VPRE, VADJBUF and VADJEF) Note 1 -1 1 mA TO Operating Temperature Base -55 +125 °C TS Storage Temperature -65 +150 °C Note 1: Conditions: MIN.: TYP.: Voltage and/or current should be externally limited to specified range. DC Characteristics TCASE = -40 °C to 85 °C. All voltages in table are referred to VDD. All currents in table are defined positive out of the pin. Symbol: Characteristic: Conditions: VEE Power Supply IEE Negative Supply Current IOUT = 0 A PDISS Power Dissipation VEE = -5.0 V, IOUT = 0 A, IPRE = 0 A Vpp AN IN Peak-peak Voltage when Input is Driven Single VVTH=-1.3V ended. V VMOD MIN.: TYP.: MAX.: UNIT: -5.5 -5.2 -4.7 V 75 0.5 W 150 800 mV Voltage Range for VMOD VEE VDD V I VMOD Sink Current into pin VMOD -6 0 mA VIN NN Input Voltage Range for VPRE, VADJBUF, and VADJEF VEE VDD V ISINK NN Sink Current into pin VPRE, VADJBUF, and VADJEF -1 0 mA VLO MARK Low Output Voltage for Mark-Space Monitor -2.0 V RO MARK Output Impedance for Mark-Space Monitor 4.0 k VO IPRE IPRE Output Voltage -2.0 0 V I IPRE IPRE Current -50 0 mA VO IOUT IOUT Output Voltage Note 1 -2.0 IMod,HI IOUT IOUT High Modulation Current Note 1 -60 0 mA IMod,LO IOUT IOUT Low Modulation Current Note 1, 2 -3 1 mA Note 1: Note 2: 0.38 mA V RLOAD = 50 AC coupled to VDD connected to pin IOUT. Sink current is controlled by the VMOD pin, and may be adjusted in the range as specified. Notice that high modulation current means that the output voltage level is low. This is a leakage current. Maximum leakage current is present at maximum modulation current. The leakage current decreases for smaller modulation currents. Data Sheet Rev. 06 GD16575A GD16575A Page 4 of 6 AC Characteristics TCASE = -40 °C to 85 °C. Symbol: Characteristic: fMAX OUT Data Output Frequency Jpp OUT Added Output Jitter Note 1 20 ps tRISE OUT Output Rise Time Note 1 110 ps tFALL OUT Output Fall Time Note 1 100 ps tOVER OUT Voltage Output Overshoot 2 % tUNDER OUT Voltage Output Undershoot 5 % Note 1: Conditions: MIN.: TYP.: MAX.: 2500 UNIT: Mbit/s RLOAD = 50 to VDD connected to pin IOUT. ILD = 40 mA. Rise/Fall times at 20 80 % of HI/LO voltage levels. Package Outline Figure 4. Package 32L TQFP (5 x 5 x 1.4 mm) Data Sheet Rev. 06 GD16575A GD16575A Page 5 of 6 Device Marking GD16575A GD16575A Figure 5. Device Marking, 32 pin Package - Top View Ordering Information To order, please specify as shown below: Product Name: Package Type: Temperature Range: GD16575A-32BA GD16575A-32BA 32L TQFP EDQUAD Option: -40.85 °C GD16575A GD16575A, Data Sheet Rev. 06 - Date: 27 January 2000 Mileparken 22, DK-2740 DK-2740 Skovlunde Denmark Phone : +45 7010 1062 Fax : +45 7010 1063 E-mail : sales@giga.dk Web site : http://www.giga.dk Please check our Internet web site for latest version of this data sheet. The information herein is assumed to be reliable. GIGA assumes no responsibility for the use of this information, and all such information shall be at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. GIGA does not authorise or warrant any GIGA Product for use in life support devices and/or systems. Distributor: Copyright © 2000 GIGA A/S All rights reserved