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CWX-H12-XGATE-KX Freescale Semiconductor XGATE BUILD TOOLS AND DE ri Buy
MAX7326AEG+T Maxim Integrated Products I2C Port Expander with 12 Push-Pull Outputs and Four Inputs ri Buy
MAX7326ATG+T Maxim Integrated Products I2C Port Expander with 12 Push-Pull Outputs and Four Inputs ri Buy

FOUR INPUT AND GATE

Catalog Datasheet Results Type PDF Document Tags
Abstract: 56 32 40 56 32 48 64 32 48 64 56 40 128 128 176 Three Input AND Gate l=A, B, C 0=AND Four Input AND Gate l=A, B, C, D 0=AND Two Input NAND/AND Gate l=A, B 0=NAND, AND Three Input NAND/AND Gate l=A, B, C 0=NAND, AND Four Input NAND/AND Gate l=A, B, C, D 0=NAND, AND Two Input OR Gate I=A, B 0=0R Three Input OR Gate l=A, B, C 0=0R Four Input OR Gate l=A, B, C, D 0=0R Two Input NOR/OR Gate l=A, B 0 =N 0R , OR , Shifter 0 = 0U T l=A Two Input Decode Gate l=A,B O=N0R of A and NB Two Input AND Gate 0=AND l=A, B ... OCR Scan
datasheet

4 pages,
300.52 Kb

SC3000 datasheet abstract
datasheet frame
Abstract: frame) and is input to the shift register function. The four input AND gate is used to decode the V1 , besides the AND gate, OR gate and INVERTER functions. The four blocks are "3 BIT SHIFT REG", "SPE NUM , one AND gate and one 2:1 MUX. In LOP operation, its functionality is to select input "C", the , gate and a 4 input AND gate. There are three instantiations of this block and its only function is to , decodes indications associated with STS1 #3. The three input AND gate decodes a J1 byte time on the ... Original
datasheet

9 pages,
59.79 Kb

PM5344 9508 "3 Bit Shift Register" PM5344 abstract
datasheet frame
Abstract: Figure 20. A four input AND gate is used to monitor the brake input and the three top drive outputs. Its , gate resistor Rg will damp any high frequency oscillations caused by the MOSFET input capacitance and , latching the enable input and the top drive AND gate low. To enabling the motor, the PNP transistor along , -900 -150 -600 -40 -300 ix A Forward/Reverse and Brake Inputs (Pins 3, 23) High State Input Current (V , values selected for timing components Rt and Op 11 Error Amp Noninverting Input This input is normally ... OCR Scan
datasheet

24 pages,
2162.63 Kb

MC33034DW120 MC33034DW60 751E MC33034P60 motor forward reverse diagram motor speed drive motorola make ntc thermistor mps 1010 mps 444 mps 724 commutation techniques of scr MC33034 MC33034P120 MC33034/D MC33034/D abstract
datasheet frame
Abstract: An example of two 20-input NOR gates and a 40-input Oft gate mad« from an MC1024/MC1224 MC1024/MC1224 expandable gate and four MC102 MC102&/MC 1225 expanders is shown. Two 20-input NOR gates and on« 40-input OR gate generated using one MC 1024/MC1224 1024/MC1224 expandable gate and four MC1025/MC1225 MC1025/MC1225 expanders. • 1 + 2+3 .+ , /MC1225 /MC1225 dual 4-5 input expander is designed to work with the MC1024/MC1224 MC1024/MC1224 expandable gate. The , DUAL 4-5 INPUT EXPANDERS MC 1025 MCI 225 Dual expander arrays, with a 4-transistor array isolated ... OCR Scan
datasheet

2 pages,
40.36 Kb

MC1225 MC1025 MC102 gates and FOUR INPUT AND GATE TRANSISTOR ARRAY MC1024 Expanders MC1025 abstract
datasheet frame
Abstract: Diagram No. DM930N DM930N Dual four input gate with expander (6k) 19636E 19636E A1 DM932N DM932N Dual four input buffer with expander 19637C 19637C A2 DM933N DM933N Dual four input extender 19638A A3 DM935N DM935N Hex inverter without Incut diodes (6k , four input power gate 19640B 19640B A8 DM945N DM945N RS/JK clocked flip-flop (6k) 19641X 19641X A9 DM946N DM946N Quad two input , DM961N DM961N Dual four input gate with expander (2k) 19644F 19644F A17 DM962N DM962N Triple three input gate (6k) 19645C 19645C A18 , for increased speed. The logic gates are augmented by a buffer, a power gate and an extender. All the ... OCR Scan
datasheet

5 pages,
140.62 Kb

DM946 dm961n DM9094 dtl 932 dtl 946 DM935N DM9099N DM937N DM944 19642R 949 dtl DM963N DM9093 dtl logic gates DM962N DM930N DM932N DM930N abstract
datasheet frame
Abstract: rules and for parallel combination of elements, see page 2. TYPICAL APPLICATIONS -O 30 d o four input gate POSITIVE LOGIC:_ A + B + C + D = A-B-C-D NEGATIVE LOGIC: _ _ ABCD=A+B+C+D O 12 f six input gate AO-016 AO-016 BO-h--016 two input gate POSITIVE LOGIC: A + B = A • B NEGATIVE LOGIC: A-B = A + B This , 9914 MEDIUM POWER DUAL TWO INPUT GATE' The Dual Two-Input Gate element is a dual combination of two-input resistor-transistor-logic circuits, one of four similar basic NAND/NOR gates produced by ... OCR Scan
datasheet

1 pages,
51.22 Kb

schematic diagram NAND gates of the basic logic gates 9914 datasheet abstract
datasheet frame
Abstract: forward drop. 6. Input leakage applies to the four gate inputs and the latch input only. 7. Applies to each of four gate inputs and the latch input. Dallas Semiconductor devices are built to the highest , controlled by the gate inputs and latch pin status. When the latch pin is logic 0, the gate input levels , maintained. When the latch input is returned to logic 0, the gate inputs again are inverted and passed to , Gate Inputs Latch Control DESCRIPTION The DS1640 DS1640 contains four P channel power MOS FET's designed ... Original
datasheet

4 pages,
38.31 Kb

DS1640C DS1640 3 input or gate ttl logic gates POWER FET DATA BOOK Low Input Capacitance MOS FET DS1640/DS1640C DS1640/DS1640C abstract
datasheet frame
Abstract: at 200 mV forward drop. 6. Input leakage applies to the four gate inputs and the latch input only. 7. Applies to each of four gate inputs and the latch input. Dallas Semiconductor devices are built , supply input which is used to power internal logic and to operate a gate bias generator. ©Copyright 1995 , gate (see Figure 1). A set of four internal latches is controlled by the latch input. The logic levels , logic 0, the gate input levels are inverted and passed directly to the control gates, enabling the ... OCR Scan
datasheet

4 pages,
212.15 Kb

DS1640C DS1640 D012 DS1640/DS1640C DS1640/DS1640C abstract
datasheet frame
Abstract: gate inputs and the latch input only. 7. Applies to each of four gate inputs and the latch input , controlled by the latch input. The logic levels passed to the FET gates are controlled by the gate inputs and latch pin status. When the latch pin is logic 0, the gate input levels are inverted and passed di rectly , input is returned to logic 0, the gate inputs again are inverted and passed to the FET control gates , to +5 Volt Input Ground FET Sources FET Drains FET Control Gates No Connection Gate Inputs Latch ... OCR Scan
datasheet

4 pages,
111.5 Kb

DS1640/DS1640C DS1640/DS1640C abstract
datasheet frame
Abstract: carrying 300 mA maximum at 200 mV forward drop. 6. Input leakage applies to the four gate inputs and the latch input only. 7. Applies to each of four gate inputs and the latch input. Dallas Semiconductor , requires a+3 U+5 volt power supply input which is used to power internal logic and to operate a gate bias , input. The logic levels passed to the FET gates are controlled by the gate inputs and latch pin status. When the latch pin is logic 0, the gate input levels are inverted and passed directly to the control ... OCR Scan
datasheet

4 pages,
160.03 Kb

DS1640C DS1640 datasheet abstract
datasheet frame

Datasheet Content (non pdf)

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Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
,1, 2,Output,2,1, 1,-1, 1,D_INVERTER, *A,Digital Two Input AND Gate,D_AND Node, 1, 1, 1,Time invariant source,dc,DC,ON/OFF, 2, 1, 2,DC and Transient analyses value of the Source,dc/tran,Volts, 3, 0, 1,AC small signal input,ac,AC,ON/OFF, 4,-4, 2,AC magnitude Positive Node, 2,N- Negative Node, 1, 1, 2,DC and Transient analyses value of the Source,dc , 1, 1, 1,Time invariant source values,dc,DC,ON/OFF, 2, 1, 2,DC and Transient analysis value of
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5408 Product Folder Quad 2-Input AND Gate Note: This device may be Preliminary, please send us feedback for further comments. Online Download Receive via Email 5408 DM5408 DM5408 DM5408 DM5408 Quad 2-Input AND Gates 92 Kbytes 9-Dec-97 file(s), see Printing Problems . General Description This device contains four independent gates each of which performs the logic AND function. Features Alternate Military/Aerospace
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5409 Product Folder Quad 2-Input AND Gate with Open-Collector Outputs Note: This device may be Preliminary, please send us feedback for further comments. General Description Datasheet Datasheet Title Size in Kbytes Date View Online Download Receive via Email 5409 Quad 2-Input AND Gates with device contains four independent gates each of which performs the logic AND function. The open-collector
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independent 2-input AND gates. Itperforms the Boolean function or in positive logic. The 74AC11008 74AC11008 74AC11008 74AC11008 is characterized for operation from -40°C to85°C. Title: QUADRUPLE 2-INPUT POSITIVE-AND GATE Product Family: AND Device Functionality: QUADRUPLE 2-INPUT POSITIVE-AND Orderable Devices: 74AC11008D 74AC11008D 74AC11008D 74AC11008D, 74AC11008DR 74AC11008DR 74AC11008DR 74AC11008DR 74AC11008 74AC11008 74AC11008 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C SCAS014C SCAS014C SCAS014C - AUGUST 1987 - REVISED APRIL 1996 Please be aware that an important notice
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Texas Instruments 01/06/1998 5.66 Kb HTM scas014c.htm
This device contains four independent 2-input exclusive-OR gates.It performs the Boolean function Y = A operation from -40°C to85°C. Title: QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Product Family: EXOR Device 74AC11086 74AC11086 74AC11086 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A SCAS081A SCAS081A SCAS081A - NOVEMBER 1989 - REVISED APRIL 1996 Please be aware that an important notice concerningavailability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and
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Texas Instruments 01/06/1998 5.64 Kb HTM scas081a.htm
for integrating high-side and low-side gate drivers in one IC. The four part types differ by input to RECTIFIER'S APPLIANCE TUNED 600V GATE DRIVERS OFFER THE SIMPLEST AND LOWEST COST GATE DRIVE SOLUTIONS FOR inverter stage. Enhanced features include reduced EMI gate drive output and external programmable new family of 600V half-bridge gate drivers that are purpose designed and tuned for variable speed EMI and includes options for internal pull-up and pull-down gate drive impedance settings to achieve
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Texas Instruments description This device contains four independent 2-input OR gates. Itperforms the to85°C. Title: QUADRUPLE 2-INPUT POSITIVE-OR GATE Product Family: OR Device Functionality: QUADRUPLE 74AC11032 74AC11032 74AC11032 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C SCAS007C SCAS007C SCAS007C - JULY 1987 - REVISED APRIL 1996 Please be aware that an important notice concerningavailability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and
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Texas Instruments 01/06/1998 5.45 Kb HTM scas007c.htm
Problems . General Description The CD4093B CD4093B CD4093B CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a 2-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different components Noise immunity greater than 50% Equal source and sink currents No limit on input rise and CD4093BC CD4093BC CD4093BC CD4093BC Product Folder Quad 2-Input CD4093BM CD4093BM CD4093BM CD4093BM CD4093BC CD4093BC CD4093BC CD4093BC Quad 2-Input NAND Schmitt Trigger 157 Kbytes 9-Jan-98 View Online Download
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is asynchronous; and a low level at the clear input sets all four of the flip-flop outputs low normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four low level at the load input disables the counter and causes the outputs to agree with the setup data a low level at the clear input sets all four of the flip-flop outputs low after the next clock pulse internal carry look-ahead for application in high-speed counting designs. The 161 and 163 are 4-bit binary
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The 74ACT11008 74ACT11008 74ACT11008 74ACT11008 contains four independent 2-input AND gates. Itperforms the Boolean function Y = A•B or : QUADRUPLE 2-INPUT POSITIVE-AND GATE Product Family: AND Device Functionality: QUADRUPLE 2-INPUT POSITIVE-AND 74ACT11008 74ACT11008 74ACT11008 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C SCAS013C SCAS013C SCAS013C - AUGUST 1987 - REVISED APRIL 1996 features Inputs Are TTL-Voltage Compatible Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise EPIC TM
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Texas Instruments 01/06/1998 5.34 Kb HTM scas013c.htm