FAN5660 A115-A 5M-1982 FAN5660IM FAN5660IMX DS3005660 - Datasheet Archive

 

FAN5660 Monolithic Inductorless CMOS DC/DC Converter Features General Description · · · · ·

 

www.fairchildsemi.com FAN5660 FAN5660 Monolithic Inductorless CMOS DC/DC Converter Features General Description · · · · · · · The FAN5660 FAN5660 is a monolithic charge-pump which can invert, double or split a +1.5V to +5.5V input voltage. Using only two identical low-cost capacitors, the charge pump replaces switching regulators, thus eliminating inductors and their associated cost, size, and EMI. The device has a greater than 90% efficiency over most of its load current range and a typical operating current of only 160µA. The FAN5660 FAN5660 is ideal for both battery-powered and boardlevel voltage conversion applications. Inverts, Doubles or Splits Input Supply Voltage 90% Typ Conversion Efficiency at 100mA load current 0.5V Typ Loss at 100mA Load Low 160µA Operating Current 5.0 Typ Output Resistance for C1 = C2 = 100µF Selectable Oscillator Frequency: 5kHz/50kHz 8-pin SOIC package. Applications · · · · · Laptop Computers Medical Instruments Interface Power Supplies Hand-Held Instruments Operational-Amplifier Power Supplies In order to enable the user optimize capacitor size and quiescent current, the FAN5660 FAN5660 is offered with a frequency control (FC) pin which selects either 5kHz or 50kHz operation. The Oscillator frequency can also be driven with an external clock. The FAN5660 FAN5660 is available in 8-pin small-outline packages. Simplified Block Diagram CAP+ CAP­ VSS VSH V+ CONTROL SYNC LV OSCILLATOR FC REV. 1.0.2 3/28/02 FAN5660 FAN5660 Pin Configuration FC 1 8 V+ 7 SYNC VSS 3 6 LV 4 5 VSH CAP+ 2 FAN5660 FAN5660 CAP- SOIC Typical Applications VIN FC CAP+ V+ + CAP+ + C1 VSS C2 SYNC + LV C1 VOUT = ­VIN CAP- VOUT = 2VIN V+ FC SYNC VSH RL VSH CAP- C2 + LV VSS +VIN C1 = C2 = 1 to 470µF C1 = C2 = 1 to 470µF Figure 1. Inverter, Test Circuit Figure 2. Doubler V+ FC CAP+ VIN SYNC + C1 VOUT = ­VIN/2 FAN5660 FAN5660 VSS + LV CAP- VSH C2 C1 = C2 = 1 to 470µF Figure 3. Splitter 2 REV. 1.0.2 3/28/02 FAN5660 FAN5660 Pin Definition Pin Number Pin Name 1 FC 2 CAP+ 3 Pin Function Description Splitter Doubler Frequency Control for Internal Same as Inverter Oscillator, FC open, fOSC = 5kHz typ; FC = V+, fOSC = 50kHz typ. FC has no effect when SYNC pin is driven externally Inverter Same as Inverter Charge-Pump Capacitor, Positive Terminal Same as Inverter Same as Inverter VSS Power-Supply Ground Input Power-Supply Positive Voltage Output Power-Supply Positive Voltage Input 4 CAP- Charge-Pump Capacitor, Negative Terminal Same as Inverter Same as Inverter 5 VSH Output, Negative Voltage Power-Supply Ground Input Power-Supply Ground Input 6 LV Low-Voltage Operation Input. Tie LV to VSS when input voltage is less than 2V. Above 2V, LV must be left open. LV must be left open for all input voltages LV must be left open for all input voltages 7 SYNC Oscillator Control Input. An external Oscillator may be connected to overdrive SYNC via a 2 to 5 nF capacitor. Same as inverter, however, Same as inverter, do not use SYNC in however, do not use voltage-splitting mode. SYNC in voltagedoubling mode. SYNC shall not be connected to a low impedance DC voltage 8 V+ REV. 1.0.2 3/28/02 Power-Supply Positive Voltage Input Positive Voltage Input Positive Voltage Output 3 FAN5660 FAN5660 Absolute Maximum Ratings Absolute maximum ratings are the values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Parameter Min. Max. Units Supply Voltage: V+ to VSS -0.3 6 V -6 0.3 V -0.3 (V+) + 0.3 V VSH and V+ Continuous Output Current (Note 1) 120 mA Junction Temperature 125 °C 150 °C 300 °C VSH Voltage to VSS Voltage on all other pin to VSS Storage Temperature -40 Lead Soldering Temperature, 10 seconds Electrostatic Discharge Protection (Note 2) 4 kV Power Dissipation (PD) at 85C 300 mW Notes 1. VSH must not be shorted to VSS or V+, even instantaeously, or device damage may result. 2. Using Mil Std. 883E, method 3015.7(Human Body Model), 400V when using JEDEC method A115-A A115-A (Machine Model). Recommended Operating Conditions Parameter Conditions Supply Voltage V+ to VSS or VSS to VSH LV open LV = VSS External SYNC signal TA Typ. Max. Units 2 5.5 V 1.5 2 Connected via C =2 to 5 nF Ambient Operating Temperature Min. 2 V peak to peak -40 °C 85 Electrical Specifications V+ = 5V, RL = , and TA = +25°C using circuit in Figure 1 with C1 = C2 = 100µF, FC and LV open, unless otherwise specified (Note 3) Parameter IIN Typ. Max. Units FC open 0.16 0.5 mA FC to V+ Quiescent Current Symbol Conditions Min. 1 2 Output Current IVSH VSH more negative than -4V Output Resistance RVSH 100mA load current 5 8 Oscillator Frequency fOSC FC open 2.5 5 10 kHz FC to V+ 30 50 90 RL=1k 96 98 RL=0.5k 92 96 99 99.96 Power Efficiency 100 100mA load current Voltage Conversion Efficiency V mA % 90 % Note 3 . In the test circuit, capacitors C1 and C2 are 0.2 maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. 4 REV. 1.0.2 3/28/02 FAN5660 FAN5660 Typical Applications Diagrams Unless otherwise specified TA=25°C,V+=5V, C1=C2=100µF, Iload=0, FC and LV open, using circuit in Figure 1 Supply Current vs. Supply Voltage Supply Current vs. Oscillator Frequency 1.2 1.8 1.6 FC = V+ 0.8 0.6 Supply Current (mA) Supply Current (mA) 1.0 FC = V+, LV = GND 0.4 0.2 0 LV to GND 1.4 1.2 1.0 0.8 0.6 0.4 0.2 FC and LV open 0 1 2 3 4 5 6 1 10 Oscillator Frequency vs. Supply Voltage, FC to V+ Oscillator Frequency vs. Supply Voltage 60 7 Oscillator Frequency (kHz) Oscillator Frequency (kHz) 100 Oscillator frequency (kHz) Supply Voltage (V) LV to GND 55 50 45 40 6 5 4 LV to GND 3 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 Supply Voltage (V) 3 3.5 4 4.5 5 5.5 Supply Voltage (V) Efficiency vs. Load Current Efficiency vs. Operating Frequency 100 1.00 Iload = 10mA 0.95 V+ = 5.5V Iload = 80mA Efficiency (%) Efficiency (%) 90 80 0.90 V+ = 4.5V 0.85 V+ = 3.5V 0.80 70 Iload = 1mA V+ = 1.5V 0.75 60 V+ = 2.5V 0.70 1 10 Operating Frequency (kHz) REV. 1.0.2 3/28/02 100 0 20 40 60 80 100 120 Load Current (mA) 5 FAN5660 FAN5660 Typical Applications Diagrams (continued) Output Voltage vs. Frequency Oscillator Frequency vs. Temperature 8 -5.0 Iload = 10mA -4.8 Output Voltage (V) Oscillator Frequency (kHz) Iload = 1mA -4.9 -4.7 -4.6 -4.5 -4.4 -4.3 -4.2 Iload = 80mA -4.1 V+ = 5.5V 7 6 5 V+ = 1.8V 4 3 2 -4.0 1 10 100 -10 0 10 20 30 40 50 60 70 Operating Frequency (kHz) Oscillator Frequency vs. Temperature, FC to Vin Output Source Resistance (ohm) Oscillator Frequency (kHz) 65 60 55 V+ = 5.5V 45 40 V+ = 1.8V 35 30 -10 0 10 20 30 40 50 60 70 80 90 12 Iout = 50mA 10 8 25 deg C -10 deg C 4 1.5 2.5 3.5 4.5 5.5 Supply Voltage (V) Output Current vs. Capacitance (at Voltage Efficiency = 90%) Output Voltage Drop vs. Load Current 100 Voltage Drop from Supply (V) 0.7 V+ = 5V V+ = 4V Output Current 80 deg C 6 Temperature (°C) V+ = 3V 50 0 V+ = 2.5V 0.6 V+ = 1.5V 0.5 V+ = 3.5V 0.4 V+ = 4.5V 0.3 V+ = 5.5V 0.2 0.1 0 0 10 20 30 Capacitance (µF) 6 90 Output Source Resistance vs. Supply Voltage 70 50 80 Temperature (°C) 40 50 0 25 50 75 100 125 Load Current (mA) REV. 1.0.2 3/28/02 FAN5660 FAN5660 Application Information Positive Voltage Doubler The FAN5660 FAN5660 capacitive charge pump circuit either inverts, splits or doubles the input voltage (see Typical Applications). For highest performance, capacitors with low effective series resistance (ESR) should be used (see Capacitor Selection section for more details). When using the inverting mode with a supply voltage less than 2V, LV may be connected to VSS. This bypasses the internal regulator circuitry and provides best performance in low-voltage applications. When using the inverter mode with a supply voltage above 2V, LV must be left open. The FAN5660 FAN5660 operates in the voltage-doubling mode as shown in Figure 2. The no-load output is 2 × VIN. Negative Voltage Converter The most common application of the FAN5660 FAN5660 is as a charge pump voltage inverter. The operating circuit uses only two identical external capacitors, C1 and C2 (see Typical Circuits). Even though its output is not actively regulated, the FAN5660 FAN5660 is very insensitive to load current changes. A typical output source resistance of 5 means that with an input of +5V the output voltage is -5V under light load, and decreases only to 4.5V with a load of 100mA. Capacitors selection Low ESR capacitors should be used at the output of FAN5660 FAN5660 to minimize output ripple, output resistance and to maximize efficiency. This can be achieved using ceramic capacitors, but certain types of tantalum capacitors may be sufficient. Output ripple voltage is calculated observing that the output current is solely supplied from capacitor C2 during one-half of the charge-pump cycle. This introduces a peak-to-peak ripple of: VRIPPLE = IVSH/(2f x C2 ) + IVSH × (ESR C2) Positive Voltage Splitter The FAN5660 FAN5660 operates in voltage splitting mode as shown Figure 3. The no-load output is VIN/2. Changing Oscillator Frequency Three modes control the FAN5660 FAN5660's clock frequency, as listed below: FC SYNC Oscillator frequency Open Open 5kHz FC = V+ Open 50kHz Open External Clock External Clock Frequency When FC and SYNC are unconnected (open), the Oscillator runs at 5kHz. When FC is connected to V+, the Oscillator frequency increases 10 times. In the inverter mode, SYNC may also be overdriven by an external clock source. A square wave signal of 2V peak-to-peak typical may be applied to SYNC via a 2 to 5nF capacitor to overdrive the internal oscillator. When SYNC is overdriven, FC has no effect. In some applications, the 5kHz output ripple frequency may be low enough to interfere with other circuitry. If desired, the Oscillator frequency can then be increased through use of the FC pin or an external Oscillator as described above. Increasing the clock frequency increases the FAN5660 FAN5660's quiescent current, but also allows smaller capacitance value to be used for C1 and C2. For example, for a nominal f= 5kHz and C2 = 100µF with an ESR of 0.05, ripple is approximately 100mV with a 100mA load current. If C2 is raised to 470µF, the ripple drops to approximately 25mV. REV. 1.0.2 3/28/02 7 FAN5660 FAN5660 Package Dimensions 8-Pin SOIC Inches Symbol Millimeters Min. Max. Min. Max. A A1 B C D .053 .004 .013 .0075 .189 .069 .010 1.35 0.10 0.33 0.20 4.80 1.75 0.25 E e H h L N ccc .150 .158 .050 BSC 3.81 4.01 1.27 BSC .228 .010 .016 5.79 0.25 0.40 Notes: Notes .020 .010 .197 .244 .020 .050 8 0.51 0.25 5.00 6.20 0.50 1.27 8 0° 8° 0° .004 - 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals. 3 6 8° - 1. Dimensioning and tolerancing per ANSI Y14.5M-1982 5M-1982. 0.10 8 5 E 1 H 4 h x 45° D C A1 A SEATING PLANE e B 8 ­C­ LEAD COPLANARITY L ccc C REV. 1.0.2 3/28/02 FAN5660 FAN5660 Ordering Information TA = -40°C to +85°C Part Number Package FAN5660IM FAN5660IM 8-Pin SOIC,Tubes FAN5660IMX FAN5660IMX 8-Pin SOIC, Tape and Reel DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 3/28/02 0.0m 001 Stock#DS3005660 DS3005660 2002 Fairchild Semiconductor Corporation