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SN65ELT23DGKR Texas Instruments 5V Dual Differential PECL Buffer to TTL Translator 8-VSSOP -40 to 85 visit Texas Instruments
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SN65LVELT23DGKR Texas Instruments 3.3V Dual Differential LVPECL Buffer to LVTTL Translator 8-VSSOP -40 to 85 visit Texas Instruments
SN65LVELT23DGK Texas Instruments 3.3V Dual Differential LVPECL Buffer to LVTTL Translator 8-VSSOP -40 to 85 visit Texas Instruments Buy
SN65ELT23D Texas Instruments 5V Dual Differential PECL Buffer to TTL Translator 8-SOIC -40 to 85 visit Texas Instruments Buy

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Part : MC100LVELT23DR2G Supplier : ON SEMICONDUCTOR Manufacturer : New Advantage Stock : 5,000 Best Price : $1.51 Price Each : $1.60
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Part : PELT-23S.50L Supplier : Thomas & Betts Manufacturer : Sager Stock : - Best Price : $251.81 Price Each : $277.73
Part : MC100LVELT23DG Supplier : ON Semiconductor Manufacturer : Wuhan P&S Stock : 500 Best Price : $2.18 Price Each : $3.72
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ELT23

Catalog Datasheet MFG & Type PDF Document Tags

AZ100ELT23T

Abstract: ELT23 Applications PART NUMBER MARKING NOTES AZ100ELT23D AZM100 ELT23 1,2 AZ100ELT23D+ AZM100+ ELT23 1,2 AZ100ELT23DG AZM100G ELT23 1,2,3 TSSOP 8 AZ100ELT23T AZH T23 , required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal. The ELT23 is , ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
Arizona Microtek
Original
AZ100ELT23 MC100ELT23 AZHT23
Abstract: gate design of the ELT23 makes it ideal for applications which require the translation of a clock and , features. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V b b reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan
BR1330/D
Abstract: of the ELT23 makes it ideal for applications which require the translation of a clock and a data , . The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external Vgfj reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan
3L7252 10ELT 100ELT DL140
Abstract: of the ELT23 makes it ideal for applications which require the translation of a clock and a data , . The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V g g reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan

AZ100ELT23

Abstract: MC100ELT23 required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is , ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
Arizona Microtek
Original

pin diagram of 3525

Abstract: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the ELT23 , mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT23 is available , ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
-
OCR Scan
pin diagram of 3525 C100ELT23 BR1330

AZ100ELT23D

Abstract: AZ100ELT23DG Applications PART NUMBER MARKING NOTES AZ100ELT23D AZM100 ELT23 1,2 AZ100ELT23D+ AZM100+ ELT23 1,2 AZ100ELT23DG AZM100G ELT23 1,2,3 TSSOP 8 AZ100ELT23T AZH T23 , required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal. The ELT23 is , ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
Arizona Microtek
Original

AZM100

Abstract: AZ100ELT23 PACKAGE PART NUMBER 1 2 DESCRIPTION 3 AZM100+ ELT23 1,2 AZ100ELT23DG AZM100G ELT23 1,2,3 AZ100ELT23T TSSOP 8 1,2 AZ100ELT23D+ SOIC 8 RoHS Compliant / Lead (Pb , AZM100 ELT23 AZH T23 1,2 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch , of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an
Arizona Microtek
Original

MC10ELT23

Abstract: SOIC package the low skew, dual gate design of the ELT23 makes it ideal for applications which require the , to the list of features. The ELT23 is available in both ECL standards: the 10ELT is compatible with
-
OCR Scan
MC10ELT23 SOIC package MC10ELT/100ELT23

eel -16-2005

Abstract: 001 soic , dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in both ECL standards: the 10ELT is compatible with
-
OCR Scan
SY10ELT23 SY100ELT23 eel -16-2005 001 soic SY10ELT/100ELT23
Abstract: of the ELT23 makes it ideal for applications which require the translation of a clock and a data , . The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V b b reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan
Abstract: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the ELT23 , mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT23 is available , ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no -
OCR Scan

AZM100ELT23

Abstract: AZ10ELT23D , dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external VBB reference, the ELT23 does not require both ECL standard versions. The PECL
Arizona Microtek
Original
AZ10ELT23D AZM100ELT23 3525 supply AZM10ELT23
Abstract: of the ELT23 makes it ideal for applications which require the translation of a clock and a data , . The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V bb reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan

Megaxess

Abstract: frankfurt and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external VBB reference, the ELT23 does not require both ECL standard
Megaxess
Original
Megaxess frankfurt

d1994

Abstract: pin diagram of 3525 the low skew, dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in both ECL standards: the 10ELT is
-
OCR Scan
d1994 eel 19 D1994 100EL SY10ELT23ZC

Megaxess

Abstract: SY100ELT23 low skew, dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external VBB reference, the ELT23 does not require both ECL standard
Megaxess
Original
Abstract: of the ELT23 makes it ideal for applications which require the translation of a clock and a data , . The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V b b reference, the ELT23 does not require both ECL standard versions. The PECL inputs are -
OCR Scan
MC100ELT23/D

AZM100ELT23

Abstract: AZ100ELT23 , dual gate design of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal. The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external VBB reference, the ELT23 does not require both ECL standard versions. The PECL
Arizona Microtek
Original
AZ100ELT23DR1 AZ100ELT23DR2 AZ100ELT23TR1 AZ100ELT23TR2 AZHLT23

10ELT23

Abstract: SY10ELT23 design of the ELT23 makes it ideal for applications which require the tranlation of a clock and a data signal. The ELT23 is available in both ECL standards: the 10ELT is compatible with positive ECL 10H
Synergy Semiconductor
Original
100ELT23 10ELT23 SY10/100ELT23 SY10ELT23ZCTR SY100ELT23ZCTR
Abstract: and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The ELT23 is available in both ECL standards: the 10ELT is -
OCR Scan
SY100E LT23ZC T0013
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