DS2250 DS2250T DS5000FP DS5000 87C51H RS232C DS5000TK DS5000T RS232 DS9075 - Datasheet Archive

 

DS2250(T) Soft Microcontroller Module FEATURES PIN ASSIGNMENT · 8­bit 8051 compatible microcontroller adapts to

 

DS2250 DS2250(T) DS2250 DS2250(T) Soft Microcontroller Module FEATURES PIN ASSIGNMENT · 8­bit 8051 compatible microcontroller adapts to task­ at­hand: ­ 8K, 32K, or 64K bytes of nonvolatile RAM for program and/or data memory storage ­ Initial downloading of software in end system via on­chip serial port ­ Capable of modifying its own program and/or data memory in end use 1 20 21 40 40­PIN SIMM · High­reliability operation: ­ Maintains all nonvolatile resources for 10 years in the absence of VCC ­ Power­fail reset ­ Early warning power­fail interrupt ­ Watchdog timer · Software Security Feature: ­ Executes encrypted software to prevent unauthorized disclosure · On­chip, full­duplex serial I/O ports · Two on­chip timer/event counters · 32 parallel I/O lines · Compatible with industry standard 8051 instruction set · Permanently Powered real time clock DESCRIPTION The DS2250 DS2250(T) Soft Microcontroller Module is a fully 8051 compatible 8­bit CMOS microcontroller that offers "softness" in all aspects of its application. This is accomplished through the comprehensive use of nonvolatile technology to preserve all information in the absence of system VCC. The internal program/data memory space is implemented using 8K, 32K, or 64K bytes of nonvolatile CMOS SRAM. Furthermore, inter- ECopyright 1995 by Dallas Semiconductor Corporation. All Rights Reserved. For important information regarding patents and other intellectual property rights, please refer to Dallas Semiconductor data books. nal data registers and key configuration registers are also nonvolatile. An optional real time clock gives permanently powered timekeeping. The clock keeps time to a hundredth of a second using an on­board crystal. All nonvolatile memory and resources are maintained for over 10 years at room temperature in the absence of power. 081696 1/20 DS2250 DS2250(T) ORDERING INFORMATION PART NUMBER RAM SIZE MAX CRYSTAL SPEED TIMEKEEPING? DS2250 DS2250­8­16 8K bytes 16 MHz No DS2250 DS2250­32­16 32K bytes 16 MHz No DS2250 DS2250­64­16 64K bytes 16 MHz No DS2250T DS2250T­8­16 8K bytes 16 MHz Yes DS2250T DS2250T­32­16 32K bytes 16 MHz Yes DS2250T DS2250T­64­16 64K bytes 16 MHz Yes Operating information is contained in the User's Guide section of the Secure Microcontroller Data Book. This data sheet provides ordering information, pinout, and electrical specifications. 081696 2/20 DS2250 DS2250(T) DS2250 DS2250(T) BLOCK DIAGRAM Figure 1 DS2250 DS2250(T) VCC VCCO P0.0­0.7 BYTE­WIDE ADDRESS BUS ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ P2.0­2.7 P3.0­3.7 ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ P1.0­1.7 8K OR 32K SRAM BYTE­WIDE DATA BUS DS5000FP DS5000FP CE1 RST R/W ALE PSEN EA XTAL1 XTAL2 GND 32K SRAM (­64 only) CE2 +3V REAL TIME CLOCK (DS2250T DS2250T) 081696 3/20 DS2250 DS2250(T) PIN DESCRIPTION PIN 1, 3, 5, 7, 9, , , , , , 11, 13, 15 DESCRIPTION P1.0 ­ P1.7. General p p purpose I/O Port 1 17 RST ­ Active high reset input. A logic 1 applied to this pin will activate a reset state. This pin is pulled down internally so this pin can be left unconnected if not used. An RC power­on reset circuit is not needed and is not recommended. 19 P3.0 RXD. General purpose I/O port pin 3.0. Also serves as the receive signal for the on board UART. This pin should not be connected directly to a PC COM port. 21 P3.1 TXD. General purpose I/O port pin 3.1. Also serves as the transmit signal for the on board UART. This pin should not be connected directly to a PC COM port. 23 P3.2 INT0. General purpose I/O port pin 3.2. Also serves as the active low External Interrupt 0. 25 P3.3 INT1. General purpose I/O port pin 3.3. Also serves as the active low External Interrupt 1. 27 P3.4 T0. General purpose I/O port pin 3.4. Also serves as the Timer 0 input. 29 P3.5 T1. General purpose I/O port pin 3.5. Also serves as the Timer 1 input. 31 P3.6 WR. General purpose I/O port pin. Also serves as the write strobe for Expanded bus operation. 33 P3.7 RD. General purpose I/O port pin. Also serves as the read strobe for Expanded bus operation. 35, 37 XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1 is the input to an inverting amplifier and XTAL2 is the output. 39 26, 28, 30, 32, 34, 36, 38, 40 GND ­ Logic ground. P2.7­P2.0. General purpose I/O Port 2. Also serves as the MSB of the Expanded Address bus. 24 PSEN ­ Program Store Enable. This active low signal is used to enable an external program memory when using the Expanded bus. It is normally an output and should be unconnected if not used. PSEN also is used to invoke the Bootstrap Loader. At this time, PSEN will be pulled down externally. This should only be done once the DS2250 DS2250(T) is already in a reset state. The device that pulls down should be open drain since it must not interfere with PSEN under normal operation. 22 ALE ­ Address Latch Enable. Used to de­multiplex the multiplexed Expanded Address/Data bus on Port 0. This pin is normally connected to the clock input on a '373 type transparent latch. When using a parallel programmer, this pin also assumes the PROG function for programming pulses. 20 EA ­ External Access. This pin forces the DS2250 DS2250(T) to behave like an 8031. No internal memory (or clock) will be available when this pin is at a logic low. Since this pin is pulled down internally, it should be connected to +5V to use NV RAM. In an parallel programmer, this pin also serves as VPP for super voltage pulses. 081696 4/20 DS2250 DS2250(T) PIN 4, 6, 8, 10, 12, 14, 16, 18 2 DESCRIPTION P0.0­P0.7. General purpose I/O Port 0. This port is open­drain and can not drive a logic 1. It requires external pull­ups. Port 0 is also the multiplexed Expanded Address/Data bus. When used in this mode, it does not require pull­ups. VCC + ­ 5 volts. INSTRUCTION SET The DS2250 DS2250(T) executes an instruction set which is object code compatible with the industry standard 8051 microcontroller. As a result, software development packages which have been written for the 8051 are compatible with the DS2250 DS2250(T), including cross­assemblers, high­level language compilers, and debugging tools. Note that the DS2250 DS2250(T) is functionally identical to the DS5000 DS5000(T) except for package and the 64K memory option. A complete description for the DS2250 DS2250(T) instruction set is available in the User's Guide section of the Secure Microcontroller Data Book. MEMORY ORGANIZATION Figure 2 illustrates the address spaces which are accessed by the DS2250 DS2250(T). As illustrated in the figure, separate address spaces exist for program and data memory. Since the basic addressing capability of the machine is 16 bits, a maximum of 64K bytes of program memory and 64K bytes of data memory can be accessed by the DS2250 DS2250(T) CPU. The 8K or 32K byte RAM area inside of the DS2250 DS2250(T) can be used to contain both program and data memory. A second 32K RAM is available for data only. The Real Time Clock (RTC) in the DS2250 DS2250(T) is reached in the memory map by setting a SFR bit. The MCON.2 bit (ECE2) is used to select an alternate data memory map. While ECE2=1, all MOVXs will be routed to this alternate memory map. The real time clock is a serial device that resides in this area. A full description of the RTC access and example software is given in the User's Guide section of the Secure Microcontroller Data Book. 081696 5/20 DS2250 DS2250(T) DS2250 DS2250(T) MEMORY MAP Figure 2 DATA MEMORY (MOVX) ECE2=0 ÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ 8000h NV RAM DATA PARTITION NV RAM PROGRAM 0000h ECE2=1 ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÌÌÌÌÌÌ ÉÉÉÉÉÉ ÌÌÌÌÌÌ ÉÉÉÉÉÉ ÌÌÌÌÌÌ ÌÌÌÌÌÌ ÌÌÌÌÌÌ ÌÌÌÌÌÌ ÌÌÌÌÌÌ PROGRAM MEMORY FFFFh 64K 32K NV RAM DATA LEGEND: ÌÌ ÌÌ ÉÉ ÉÉ = NVRAM MEMORY = EXPANDED BUS (PORTS 0 AND 2) = NOT AVAILABLE PROGRAM LOADING The Program Load Modes allow initialization of the NV RAM Program/Data Memory. This initialization may be performed in one of two ways: 1. Serial Program Loading which is capable of performing Bootstrap Loading of the DS2250 DS2250(T). This feature allows the loading of the application program to be delayed until the DS2250 DS2250(T) is installed in the end system. 2. Parallel Program Load cycles which perform the initial loading from parallel address/data information presented on the I/O port pins. This mode is timing­ set compatible with the 87C51H 87C51H microcontroller programming mode. 081696 6/20 The DS2250 DS2250(T) is placed in its Program Load configuration by simultaneously applying a logic 1 to the RST pin and forcing the PSEN line to a logic 0 level. Immediately following this action, the DS2250 DS2250(T) will look for a parallel Program Load pulse, or a serial ASCII carriage return (0DH) character received at 9600, 2400, 1200, or 300 bps over the serial port. The hardware configurations used to select these modes of operation are illustrated in Figure 3. DS2250 DS2250(T) PROGRAM LOADING CONFIGURATIONS Figure 3 VCC GND VCC P1.7­ P1.0 P2.5­ P2.0 PROGRAM ADDRESS A7­A0 P3.7­ P3.2 TXD P2.7 RXD P1.7­ P1.0 P0.7­ P0.0 A11­A8 P0.7­ P0.0 P2.6 GND DS2250 DS2250 DS2250 DS2250 P2.3­ P2.0 P3.7­ P3.4 D7­D0 PROGRAM DATA IN/VERIFY DATA OUT A15­A12 PROGRAM ADDRESS EA/VPP DRIVE/ RCV RS232C RS232C ALE/PROG PROGRAM CONTROL P2.7 P2.6 XTAL1 R