DS07-16401-2E MB91360G MB91FV360GA/F361GA/F362GA PGA-401C-A02 FPT-208P-M04 - Datasheet Archive

 

DATA SHEET DS07-16401-2E 32-bit RISC Microcontroller CMOS FR50 Family MB91360G Series MB91FV360GA/F361GA/F362GA s DESCRIPTION The

 

FUJITSU SEMICONDUCTOR DATA SHEET DS07-16401-2E DS07-16401-2E 32-bit RISC Microcontroller CMOS FR50 Family MB91360G MB91360G Series MB91FV360GA/F361GA/F362GA MB91FV360GA/F361GA/F362GA s DESCRIPTION The Fujitsu MB91360G MB91360G series is a standard microcontroller containing a wide range of I/O peripherals and bus control functions. The MB91360G MB91360G series features a 32-bit RISC CPU (FR50 series) core and is suitable for embedded control applications requiring high-performance and high-speed CPU processing. The MB91360G MB91360G series also contains up to 4 Kbyte instruction cache memory and other internal memories to improve the execution speed of the CPU. s FEATURES · Execution time : down to 15.6 ns (64 MHz) · FR50 series CPU : RISC architecture The CPU has a general-purpose register architecture with improved numeric implementation whereby a wide range of delayed branch instructions reduces losses in execution time due to pipeline breaks. Bit manipulation instructions and memory access instructions have been enhanced resulting in improved code efficiency and execution speed for control implementation. · A five-stage pipeline structure provides high-speed processing (one instruction per cycle) · 32-bit linear address space : 4 Gbytes · Fixed 16-bit instruction size (basic instructions) · High-speed multiplication/step division · High-speed interrupt processing (6 cycles) · General-purpose registers : 16 × 32 bits (Continued) s PACKAGE 401-pin Ceramics PGA 208-pin plastic QFP (PGA-401C-A02 PGA-401C-A02) (FPT-208P-M04 FPT-208P-M04) MB91360G MB91360G Series (Continued) · External bus interface unit with a wide range of functions Divides the external memory space into a maximum of eight areas. Chip select signal setting, data bus width selection (8, 16, 32-bit) , and area size can be specified for each area. · Address bus up to 32 bit wide · Programmable auto-wait function · Internal instruction cache The MB91360G MB91360G series contains up to 4-Kbyte instruction cache to improve the execution speed of external programs. · Two-way set associative caching · DMAC Direct memory access (DMA) can be used to perform various types of data transfer without going via the CPU. This improves system performance. · Eight channels (including up to 3 external channels) · Three transfer modes supported : single/block, burst, continuous transfer · Power consumption control mechanisms The MB91360G MB91360G series contains a number of functions for controlling the operating clock to reduce power consumption. · Software control : Sleep and stop/real time clock functions · Hardware control : Hardware standby function · Gear (divider) function : The CPU and peripheral clock frequencies can be set independently. · Contains a range of peripheral functions · UART, U-timer · Real Time Clock (with optional subclock operation and subclock calibration module) · Stepper Motor Control · Sound Generator · Serial IO (SIO) , SIO-Prescaler · Power Down Reset · Alarm Comparator · IO-Timer · I2C Interface · 10 Bit D/A Converter · CAN Interface · 10-bit A/D converter · 16-bit reload timer · 16-bit PWM timer · Watchdog timer · Bit search module · Interrupt controller · External interrupt inputs · I/O port function · Interrupt levels "16 maskable interrupt levels" · Other · Power supply voltage · 5 V power supply used, the internal regulator creates internal supply of 3.3 V · Package : MB91FV360GA MB91FV360GA uses a PGA401 PGA401 package, MB91F361GA MB91F361GA and MB91F362GA MB91F362GA are delivered in a QFP208 QFP208 package. 2 MB91360G MB91360G Series s PRODUCT LINEUP Resource Channels Memory Size MB91FV360GA MB91FV360GA MB91F361GA MB91F361GA MB91F362GA MB91F362GA 4 KB / 4 KB 1 KB / 1 KB - / 4 KB D-bus RAM 16 KB 12 KB 12 KB F-bus RAM 16 KB 4 KB 4 KB Flash/ROM 512 KB on F-bus 512 KB on ext. bus 512 KB on F-bus Boot ROM 2 KB 2 KB 2 KB CAN 4 ch 3 ch 3 ch Stepper Motor Control 4 ch 4 ch 4 ch Sound Generator 1 ch 1 ch 1 ch PPG 8 ch 8 ch 8 ch Input Capture 4 ch 4 ch 4 ch Output Compare 4 ch 4 ch 4 ch Free Running Timer 2 ch 2 ch 2 ch D/A Converter 2 ch 2 ch 2 ch A/D Converter 16 ch 16 ch 16 ch I2C 100 kHz I2C 400 kHz 1 ch 1 ch 1 ch Alarm Comparator 1 ch 1 ch 1 ch SIO/SIO prescaler 2 ch 2 ch 2 ch UART/U-Timer 3 ch 3 ch 3 ch 16-bit Reload Timer 6 ch 6 ch 6 ch Ext. Interrupt 8 ch 8 ch 8 ch Non maskable Interrupt 1 Real Time Clock 1 1 1 32 kHz subclock option for RTC yes no no subclock calibration yes no no LED port 8 bit 8 bit 8 bit Power down Reset 1 1 1 Bit search Module 1 1 1 Watchdog timer 1 1 1 Ext. Address Bus 32 bit 21 bit 21 bit Ext. Data Bus 32 bit 32 bit 32 bit Ext. DMA 3 ch 1 ch 1 ch 64 MHz 64 MHz 64 MHz Cache/Instruction RAM Max. operating frequency 3 MB91360G MB91360G Series s PIN ASSIGNMENTS · MB91FV360GA MB91FV360GA (BOTTOM VIEW) 23 24 69 119 174 230 173 118 68 22 172 117 67 21 20 170 115 65 19 114 64 18 168 113 63 17 112 62 16 166 111 61 15 110 60 14 164 109 59 13 108 58 12 162 107 57 106 160 386 342 387 343 388 242 295 344 389 187 243 296 345 390 346 391 393 349 377 394 350 376 395 351 375 396 352 374 397 353 398 373 354 399 372 355 400 371 356 401 370 357 368 369 321 270 320 269 214 158 105 367 56 267 156 103 313 207 98 49 (PGA-401C-A02 PGA-401C-A02) 312 206 204 95 203 94 45 1 138 39 87 139 40 88 140 41 89 141 42 90 142 43 91 143 44 92 144 201 202 146 93 38 86 200 257 258 147 46 2 310 137 199 256 309 259 148 47 3 311 205 96 358 260 149 48 4 359 261 150 97 5 360 262 151 50 6 314 208 99 361 263 152 51 7 315 209 100 362 264 153 52 8 316 210 101 363 265 154 53 9 317 211 102 364 266 155 54 10 365 318 212 213 55 11 319 268 157 104 366 37 85 198 255 308 136 197 254 307 36 84 196 253 306 135 195 252 305 35 83 194 251 304 134 193 250 303 34 82 192 249 302 133 191 248 301 81 190 247 300 132 189 246 299 348 188 245 298 392 378 244 297 347 215 159 4 241 294 186 379 322 271 216 385 341 240 293 185 131 323 272 217 384 340 239 292 184 130 324 273 218 161 383 339 238 291 183 129 80 325 274 219 382 338 237 290 182 128 79 326 275 220 163 337 236 289 181 127 78 327 276 221 235 288 180 126 77 33 328 277 222 165 336 179 125 76 32 329 278 223 234 124 75 31 330 279 224 167 178 287 381 123 74 30 331 280 225 335 73 29 332 281 226 169 286 28 333 282 227 177 233 232 380 122 121 27 72 71 176 285 334 283 228 171 116 66 229 175 231 284 70 120 26 25 145 INDEX MB91360G MB91360G Series · MB91F361GA/F362GA MB91F361GA/F362GA (TOP VIEW) 208 OCU PI [6:0] PH [7:0] PG [7:0] P3 [7:0] P4 [7:0] P5 [7:0] P6 [4:0] P7 [4:6] P8 [7:0] P9 [7:0] ext. Bus Data ext. Bus Address Chip Select ext. Bus Control ICU ext. Int. LED PJ [7:0] PR [7:0] PS [7:0] P0 [7:0] INDEX DAC ADC PL [7:0] 104 IN2 IN1 IN0 INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0 VSS VDD LED7 LED6 LED5 LED4 LED3 LED2 LED1 LED0 LTEST CPUTEST TEST ATG VDD VSS ALARM DA1 DA0 AVSS AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0 AVRH AVCC DEOP0 DACK0 DREQ0 AN15 AN14 AN13 AN12 AN11 AN10 AN9 AN8 DMA PN [5:0] PM [3:0] PK [7:0] PO [7:0] P1 [7:0] PP [5:0] , 105 ADC Mode , , PQ [5:0] 1 I2C Sound XTAL + PLL P2 [7:0] SOT2 VSS VCC3C VDD HVSS PWM1P0 PWM1M0 PWM2P0 PWM2M0 HVDD PWM1P1 PWM1M1 PWM2P1 PWM2M1 HVSS PWM1P2 PWM1M2 PWM2P2 PWM2M2 HVDD PWM1P3 PWM1M3 PWM2P3 PWM2M3 HVSS VDD D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 VDD VSS D15 D16 D17 D18 D19 D20 D21 D22 D23 SIO D24 D25 D26 D27 D28 D29 D30 D31 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 VDD VSS A16 A17 A18 A19 A20 CS4 CS5 CS6 RDY BGRNT BRQ RD WR0 WR1 WR2 WR3 AS ALE CLK AH/BOOT CS0 CS1 CS2 CS3 VDD VSS SMC 157 PPG PB [2:0] 156 CAN SIN2 SOT1 SIN1 SOT0 SIN0 RX2 TX2 RX1 TX1 RX0 TX0 VSS VDD OCPA7 OCPA6 OCPA5 OCPA4 OCPA3 OCPA2 OCPA1 OCPA0 SCK3 SOT3 SIN3 SCK4 SIN4 SOT4 SCL SDA SGA SGO VCI CPO VSS X1A X0A X1 X0 VDD SELCLK MONCLK INIT HST MD2 MD1 MD0 VSS OUT3 OUT2 OUT1 OUT0 IN3 UART 53 52 Chip Select (FPT-208P-M04 FPT-208P-M04) 5 MB91360G MB91360G Series s PIN DESCRIPTIONS Pin No. Pin No. QFP208 QFP208 PGA401 PGA401 9 Circuit Type Pin Name I/O General Purpose IO Port 202 A0 I/O Q Q Ext. Bus Address Bit 0 10 310 A1 I/O Q Q Ext. Bus Address Bit 1 11 201 A2 I/O Q Q Ext. Bus Address Bit 2 12 357 A3 I/O Q Q Ext. Bus Address Bit 3 26 358 VSS 25 401 VDD 13 257 A4 I/O Q Q Ext. Bus Address Bit 4 14 144 A5 I/O Q Q Ext. Bus Address Bit 5 15 309 A6 I/O Q Q Ext. Bus Address Bit 6 16 256 A7 I/O Q Q Ext. Bus Address Bit 7 17 200 A8 I/O Q Q Ext. Bus Address Bit 8 18 356 A9 I/O Q Q Ext. Bus Address Bit 9 19 308 A10 I/O Q Q Ext. Bus Address Bit 10 20 92 A11 I/O Q Q Ext. Bus Address Bit 11 400 VSS 21 44 A12 I/O Q Q Ext. Bus Address Bit 12 22 255 A13 I/O Q Q Ext. Bus Address Bit 13 23 143 A14 I/O Q Q Ext. Bus Address Bit 14 24 199 A15 I/O Q Q Ext. Bus Address Bit 15 27 307 A16 I/O Q Q Ext. Bus Address Bit 16 355 28 91 A17 I/O Q Q Ext. Bus Address Bit 17 29 142 A18 I/O Q Q Ext. Bus Address Bit 18 30 254 A19 I/O Q Q Ext. Bus Address Bit 19 399 VSS 31 43 A20 I/O Q Q Ext. Bus Address Bit 20 198 A21 I/O Q Ext. Bus Address Bit 21 141 A22 I/O Q Ext. Bus Address Bit 22 90 A23 I/O Q Ext. Bus Address Bit 23 197 A24 I/O P70 Q Ext. Bus Address Bit 24 306 A25 I/O P71 Q Ext. Bus Address Bit 25 42 A26 I/O P72 Q Ext. Bus Address Bit 26 253 DREQ2 I/O P73 A DMA Request 2 FV360GA FV360GA F361GA F361GA F362GA F362GA Function not connected (Continued) 6 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 32 140 CS4 I/O P74 A A Chip Select 4 398 VSS 354 VDD 33 196 CS5 I/O P75 A A Chip Select 5 34 89 CS6 I/O P76 A A Chip Select 6 41 CS7 I/O P77 A Chip Select 7 (CANs) 35 305 RDY I/O S S Ext. Bus Control 36 139 BGRNT I/O P81 A A Ext. Bus Control 37 88 BRQ I/O P82 A A Ext. Bus Control 38 40 RD I/O S S Ext. Bus Control 39 304 WR0 I/O S S Ext. Bus Control 353 VSS 40 39 WR1 I/O S S Ext. Bus Control 41 252 WR2 I/O S S Ext. Bus Control 42 251 WR3 I/O S S Ext. Bus Control 43 87 AS I/O P90 A A Ext. Bus Control 44 38 ALE I/O P91 A A (Ext. Bus Control, not yet implemented) 397 45 194 CLK I/O A A Ext. Bus Clk 46 195 AH/BOOT I/O P93 A A Test Signal/Boot Signal 47 137 CS0 I/O P94 A A Chip select 0 52 352 VSS 48 250 CS1 I/O P95 A A Chip Select 1 49 351 CS2 I/O P96 A A Chip Select 2 50 138 CS3 I/O P97 A A Chip Select 3 53 37 AN8 I/O PG0 B B ADC Input 8 54 86 AN9 I/O PG1 B B ADC Input 9 55 136 AN10 I/O PG2 B B ADC Input 10 56 303 AN11 I/O PG3 B B ADC Input 11 57 302 AN12 I/O PG4 B B ADC Input 12 58 36 AN13 I/O PG5 B B ADC Input 13 396 VSS 51 350 VDD not connected (Continued) 7 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 59 85 AN14 I/O PG6 B B ADC Input 14 60 249 AN15 I/O PG7 B B ADC Input 15 61 193 DREQ0 I/O PB0 A A DMA Request 0 62 135 DACK0 I/O PB1 A A DMA Acknowledge 0 63 84 DEOP0 I/O PB2 A A DMA EOP 0 301 DREQ1 I/O PB3 A DMA Request 1 192 DACK1 I/O PB4 A DMA Acknowledge 1 191 DEOP1 I/O PB5 A DMA EOP 1 395 VSS 35 DACK2 I/O PB6 A DMA Acknowledge 2 349 DEOP2 I/O PB7 A DMA EOP 2 64 83 AVCC Analog VCC 65 300 AVRH R R Analog Reference High 66 248 AN0 I/O PH0 B B ADC Input 0 393 67 82 AN1 I/O PH1 B B ADC Input 1 68 134 AN2 I/O PH2 B B ADC Input 2 69 34 AN3 I/O PH3 B B ADC Input 3 394 VSS 70 190 AN4 I/O PH4 B B ADC Input 4 71 247 AN5 I/O PH5 B B ADC Input 5 72 81 AN6 I/O PH6 B B ADC Input 6 73 133 AN7 I/O PH7 B B ADC Input 7 299 AVRL R Analog Reference Low 74 348 AVSS Analog VSS 75 246 DA0 O C C DAC Output 76 189 DA1 O C C DAC Output 77 132 ALARM I D D Alarm Comparator Input 78 392 VSS 79 347 VDD 80 298 ATG I/O PI3 A A ADC Trigger Input 81 245 TEST I E E Test Input 82 188 CPUTEST I E E Test Input 83 8 PGA401 PGA401 297 LTEST I E E Test Input (Continued) not connected MB91360G MB91360G Series (Continued) Pin No. Pin No. Pin Name I/O General Purpose IO Port Circuit Type FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 244 84 346 LED0 I/O PJ0 J J LED Port 0 85 187 LED1 I/O PJ1 J J LED Port 1 86 345 LED2 I/O PJ2 J J LED Port 2 391 VSS 390 87 243 LED3 I/O PJ3 J J LED Port 3 88 131 LED4 I/O PJ4 J J LED Port 4 89 296 LED5 I/O PJ5 J J LED Port 5 90 242 LED6 I/O PJ6 J J LED Port 6 91 186 LED7 I/O PJ7 J J LED Port 7 94 344 INT0 I/O PK0 A A Ext. Interrupt 0 95 295 INT1 I/O PK1 A A Ext. Interrupt 1 96 80 INT2 I/O PK2 A A Ext. Interrupt 2 93 389 VSS 97 33 INT3 I/O PK3 A A Ext. Interrupt 3 98 241 INT4 I/O PK4 A A Ext. Interrupt 4 99 130 INT5 I/O PK5 A A Ext. Interrupt 5 100 185 INT6 I/O PK6 A A Ext. Interrupt 6 101 294 INT7 I/O PK7 A A Ext. Interrupt 7 92 343 VDD 102 79 IN0 I/O PL0 A A ICU Input 0 103 129 IN1 I/O PL1 A A ICU Input 1 104 240 IN2 I/O PL2 A A ICU Input 2 110 388 VSS 105 32 IN3 I/O PL3 A A ICU Input 3 106 184 OUT0 I/O PL4 A A OCU Output 0 107 128 OUT1 I/O PL5 A A OCU Output 1 108 78 OUT2 I/O PL6 A A OCU Output 2 109 183 OUT3 I/O PL7 A A OCU Output 3 111 293 MD0 I T T Mode Pin 0 112 31 MD1 I T T Mode Pin 1 113 239 MD2 I T T Mode Pin 2 127 NMI I E not connected not connected Non maskable Interrupt (Continued) 9 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function VSS QFP208 QFP208 387 342 114 182 HST I E E Hardware Standby 77 RST I E Reset Pin 115 30 INIT I U U Initial Pin 116 292 MONCLK O G G System Clock Output 117 126 SELCLK I F F Clock Selection 118 76 VDD 119 29 X0 H H 4 MHz Oscillator Pin 120 291 X1 H H 4 MHz Oscillator Pin 341 VSS 28 ICLK IO L ICE CLK 238 ICS0 O G ICE Status 237 ICS1 O G ICE Status 75 ICS2 O G ICE Status 27 ICD0 I/O N ICE Data 386 VDD 180 ICD1 I/O N ICE Data 181 ICD2 I/O N ICE Data 124 ICD3 I/O N ICE Data 340 VSS 236 BREAK I O ICE Break 339 TDT0 I/O W Trace Data 125 TDT1 I/O W Trace Data 26 TDT2 I/O W Trace Data 74 TDT3 I/O W Trace Data 123 TDT4 I/O W Trace Data 290 TDT5 I/O W Trace Data 289 TDT6 I/O W Trace Data 25 TDT7 I/O W Trace Data 385 VSS3 338 VDD3 73 TDT8 I/O W Trace Data 10 PGA401 PGA401 235 TDT9 I/O W Trace Data (Continued) not connected MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 179 TDT10 TDT10 I/O W Trace Data 122 TDT11 TDT11 I/O W Trace Data 72 TDT12 TDT12 I/O W Trace Data 288 TDT13 TDT13 I/O W Trace Data 178 TDT14 TDT14 I/O W Trace Data 177 TDT15 TDT15 I/O W Trace Data 384 VSS3 24 TDT16 TDT16 I/O W Trace Data 337 TDT17 TDT17 I/O W Trace Data 71 TDT18 TDT18 I/O W Trace Data 287 TDT19 TDT19 I/O W Trace Data 234 TDT20 TDT20 I/O W Trace Data 382 70 TDT21 TDT21 I/O W Trace Data 121 TDT22 TDT22 I/O W Trace Data 23 TDT23 TDT23 I/O W Trace Data 383 VSS3 176 TDT24 TDT24 I/O W Trace Data 233 TDT25 TDT25 I/O W Trace Data 69 TDT26 TDT26 I/O W Trace Data 120 TDT27 TDT27 I/O W Trace Data 286 TDT28 TDT28 I/O W Trace Data 336 TDT29 TDT29 I/O W Trace Data 232 TDT30 TDT30 I/O W Trace Data 175 TDT31 TDT31 I/O W Trace Data 119 TDT32 TDT32 I/O W Trace Data 381 VSS3 335 VDD3 285 TDT33 TDT33 I/O W Trace Data 231 TDT34 TDT34 I/O W Trace Data 174 TDT35 TDT35 I/O W Trace Data 284 TDT36 TDT36 I/O W Trace Data 230 TDT37 TDT37 I/O W Trace Data 334 TDT38 TDT38 I/O W Trace Data (Continued) not connected 11 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 173 TDT39 TDT39 I/O W Trace Data 333 TDT40 TDT40 I/O W Trace Data 380 VSS3 379 229 TDT41 TDT41 I/O W Trace Data 118 TDT42 TDT42 I/O W Trace Data 283 TDT43 TDT43 I/O W Trace Data 228 TDT44 TDT44 I/O W Trace Data 172 TDT45 TDT45 I/O W Trace Data 332 TDT46 TDT46 I/O W Trace Data 282 TDT47 TDT47 I/O W Trace Data 68 TDT48 TDT48 I/O W Trace Data 378 VSS3 22 TDT49 TDT49 I/O W Trace Data 227 TDT50 TDT50 I/O W Trace Data 117 TDT51 TDT51 I/O W Trace Data 171 TDT52 TDT52 I/O W Trace Data 281 TDT53 TDT53 I/O W Trace Data 331 VDD3 67 TDT54 TDT54 I/O W Trace Data 116 TDT55 TDT55 I/O W Trace Data 226 TDT56 TDT56 I/O W Trace Data 377 VSS3 21 TDT57 TDT57 I/O W Trace Data 170 TDT58 TDT58 I/O W Trace Data 115 TDT59 TDT59 I/O W Trace Data 66 TDT60 TDT60 I/O W Trace Data 169 TDT61 TDT61 I/O W Trace Data 280 TDT62 TDT62 I/O W Trace Data 20 TDT63 TDT63 I/O W Trace Data 225 TDT64 TDT64 I/O W Trace Data 114 TDT65 TDT65 I/O W Trace Data 376 VSS3 330 not connected not connected (Continued) 12 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 168 TDT66 TDT66 I/O W Trace Data 65 TDT67 TDT67 I/O W Trace Data 19 TDT68 TDT68 I/O W Trace Data 279 TAD0 O X Trace Address 113 TAD1 O X Trace Address 64 TAD2 O X Trace Address 18 TAD3 O X Trace Address 278 TAD4 O X Trace Address 329 VSS3 17 TAD5 O X Trace Address 224 TAD6 O X Trace Address 223 TAD7 O X Trace Address 63 TAD8 O X Trace Address 16 TAD9 O X Trace Address 375 VDD3 166 TAD10 TAD10 O X Trace Address 167 TAD11 TAD11 O X Trace Address 111 TAD12 TAD12 O X Trace Address 328 VSS3 222 TAD13 TAD13 O X Trace Address 327 TAD14 TAD14 O X Trace Address 112 TAD15 TAD15 O X Trace Address 15 TWR O X Trace Control 62 TOE O X Trace Control 110 TCLK I/O W Trace Control 277 TCE1 O X Trace Control 276 TADSC O X Trace Control 14 EXRAM I P Trace Control 374 VSS 326 VDD 126 61 SGO I/O PM0 A A Sound Generator SGO 127 221 SGA I/O PM1 A A Sound Generator SGA 128 165 SDA I/O PM2 Y Y I2C SDA 129 109 SCL I/O PM3 Y Y I2C SCL (Continued) 13 MB91360G MB91360G Series (Continued) Pin No. Pin No. QFP208 QFP208 PGA401 PGA401 275 I/O General Purpose IO Port 60 Pin Name Circuit Type FV360GA FV360GA F361GA F361GA F362GA F362GA Function not connected VDD 32 kHz Oscillator Pin 121 164 X0A I I reserved should be connected to be VSS 122 163 X1A O I reserved should be left open 32 kHz Oscillator Pin 123 373 VSS 13 VDD 124 325 CPO not connected reserved should be left open not connected reserved should be connected to be VSS 125 274 220 371 130 58 SOT4 I/O PN0 A A SIO Output 131 108 SIN4 I/O PN1 A A SIO Input 132 12 SCK4 I/O PN2 A A SIO Clock 372 VSS 162 VDD 133 219 SIN3 I/O PN3 A A SIO Input 134 57 SOT3 I/O PN4 A A SIO Output 135 107 SCK3 I/O PN5 A A SIO Clock 273 VSS 324 VDD 136 218 OCPA0 I/O PO0 A A PPG Output 137 161 OCPA1 I/O PO1 A A PPG Output 138 106 OCPA2 I/O PO2 A A PPG Output 370 VSS 323 VDD 139 14 59 VCI 272 OCPA3 I/O PO3 A A not connected VSS not connected PPG Output (Continued) MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 140 217 OCPA4 I/O PO4 A A PPG Output 141 160 OCPA5 I/O PO5 A A PPG Output 271 VSS 144 216 VDD 142 322 OCPA6 I/O PO6 A A PPG Output 143 159 OCPA7 I/O PO7 A A PPG Output 146 321 TX0 I/O PP0 Q Q CAN 0 TX 145 369 VSS 368 147 215 RX0 I/O PP1 Q Q CAN 0 RX 148 105 TX1 I/O PP2 Q Q CAN 1 TX 149 270 RX1 I/O PP3 Q Q CAN 1 RX 214 VSS 158 VDD 150 320 TX2 I/O PP4 Q Q CAN 2 TX 151 269 RX2 I/O PP5 Q Q CAN 2 RX 56 TX3 I/O PP6 Q CAN 3 TX 367 VSS 11 VDD 213 RX3 I/O PP7 Q CAN 3 RX 152 104 SIN0 I/O PQ0 A A UART 0 Input 153 157 SOT0 I/O PQ1 A A UART 0 Output 268 VSS 319 VDD 154 55 SIN1 I/O PQ2 A A UART 1 Input 155 103 SOT1 I/O PQ3 A A UART 1 Output 156 212 SIN2 I/O PQ4 A A UART 2 Input 366 VSS 160 10 VDD VDD 157 156 SOT2 I/O PQ5 A A UART 2 Output 159 102 VCC3C C C Bypass Capacitor Pin 54 158 155 267 not connected not connected VSS not connected (Continued) 15 MB91360G MB91360G Series (Continued) Pin No. Pin No. Circuit Type Pin Name I/O General Purpose IO Port FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 162 9 PWM1P0 I/O PR0 K K SMC 0 163 211 PWM1M0 I/O PR1 K K SMC 0 164 101 PWM2P0 I/O PR2 K K SMC 0 161 365 HVSS 318 165 154 PWM2M0 I/O PR3 M M SMC 0 167 53 PWM1P1 I/O PR4 K K SMC 1 168 8 PWM1M1 I/O PR5 K K SMC 1 266 HVSS 166 100 HVDD 169 52 PWM2P1 I/O PR6 K K SMC 1 170 7 PWM2M1 I/O PR7 M M SMC 1 265 171 317 HVSS 6 HVDD 172 210 PWM1P2 I/O PS0 K K SMC 2 173 209 PWM1M2 I/O PS1 K K SMC 2 174 51 PWM2P2 I/O PS2 K K SMC 2 5 HVSS 364 175 152 PWM2M2 I/O PS3 M M SMC 2 177 153 PWM1P3 I/O PS4 K K SMC 3 178 98 PWM1M3 I/O PS5 K K SMC 3 181 316 HVSS 176 208 HVDD 179 315 PWM2P3 I/O PS6 K K SMC 3 180 99 PWM2M3 I/O PS7 M M SMC 3 4 50 VSS 182 97 VDD 183 264 D0 I/O Q Q Ext. Bus Data Bit 0 184 263 D1 I/O Q Q Ext. Bus Data Bit 1 185 3 D2 I/O Q Q Ext. Bus Data Bit 2 363 VSS not connected not connected not connected not connected (Continued) 16 MB91360G MB91360G Series (Continued) Pin No. Pin No. Pin Name I/O General Purpose IO Port Circuit Type FV360GA FV360GA F361GA F361GA F362GA F362GA Function QFP208 QFP208 PGA401 PGA401 314 186 49 D3 I/O Q Q Ext. Bus Data Bit 3 187 207 D4 I/O Q Q Ext. Bus Data Bit 4 188 151 D5 I/O Q Q Ext. Bus Data Bit 5 189 96 D6 I/O Q Q Ext. Bus Data Bit 6 190 48 D7 I/O Q Q Ext. Bus Data Bit 7 191 262 D8 I/O Q Q Ext. Bus Data Bit 8 192 150 D9 I/O Q Q Ext. Bus Data Bit 9 193 149 D10 I/O Q Q Ext. Bus Data Bit 10 362 VSS 194 2 D11 I/O Q Q Ext. Bus Data Bit 11 195 313 D12 I/O Q Q Ext. Bus Data Bit 12 196 47 D13 I/O Q Q Ext. Bus Data Bit 13 197 261 D14 I/O Q Q Ext. Bus Data Bit 14 200 206 D15 I/O Q Q Ext. Bus Data Bit 15 198 360 VDD 201 46 D16 I/O Q Q Ext. Bus Data Bit 16 202 95 D17 I/O Q Q Ext. Bus Data Bit 17 203 1 D18 I/O Q Q Ext. Bus Data Bit 18 199 361 VSS 204 148 D19 I/O Q Q Ext. Bus Data Bit 19 205 205 D20 I/O Q Q Ext. Bus Data Bit 20 206 45 D21 I/O Q Q Ext. Bus Data Bit 21 207 94 D22 I/O Q Q Ext. Bus Data Bit 22 208 260 D23 I/O Q Q Ext. Bus Data Bit 23 1 312 D24 I/O Q Q Ext. Bus Data Bit 24 2 204 D25 I/O Q Q Ext. Bus Data Bit 25 3 147 D26 I/O Q Q Ext. Bus Data Bit 26 4 93 D27 I/O Q Q Ext. Bus Data Bit 27 359 VSS 311 5 259 D28 I/O Q Q Ext. Bus Data Bit 28 6 203 D29 I/O Q Q Ext. Bus Data Bit 29 7 146 D30 I/O Q Q Ext. Bus Data Bit 30 8 258 D31 I/O Q Q Ext. Bus Data Bit 31 not connected not connected 17 MB91360G MB91360G Series s I/O CIRCUIT TYPE Type Circuit type P A R Digital output N Remarks · I/O, CMOS Automotive Schmitt-Trigger Input, STOP control, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input Stop control Analog input R P Digital output R N · I/O, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control, IOH = 4 mA, IOL = 4 mA Digital output B VSS Digital input Stop control · Analog output VCC P C N VSS Analog output · Analog Input VCC P D R N VSS Analog input (Continued) 18 MB91360G MB91360G Series (Continued) Type Circuit type VCC VCC P E Remarks · CMOS Schmitt-Trigger Input, Pullup Resistor: 50 k P N R VSS VSS Digital input · CMOS Schmitt-Trigger Input VCC P F R N VSS Digital input · Tristate Output, IOH = 4 mA, IOL = 4 mA VCC P Digital output N Digital output G VSS · 4 MHz Oscillator Pin X1 Clock input H X0 Stop control (Continued) 19 MB91360G MB91360G Series (Continued) Type Circuit type Remarks · 32 kHz Oscillator Pin X1A Clock input I X0A Stop control P J R Digital output N · I/O, CMOS Automotive Schmitt-Trigger Input, STOP control (LED) , IOH = 14 mA, IOL = 24 mA Digital output VSS Digital input Stop control P K R Digital output N · I/O, CMOS Automotive Schmitt-Trigger Input, STOP control (SMC) , IOH = 30 mA, IOL = 30 mA · Typ. slew rate of 40 ns Digital output VSS Digital input Stop control VCC P L R Digital output N · I/O, CMOS Input; 5 V or 3 V input, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input (Continued) 20 MB91360G MB91360G Series (Continued) Type Circuit type Remarks Analog input R P Digital output R N · I/O, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control (SMC) , IOH = 30 mA, IOL = 30 mA · Typ. slew rate of 40 ns Digital output M VSS Digital input Stop control Digital input VCC R P N Digital output N N · I/O, CMOS Input, Pulldown Resistor: 50 k, 5 V or 3 V input, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input VCC R · CMOS Input, Pulldown Resistor: 50 k, 5 V or 3 V input VCC P O N N VSS VSS · CMOS Input; 3 V input VCC P P R N VSS Digital input (Continued) 21 MB91360G MB91360G Series (Continued) Type Circuit type Remarks P Q N R Digital output · I/O CMOS Input, STOP control, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input Stop control VCC P S P N R Digital output · I/O, CMOS Schmitt-Trigger Input, STOP control, Pullup Resistor : 10 k, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input Stop control · CMOS Input · can withstand high VID for flash programming T Control signal MD Input R VCC VCC P U P · CMOS Schmitt-Trigger Input, Pullup Resistor: 50 k, 3 V and 5 V input to the core N R VSS VSS Digital input (Continued) 22 MB91360G MB91360G Series (Continued) Type Circuit type Remarks VCC P V P N R Digital output · I/O, CMOS Schmitt-Trigger Input, STOP control, Pullup Resistor: 50 k, IOH = 4 mA, IOL = 4 mA Digital output VSS Digital input Stop control · I/O, CMOS Input; 3 V input 3V P W R Digital output N Digital output VSS Digital input · Tristate Output, 3 V 3V P Digital output N Digital output X VSS P Y R Digital output N · I/O CMOS Input, STOP control, IOH = 3 mA, IOL = 3 mA, in I2C mode operating as open drain outputs Digital output VSS Digital input Stop control Note : Symbols used in circuit types (Common to all circuit diagrams) P : P channel transistor N : N channel transistor R : Diffusion resistor 23 MB91360G MB91360G Series Circuit Type Description A B I/O, IOH = 4 mA / IOL = 4 mA, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control C Analog Output D Analog Input E CMOS Schmitt-Trigger Input, Pull-up Resistor: 50 k, F CMOS Schmitt-Trigger Input G Tristate Output, IOH = 4 mA / IOL = 4 mA H 4 MHz Oscillator Pin I 32 kHz Oscillator pin J I/O, IOH = 14 mA / IOL = 24 mA, CMOS Automotive Schmitt-Trigger Input, STOP control (LED) K I/O, IOH = 30 mA / IOL = 30 mA, CMOS Automotive Schmitt-Trigger Input, STOP control, slew rate improved for EMC (SMC) L I/O, IOH = 4 mA / IOL = 4 mA, CMOS Input; 5 V or 3 V input M I/O, IOH = 30 mA / IOL = 30 mA, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control, slew rate improved for EMC (SMC) N I/O, IOH = 4 mA / IOL = 4 mA, CMOS Input, Pulldown Resistor: 50 k,; 5 V or 3 V input O CMOS Input, Pulldown Resistor: 50 k,; 5 V or 3 V input P CMOS Input; 3 V input Q I/O, IOH = 4 mA / IOL = 4 mA, CMOS Input, STOP control R AVRL / AVRH Input S I/O, IOH = 4 mA / IOL = 4 mA, CMOS Input, STOP control, Pull-up Resistor: 10 k, T CMOS Input, can withstand VID for flash programming U CMOS Schmitt-Trigger Input, Pull-up Resistor: 50 k, 3.3 V and 5 V inputs to core W I/O, IOH = 4 mA / IOL = 4 mA, CMOS Input; 3 V input X Tristate Output, IOH = 4 mA / IOL = 4 mA, 3 V Y 24 I/O, IOH = 4 mA / IOL = 4 mA, CMOS Automotive Schmitt-Trigger Input, STOP control I/O, IOH = 3 mA / IOL = 3 mA (I2C) , CMOS Input, STOP control MB91360G MB91360G Series s HANDLING DEVICES 1. Preventing latch-up Latch-up may occur in a CMOS IC if a voltage greater than VDD or less than VSS is applied to an input or output pin or if the voltage applied between VDD and VSS exceeds the rating. If latch-up occurs, the power supply current increases rapidly resulting in thermal damage to circuit elements. Therefore, ensure that maximum ratings are not exceeded in circuit operation. 2. Connecting unused pins Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the device. Therefore they must be tied to VDD or VSS through resistors. In this case those resistors should be more than 2 KOhm. Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above described connection. The resistor of more than 2 KOhm is used to limit currents through the protection diodes. In case of voltages at the not used pin of 0.3 V or more below VSS or 0.3 V or more above VDD currents which could cause latch-up will flow through those diodes. 3. External reset input When inputting an "L" level to the INIT pin, hold this low level at the INIT pin long enough so that after release of the low level at INIT and the passing of the built in waiting time stable oscillation of the oscillation circuit is achieved. INIT must be pulled low for at least 8 cycles of the 4 MHz oscillation clock. 4. Power supply pins All VDD pins should be connected to the same potential (exception can be the external bus interface on F361GA F361GA and F362GA F362GA) . The analogue supply voltage (AVCC) must not be turned on before the digital supply voltage. If the external bus interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital voltage has been switched on. If the supply voltage to the external bus interface is switched off (it may not be tristate but should be pulled low) it must be made sure that all related signals do not have a voltage higher than this pulled down supply. When multiple VDD and VSS pins are provided, be sure to connect all VDD and VSS pins to the power supply or ground externally. Although pins at the same potential are connected together in the internal device design so as to prevent malfunctions such as latch-up, connecting all VDD and VSS pins appropriately minimizes unwanted radiation, prevents malfunction of strobe signals due to increases in the ground level, and keeps the overall output current rating. Also, take care to connect VDD and VSS to current source in the lowest possible impedance. Connection of a ceramic bypass capacitor of approximately 0.1 µF between VDD and VSS close to the device is recommended. The MB91360G MB91360G series contains a regulator. To use the device with the 5-V power supply, supply 5-V power to the VCC pins and be sure to connect a bypass capacitor of 10 µF parallel to 10 nF to the VCC3C pin for the regulator. [Use with 5-V power supply] 5V VCC 5V AVCC VCC3C 10 µF 10 nF AVRH AVSS VSS GND 25 MB91360G MB91360G Series 5. Crystal oscillator circuit Noise in the vicinity of the X0 and X1 pins can be a cause of device malfunction. Design the circuit board so that X0, X1, the crystal oscillator (or ceramic oscillator) , and the bypass capacitor to ground are located as close to the device as possible. A printed circuit board design that surrounds the X0 and X1 pins with ground provides for stable operation and is strongly recommended. 6. Mode pins Connect the mode pins (MD0 to MD2) directly to VDD or VSS. To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to VDD or VSS and to provide a low-impedance connection. 7. Turning the power supply on Immediately after power on always execute INIT at the INIT pin (start with a low level at the INIT pin) . Hold this low level at the INIT pin long enough so that after release of the low level at INIT and the passing of the built in waiting time stable oscillation of the oscillation circuit is achieved. INIT must be pulled low for at least 8 cycles of the 4 MHz oscillation clock. The analogue supply voltage (AVCC) must not be turned on before the digital supply voltage. If the external bus interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital voltage has been switched on. 8. A state in turning power on Output pin level is not guranteed while supply voltage does not reach minimum operation voltage in turning power on. 26 MB91360G MB91360G Series s BLOCK DIAGRAM Clock Generation FR50 Core User RAM D-bus Watchdog Timer 32 Instruction Cache/RAM 32 Bit Search Module Boot ROM 2 KB F-bus RAM 32 DMA Controller Bus Converter 32 on FV360GA FV360GA, F362GA F362GA Flashmemory on F361GA F361GA 32 External Bus Interface R-Bus Adapter 16 SIO Prescaler/ SIO ADC DAC CAN External Interrupt U-Timer/ UART Subclock Calibration I2C Reload Timer Alarm Comparator Real Time Clock Power Down Reset ICU FreeRunning Timer OCU Voltage regulator LED Sound Generator Stepper Motor Control Prog. Pulse Generator 27 MB91360G MB91360G Series s CPU CORE 1. Memory Space 00 : 0000 Direct 00 : 03FF Direct (short) addressing 0.0FF : Byte access 0.1FF : Halfword access (16 bit) 0.3FF : Word access (32 bit) IO Area 00 : 07FF 00 : 1000 DMA Internal memory area 00 : 1024 01 : 1000 I-RAM 01 : 1000 - 01 : 1400 on F361GA F361GA 01 : 1FFF 03 : C000 D-bus RAM 03 : D000 - 03 : FFFF on F361GA F361GA, F362GA F362GA 03 : FFFF 04 : 0000 F-bus RAM 04 : 0000 - 04 : 0FFF on F361GA F361GA, F362GA F362GA Boot ROM 0F : F000 - 0F : F7FF on F361GA F361GA 04 : 3FFF 05 : 0000 05 : 07FF 08 : 0000 128 K Flash Memory on F-bus (FV360GA FV360GA, F362GA F362GA) 128 K 128 K 64 K 0F : 4000 0F : FFFF 16 K 16 K Bootsector 32 K Fixed Reset Vector 10 : 0000 CAN 10 : 07FF 18 : 0000 128 K 128 K 128 K Flash Memory on external bus (F361GA F361GA) 64 K 16 K 1F : 4000 1F : FFFF 28 16 K 32 K Bootsector Addresses for CAN and flash memory on external bus depend on settings for the chip select areas CS7 and CS1 respectively. The addresses given here are valid for the CS1 and CS7 settings done in the Boot ROM. MB91360G MB91360G Series 2. Dedicated Registers Each of the dedicated registers is used for a particular purpose. The dedicated registers consist of the program counter (PC) , program status (PS) , table base register (TBR) , return pointer (RP) , system stack pointer (SS P) , user stack pointer (USP) , and multiplication and division result registers (MDH/MDL) . 32 bits Program counter Program status Initial value XXXX XXXXH (Indeterminate) PC PS Table base register 000F FC00H FC00H TBR Return pointer XXXX XXXXH (Indeterminate) RP System stack pointer SSP 0000 0000H 0000H User stack pointer USP XXXX XXXXH (Indeterminate) Multiplication and division results resisters MDH XXXX XXXXH (Indeterminate) MDL XXXX XXXXH (Indeterminate) (1) Program status (PS) Bit position 31 20 16 10 0 8 7 ILM SCR CCR CCR : Condition Code Register SCR : System Condition Code Register ILM : Interrupt Level Mask 29 MB91360G MB91360G Series (2) Condition Code Register (CCR) (Bit) 7 6 5 4 3 2 1 0 Initial value S I N Z V C -00XXXXB -00XXXXB (3) System Condition Code Register (SCR) (Bit) 10 9 8 Initial value D1 D0 T XX0B 19 18 17 (4) Interrupt Level Mask Register (ILM) (Bit) 20 16 ILM4 ILM3 ILM2 ILM1 ILM0 30 Initial value 01111B 01111B MB91360G MB91360G Series 3. General-Purpose Registers The general-purpose registers are CPU registers R0 to R15. The register are used as the accumulator for operations and as pointers (a field indicating an address) for memory access. The user can specify the purpose for which the general-purpose registers are used. Register bank structure 32-bits R0 Initial value XXXX XXXXH R1 R12 R13 AC (Accumulator) R14 FP (Frame Pointer) XXXX XXXXH R15 SP (Stack Pointer) 0000 0000H 0000H Among 16 general-purpose registers, the following registers assume a special purpose. This enhances some instructions. R13 : Virtual accumulator (AC) R14 : Frame pointer (FP) R15 : Stack pointer (SP) The initial value of R0 to R14 after a reset is indeterminate. The initial value of R15 is 00000000H 00000000H (SSP value) . 31 MB91360G MB91360G Series s MODE SETTING The FR50 series of devices uses mode pins (MD2 to MD0) and a mode register (MODR) to set the operation mode. (1) Mode Pins Three mode pins (MD2 to MD0) are used to specify the reset mode vector access area. Mode Pins Reset vector Mode name Remarks access area MD2 MD1 MD0 0 0 0 Internal ROM mode vector Internal 0 0 1 External ROM mode vector External remaining settings The mode register is used to set the bus width. Reserved (2) Mode Register (MODR) The data to be written to 0000_7FDH using mode vector fetch is called mode data. MODR is located at 0000_07FDH 07FDH. After an operation mode has been set in MODR, the device operates in this operation mode. MODR is set only when a reset factor (INIT level) occurs. User programs cannot write data to MODR. < Mode Register (MODR) > Address 0000 07FDH 07FDH 7 6 5 4 3 2 1 0 0 0 0 0 0 ROMA WTH1 WTH0 Initial value XXXXXXXX Operation mode setting bit [Bits 7 to 3] : (Reserved bits) Always set 00000 at bits 7 to 3. Operation is not guaranteed when other values are set. [Bit 2] : ROMA (internal ROM enable bit) The ROMA bit is used to set whether to validate the internal ROM area (Fbus memory area) . ROMA Function Remarks 0 1 32 External ROM mode Internal ROM mode Access to the Fbus area is external. MB91360G MB91360G Series [Bits 1 and 0] : WTH1 and WTH0 (bus width/single chip mode specifying bits) The WTH1 and WTH0 bits are used to set the bus width (valid when operation mode is external bus mode) and the single chip mode. When the operation mode is the external bus mode, this value is set at the BW1 and BW0 bits of AMD0 (CS0 area) . WTH1 WTH0 Function Remarks 0 0 8-bit bus width External bus mode 0 1 16-bit bus width External bus mode 1 0 32-bit bus width External bus mode 1 1 Single chip mode (3) Fixed Vector If MB91360 MB91360 series devices are started in mode MD[2 : 0] = 000, the internal fixed mode vector (FMV = 0x06) and the fixed reset vector are used. The fixed reset vector points to the start address of the internal Boot ROM. This enables access to the F-bus area, to the internal CAN modules and the internal flash memory. See also section Boot ROM. 33 MB91360G MB91360G Series s I/O MAP Address Register +0 +1 +2 +3 000000H 000000H reserved reserved reserved reserved 000004H 000004H reserved reserved reserved PDR7 [R/W] -111 - - - - 000008H 000008H PDR8 [R/W] - - - - - XX - PDR9 [R/W] XXXXXXX1 PDRB [R/W] - - - - - XXX Block T-unit Port Data Register 00000CH 00000CH 000010H 000010H PDRG [R/W] XXXXXXXX PDRH [R/W] XXXXXXXX PDRI [R/W] X-X- PDRJ [R/W] XXXXXXXX 000014H 000014H PDRK [R/W] XXXXXXXX PDRL [R/W] XXXXXXXX PDRM [R/W] - - - - XXXX PDRN [R/W] - - XXXXXX 000018H 000018H PDRO [R/W] XXXXXXXX PDRP [R/W] - - XXXXX PDRQ [R/W] - - XXXXX PDRR [R/W] XXXXXXXX 00001CH 00001CH PDRS [R/W] XXXXXXXX 000020H 000020H to 00003CH 00003CH 000040H 000040H EIRR [R/W] 00000000 ENIR [R/W] 00000000 000044H 000044H DICR [R/W] -0 HRCL [R/W] 0 - - 11111 R-bus Port Data Register Reserved ELVR [R/W] 00000000 00000000 CLKR2 [R/W] - - - - - 000 reserved 000048H 000048H TMRLR0 [W] XXXXXXXX XXXXXXXX TMR0 [R] XXXXXXXX XXXXXXXX 00004CH 00004CH TMCSR0 [R/W] - - - - 0000 - - - 00000 000050H 000050H TMRLR1 [W] XXXXXXXX XXXXXXXX TMR1 [R] XXXXXXXX XXXXXXXX 000054H 000054H TMCSR1 [R/W] - - - - 0000 - - - 00000 000058H 000058H TMRLR2 [W] XXXXXXXX XXXXXXXX TMR2 [R] XXXXXXXX XXXXXXXX 00005CH 00005CH TMCSR2 [R/W] - - - - 0000 - - - 00000 000060H 000060H SSR0 [R/W] 00001 - 00 SIDR0 [R/W] XXXXXXXX SCR0 [R/W] 00000100 SMR0 [R/W] 00 - - 0 - 0 - 000064H 000064H ULS0 [R/W] - - - - 0000 Ext int/NMI DLYI/I-unit RTC Reload Timer 0 Reload Timer 1 Reload Timer 2 UART0 (Continued) 34 MB91360G MB91360G Series (Continued) Address 000068H 000068H Register +0 +1 +2 DRCL0 [W] - UTIM0/UTIMR0 [R/W] 00000000 00000000 +3 UTIMC0 [R/W] 0 - - - 0 - 01 00006CH 00006CH SSR1 [R/W] 00001 - 00 SIDR1 [R/W] XXXXXXXX SCR1 [R/W] 00000100 SMR1 [R/W] 00 - - 0 - 0 - 000070H 000070H ULS1 [R/W] - - - - 0000 UTIMC1 [R/W] 0 - - - - - 01 U-TIMER 0 DRCL1 [W] - Block 000074H 000074H UTIM1/UTIMR1 [R/W] 00000000 00000000 000078H 000078H SSR2 [R/W] 00001 - 00 SIDR2 [R/W] XXXXXXXX SCR2 [R/W] 00000100 SMR2 [R/W] 00 - - 0 - 0 - 00007CH 00007CH ULS2 [R/W] - - - - 0000 UART1 U-TIMER 1 UART2 000080H 000080H UTIM2/UTIMR2 [R/W] 00000000 00000000 DRCL2 [W] - UTIMC2 [R/W] 0 - - - 0 - 01 U-TIMER2 000084H 000084H SMCS0 [R/W] 00000010 - - - - 00-0 SES0 [R/W] - - - - - - 00 SDR0 [R/W] 00000000 SIO 0 000088H 000088H SMCS1 [R/W] 00000010 - - - - 00 - 0 SES1 [R/W] - - - - - - 00 SDR1 [R/W] 00000000 SIO 1 CDCR1 [R/W] 0 - - - 1111 Reserved SIO 0/1 Prescaler 00008CH 00008CH CDCR0 [R/W] 0 - - - 1111 Reserved 000090H 000090H Reserved 000094H 000094H IBCR [R/W] 00000000 IBSR [R] 00000000 IADR [R/W] -XXXXXXX ICCR [R/W] - - 0XXXXX I2C (old) 000098H 000098H IDAR [R/W] XXXXXXXX IDBL [R/W] -0 new I2C from addr 0x184 00009CH 00009CH ADMD [R/W, W] - - - X0000 X0000 ADCH [R/W] 00000000 ADCS [R/W, W] 0000 - - 00 ADBL [R/W] -0 0000A0H 0000A0H 0000A4H 0000A4H 0000A8H 0000A8H 0000ACH 0000ACH ADCD [R/W] 000000XX 000000XX XXXXXXXX DACR [R/W] - - - - - 000 DADR1 [R/W] - - - - - - XX XXXXXXXX IOTDBL0 [R/W] - - - - - 000 ICS01 ICS01 [R/W] 00000000 DADR0 [R/W] - - - - - - XX XXXXXXXX DDBL [R/W] -0 IOTDBL1 [R/W] - - - - - 000 A/D Converter DAC ICS23 ICS23 [R/W] 00000000 0000B0H 0000B0H IPCP0 [R] XXXXXXXX XXXXXXXX IPCP1 [R] XXXXXXXX XXXXXXXX 0000B4H 0000B4H IPCP2 [R] XXXXXXXX XXXXXXXX Input Capture 0, 1, 2, 3 IPCP3 [R] XXXXXXXX XXXXXXXX (Continued) 35 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 0000B8H 0000B8H OCS0/1 [R/W] - - - 0 - - 00 0000 - - 00 reserved 0000BCH 0000BCH OCCP0 [R/W] XXXXXXXX XXXXXXXX OCCP1 [R/W] XXXXXXXX XXXXXXXX 0000C0H 0000C0H OCCP2 [R/W] XXXXXXXX XXXXXXXX Block OCCP3 [R/W] XXXXXXXX XXXXXXXX 0000C4H 0000C4H Output Compare 0, 1, 2.3 Reserved 0000C8H 0000C8H TCDT0 [R/W] XXXXXXXX XXXXXXXX TCCS0 [R/W] - 0000000 Free Running Counter 0 for ICU/OCU 0000CCH 0000CCH TCDT1 [R/W] XXXXXXXX XXXXXXXX TCCS1 [R/W] - 0000000 Free Running Counter 1 for ICU/OCU 0000D0H 0000D0H ZPD0 [R/W] 00000010 PWC0 [R/W] - - 000 - - 0 ZPD1 [R/W] 00000010 PWC1 [R/W] 00000 - - 0 SMC 0, 1 0000D4H 0000D4H ZPD2 [R/W] 00000010 PWC2 [R/W] - - 000 - - 0 ZPD3 [R/W] 00000010 PWC3 [R/W] 00000 - - 0 SMC 2, 3 0000D8H 0000D8H PWC20 PWC20 [R/W] XXXXXXXX PWC10 PWC10 [R/W] XXXXXXXX PWS20 PWS20 [R/W] - 0000000 PWS10 PWS10 [R/W] - - 000000 SMC 0 0000DCH 0000DCH PWC21 PWC21 [R/W] XXXXXXXX PWC11 PWC11 [R/W] XXXXXXXX PWS21 PWS21 [R/W] - 0000000 PWS11 PWS11 [R/W] - - 000000 SMC 1 0000E0H 0000E0H PWC22 PWC22 [R/W] XXXXXXXX PWC12 PWC12 [R/W] XXXXXXXX PWS22 PWS22 [R/W] - 0000000 PWS12 PWS12 [R/W] - - 000000 SMC 2 0000E4H 0000E4H PWC23 PWC23 [R/W] XXXXXXXX PWC13 PWC13 [R/W] XXXXXXXX PWS23 PWS23 [R/W] - 0000000 PWS13 PWS13 [R/W] - - 000000 SMC 3 0000E8H 0000E8H SMDBL0 [R/W] -0 SMDBL1 [R/W] -0 SMDBL2 [R/W] -0 SMDBL3 [R/W] -0 SMC 0, 1, 2, 3 0000ECH 0000ECH SGDBL [R/W] -0 0000F0H 0000F0H SGAR [R/W] 00000000 SGFR [R/W] XXXXXXXX 0000F4H 0000F4H WTDBL [R/W] -0 0000F8H 0000F8H 0000FCH 0000FCH WTHR [R/W] - - - 00000 000100H 000100H 000104H 000104H SGCR [R, R/W] 0 - - - - - 00 000 - - 000 SGTR [R/W] XXXXXXXX SGDR [R/W] XXXXXXXX WTCR [R, R/W] 00000000 000 - 0000 WTBR [R/W] - - XXXXXX XXXXXXXX XXXXXXXX WTMR [R/W] - - 000000 Sound generator WTSR [R/W] - - 000000 Real Time Clock (WatchTimer) TMRLR3 [W] XXXXXXXX XXXXXXXX TMR3 [R] XXXXXXXX XXXXXXXX TMCSR3 [R/W] - - - - XX - - - - - XXXXX Reload Timer 3 (Continued) 36 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 Block 000108H 000108H TMRLR4 [W] XXXXXXXX XXXXXXXX TMR4 [R] XXXXXXXX XXXXXXXX 00010CH 00010CH TMCSR4 [R/W] - - - - XX - - - - - XXXXX 000110H 000110H TMRLR5 [W] XXXXXXXX XXXXXXXX TMR5 [R] XXXXXXXX XXXXXXXX 000114H 000114H TMCSR5 [R/W] - - - - XX - - - - - XXXXX 000118H 000118H GCN10 GCN10 [R/W] 00110010 00010000 PDBL0 [R/W] - - - 00000 GCN20 GCN20 [R/W] - - - - 0000 PWM Control 0 00011CH 00011CH GCN11 GCN11 [R/W] 00110010 00010000 PDBL1 [R/W] - - - 00000 GCN21 GCN21 [R/W] - - - - 0000 PWM Control 1 000120H 000120H PTMR0 [R] 11111111 11111111 000124H 000124H PDUT0 [W] XXXXXXXX XXXXXXXX 000128H 000128H PTMR1 [R] 11111111 11111111 00012CH 00012CH PDUT1 [W] XXXXXXXX XXXXXXXX 000130H 000130H PTMR2 [R] 11111111 11111111 000134H 000134H PDUT2 [W] XXXXXXXX XXXXXXXX 000138H 000138H PTMR3 [R] 11111111 11111111 00013CH 00013CH PDUT3 [W] XXXXXXXX XXXXXXXX 000140H 000140H PTMR4 [R] 11111111 11111111 000144H 000144H PDUT4 [W] XXXXXXXX XXXXXXXX 000148H 000148H PTMR5 [R] 11111111 11111111 00014CH 00014CH PDUT5 [W] XXXXXXXX XXXXXXXX 000150H 000150H PTMR6 [R] 11111111 11111111 000154H 000154H PDUT 6 [W] XXXXXXXX XXXXXXXX PCSR0 [W] XXXXXXXX XXXXXXXX PCNH0 [R/W] 0000000 - PCNL0 [R/W] 000000 - 0 PCSR1 [W] XXXXXXXX XXXXXXXX PCNH1 [R/W] 0000000 - PCNL1 [R/W] 000000 - 0 PCSR2 [W] XXXXXXXX XXXXXXXX PCNH2 [R/W] 0000000 - PCNL2 [R/W] 000000 - 0 PCSR3 [W] XXXXXXXX XXXXXXXX PCNH3 [R/W] 0000000 - PCNL3 [R/W] 000000 - 0 PCSR4 [W] XXXXXXXX XXXXXXXX PCNH4 [R/W] 0000000 - PCNL4 [R/W] 000000 - 0 PCSR5 [W] XXXXXXXX XXXXXXXX PCNH5 [R/W] 0000000 - PCNL5 [R/W] 000000 - 0 PCSR6 [W] XXXXXXXX XXXXXXXX PCNH6 [R/W] 0000000 - PCNL6 [R/W] 000000 - 0 Reload Timer 4 Reload Timer 5 PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 (Continued) 37 MB91360G MB91360G Series (Continued) Address Register +0 +1 000158H 000158H PTMR7 [R] 11111111 11111111 00015CH 00015CH +2 PDUT7 [W] XXXXXXXX XXXXXXXX +3 PCSR7 [W] XXXXXXXX XXXXXXXX PCNH7 [R/W] 0000000 - PCNL7 [R/W] 000000 - 0 000160H 000160H Block PWM7 Reserved 000164H 000164H CMCR [R/W] 11111111 0000000 CMPR [R/W] - - - -1001 1 - - -0001 000168H 000168H CMLS0 [R/W] 01110111 1111111 CMLS1 [R/W] 01110111 1111111 00016CH 00016CH CMLS2 [R/W] 01110111 1111111 CMLS3 [R/W] 01110111 1111111 000170H 000170H CMLT0 [R/W] - - - - -100 00000010 CMLT1 [R/W] 11110100 00000010 000174H 000174H CMLT2 [R/W] - - - - -100 00000010 CMLT3 [R/W] - - - - -100 00000010 000178H 000178H CMAC [R/W] 11111111 1111111 CMTS [R/W] - -000001 01111111 Clock Modulation 00017CH 00017CH PDRCR [R/W] - - - - - 000 Power down reset 000180H 000180H ACCDBL[R/W] -0 ACSR [R, R/W] - - - XXX00 XXX00 Alarm comparator 000184H 000184H IBCR2 [R/W, W] 00000000 IBSR2 [R] 00000000 ITBAH [R/W] - - - - - - 00 ITBAL [R/W] 00000000 000188H 000188H ITMKH [R/W, W] 00 - - - - 11 ITMKL [R/W] 11111111 ISMK [R/W] 01111111 ISBA [R/W] - 0000000 00018CH 00018CH IDARH [-] 00000000 IDAR2 [R/W] 00000000 ICCR2 [R/W] - 0011111 IDBL2 (*) [R/W] -0 000190H 000190H CUCR [R, R/W] - - - - - - - - - - - 0 - -00 CUTD [R/W] 10000000 00000000 000194H 000194H CUTR1 [R] - - - - - - - - 00000000 CUTR2 [R] 00000000 00000000 000198H 000198H to 0001F8H 0001F8H 0001FCH 0001FCH I2C (new) Calibration Unit of 32 kHz oscillator Reserved F362MD F362MD [R/W] 00000000 000200H 000200H DMACA0 [R/W] 00000000 0000XXXX 0000XXXX XXXXXXXX XXXXXXXX 000204H 000204H DMACB0 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX F362GA F362GA Mode Register DMAC * : Old and new I2C share this bit. (Continued) 38 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 000208H 000208H DMACA1 [R/W] 00000000 0000XXXX 0000XXXX XXXXXXXX XXXXXXXX 00020CH 00020CH DMACB1 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX 000210H 000210H DMACA2 [R/W] 00000000 0000XXXX 0000XXXX XXXXXXXX XXXXXXXX 000214H 000214H DMACB2 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX 000218H 000218H DMACA3 [R/W] 00000000 0000XXXX 0000XXXX XXXXXXXX XXXXXXXX 00021CH 00021CH DMACB3 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX 000220H 000220H DMACA4 [R/W] 00000000 0000XXXX 0000XXXX XXXXXXXX XXXXXXXX 000224H 000224H DMACB4 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX 000228H 000228H to 00023CH 00023CH 000240H 000240H DMACR [R/W] 00 - - 0000 - - - - - - - - - - - - - - - - - - - - - - - - 000244H 000244H to 0002FCH 0002FCH 000300H 000300H IRBS 00000000 00000001 00100000 - - - - - - - - Block 000304H 000304H 0003E4H 0003E4H 0003E8H 0003E8H to 0003ECH 0003ECH Reserved ISIZE [R/W] - - - - - -11 000308H 000308H to 0003E0H 0003E0H DMAC Reserved ICHRC 0-000000 Instruction Cache Instruction Cache Reserved (Continued) 39 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 0003F0H 0003F0H BSD0 [W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003F4H 0003F4H BSD1 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003F8H 0003F8H BSDC [W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0003FCH 0003FCH Block BSRR [R] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Bit Search Module 000400H 000400H DDRG [R/W] 00000000 DDRH [R/W] 00000000 DDRI [R/W] - - - -0- - - DDRJ [R/W] 00000000 000404H 000404H DDRK [R/W] 00000000 DDRL [R/W] 00000000 DDRM [R/W] - - - -0000 DDRN [R/W] - -000000 000408H 000408H DDRO [R/W] 00000000 DDRP [R/W] - - - -0000 DDRQ [R/W] - -000000 DDRR [R/W] 00000000 00040CH 00040CH DDRS [R/W] 00000000 000410H 000410H PFRG [R/W] 00000000 PFRH [R/W] 00000000 PFRI [R/W] - - - -0- - - PFRJ [R/W] 00000000 000414H 000414H PFRK [R/W] 00000000 PFRL [R/W] 00000000 PFRM [R/W] - - - -0000 PFRN [R/W] - -000000 000418H 000418H PFRO [R/W] 00000000 PFRP [R/W] 00000000 PFRQ [R/W] - -000000 PFRR [R/W] 00000000 00041CH 00041CH PFRS [R/W] 00000000 000420H 000420H to 00043CH 00043CH R-bus Port Direction Register R-bus Port Function Register Reserved 000440H 000440H ICR00 ICR00 [R, R/W] - - -11111 ICR01 ICR01 [R, R/W] - - -11111 ICR02 ICR02 [R, R/W] - - -11111 ICR03 ICR03 [R, R/W] - - -11111 000444H 000444H ICR04 ICR04 [R, R/W] - - -11111 ICR05 ICR05 [R, R/W] - - -11111 ICR06 ICR06 [R, R/W] - - -11111 ICR07 ICR07 [R, R/W] - - -11111 000448H 000448H ICR08 ICR08 [R, R/W] - - -11111 ICR09 ICR09 [R, R/W] - - -11111 ICR10 ICR10 [R, R/W] - - -11111 ICR11 ICR11 [R, R/W] - - -11111 00044CH 00044CH ICR12 ICR12 [R, R/W] - - -11111 ICR13 ICR13 [R, R/W] - - -11111 ICR14 ICR14 [R, R/W] - - -11111 ICR15 ICR15 [R, R/W] - - -11111 000450H 000450H ICR16 ICR16 [R, R/W] - - -11111 ICR17 ICR17 [R, R/W] - - -11111 ICR18 ICR18 [R, R/W] - - -11111 ICR19 ICR19 [R, R/W] - - -11111 000454H 000454H ICR20 ICR20 [R, R/W] - - -11111 ICR21 ICR21 [R, R/W] - - -11111 ICR22 ICR22 [R, R/W] - - -11111 ICR23 ICR23 [R, R/W] - - -11111 000458H 000458H ICR24 ICR24 [R, R/W] - - -11111 ICR25 ICR25 [R, R/W] - - -11111 ICR26 ICR26 [R, R/W] - - -11111 ICR27 ICR27 [R, R/W] - - -11111 Interrupt Control unit (Continued) 40 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 00045CH 00045CH ICR28 ICR28 [R, R/W] - - -11111 ICR29 ICR29 [R, R/W] - - -11111 ICR30 ICR30 [R, R/W] - - -11111 ICR31 ICR31 [R, R/W] - - -11111 000460H 000460H ICR32 ICR32 [R, R/W] - - -11111 ICR33 ICR33 [R, R/W] - - -11111 ICR34 ICR34 [R, R/W] - - -11111 ICR35 ICR35 [R, R/W] - - -11111 000464H 000464H ICR36 ICR36 [R, R/W] - - -11111 ICR37 ICR37 [R, R/W] - - -11111 ICR38 ICR38 [R, R/W] - - -11111 ICR39 ICR39 [R, R/W] - - -11111 000468H 000468H ICR40 ICR40 [R, R/W] - - -11111 ICR41 ICR41 [R, R/W] - - -11111 ICR42 ICR42 [R, R/W] - - -11111 ICR43 ICR43 [R, R/W] - - -11111 00046CH 00046CH ICR44 ICR44 [R, R/W] - - -11111 ICR45 ICR45 [R, R/W] - - -11111 ICR46 ICR46 [R, R/W] - - -11111 Block ICR47 ICR47 [R, R/W] - - -11111 000470H 000470H to 00047CH 00047CH Reserved 000480H 000480H RSRR [R/W] 10000000 STCR [R/W] 00110011 TBCR [R/W] X0000X00 X0000X00 CTBR [W] XXXXXXXX 000484H 000484H CLKR [R/W] 00000000 WPR [W] XXXXXXXX DIVR0 [R/W] 00000011 DIVR1 [R/W] 00000000 000488H 000488H to 0005FCH 0005FCH Interrupt Control unit Clock Control unit Reserved 000600H 000600H 000604H 000604H DDR7 [R/W] 00000000 000608H 000608H DDR8 [R/W] 00000000 DDR9 [R/W] 00000000 DDRB [R/W] 00000000 T-unit Port Direction Register 00060CH 00060CH 000610H 000610H 000614H 000614H PFR7 [R/W] 00001111 000618H 000618H PFR8 [R/W] 111110-0 PFR9 [R/W] 11110101 PFRB [R/W] 00000000 00061CH 00061CH 000620H 000620H T-unit Port Function Register 000624H 000624H 000628H 000628H to 00063FH 00063FH PFR27 PFR27 [R/W] 1111-00- Reserved (Continued) 41 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 000640H 000640H ASR0 [W] 00000000 00000000 AMR0 [W] 11111000 11111111 000644H 000644H ASR1 [W] 00000000 00000000 AMR1 [W] 00000000 00000000 000648H 000648H ASR2 [W] 00000000 00000000 AMR2 [W] 00000000 00000000 00064CH 00064CH ASR3 [W] 00000000 00000000 AMR3 [W] 00000000 00000000 000650H 000650H ASR4 [W] 00000000 00000000 AMR4 [W] 00000000 00000000 000654H 000654H ASR5 [W] 00000000 00000000 AMR5 [W] 00000000 00000000 000658H 000658H ASR6 [W] 00000000 00000000 AMR6 [W] 00000000 00000000 00065CH 00065CH ASR7 [W] 00000000 00000000 Block AMR7 [W] 00000000 00000000 000660H 000660H AMD0 [R/W] -00XX111 -00XX111 AMD1 [R/W] -XXXXXXX AMD2 [R/W] - -XXXXXX AMD3 [R/W] - -XXXXXX 000664H 000664H AMD4 [R/W] - -XXXXXX AMD5 [R/W] - -XXXXXX AMD6 [R/W] -XXXXXXX AMD7 [R/W] -XXXXXXX 000668H 000668H CSE [R/W] 11000011 T-unit 00066CH 00066CH 000670H 000670H CHE [R/W] 11111111 000674H 000674H to 0007F8H 0007F8H 0007FCH 0007FCH MODR [W] XXXXXXXX 000800H 000800H to 000AFCH 000AFCH Reserved Mode Register Reserved 000B00H 000B00H ESTS0 X0000000 X0000000 ESTS1 XXXXXXXX ESTS2 XXXXXXXX 000B04H 000B04H ECTL0 0X000000 0X000000 ECTL1 00000000 ECTL2 000X0000 000X0000 ECTL3 00000X11 00000X11 000B08H 000B08H ECNT0 XXXXXXXX ECNT1 XXXXXXXX EUSA XXX0000X XXX0000X EDTC 0000XXXX 0000XXXX DSU (Continued) 42 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 000B0CH 000B0CH EWPT XXXXXXXX XXXXXXXX 000B10H 000B10H EDTR0 XXXXXXXX XXXXXXXX Block EDTR1 XXXXXXXX XXXXXXXX 000B14H 000B14H to 000B1CH 000B1CH 000B20H 000B20H EIA0 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B24H 000B24H EIA1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B28H 000B28H EIA2 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B2CH 000B2CH EIA3 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B30H 000B30H EIA4 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B34H 000B34H EIA5 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B38H 000B38H EIA6 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B3CH 000B3CH EIA7 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B40H 000B40H EDTA XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B44H 000B44H EDTM XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B48H 000B48H EOA0 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B4CH 000B4CH EOA1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B50H 000B50H EPCR XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B54H 000B54H EPSR XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B58H 000B58H EIAM0 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B5CH 000B5CH EIAM1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B60H 000B60H EOAM0/EODM0 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DSU (Continued) 43 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 Block 000B64H 000B64H EOAM1/EODM1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B68H 000B68H EOD0 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 000B6CH 000B6CH EOD1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001000H 001000H DMASA0 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001004H 001004H DMADA0 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001008H 001008H DMASA1 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00100CH 00100CH DMADA1 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001010H 001010H DMASA2 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001014H 001014H DMADA2 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001018H 001018H DMASA3 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00101CH 00101CH DMADA3 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001020H 001020H DMASA4 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001024H 001024H DMADA4 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 001028H 001028H to 003FFCH 003FFCH Reserved 004000H 004000H to 006FFFH 006FFFH Reserved DSU DMAC 007000H 007000H FMCS [R/W] 1110X000 1110X000 007004H 007004H FMWT [R/W] - -000011 007008H 007008H to 00FFFCH 00FFFCH Flash Memory Control Register on F362GA/ F362GA/ FV360GA FV360GA Reserved (Continued) 44 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 Block 010000H 010000H to 010FFCH 010FFCH (for exact address range see "s PERIPHERAL RESOURCES 1. INSTRUCTION CACHE") on F361GA F361GA only 1 K Cache is available, on F362GA F362GA no cache, but 4 K I-RAM are available I-Cache 4 KB 011000H 011000H to 011FFCH 011FFCH Reserved 012000H 012000H to 01FFFCH 01FFFCH Reserved 020000H 020000H to 03BFFCH 03BFFCH Reserved 03C000H 03C000H to 03FFFCH 03FFFCH Only first 12 KB are available on F362GA F362GA and F361GA F361GA User RAM 16 KB (D-Bus) 040000H 040000H to 043FFCH 043FFCH Only first 4 K are available on F362GA F362GA and F361GA F361GA Fast RAM 16 KB (F-Bus) 044000H 044000H to 0FEFFC Reserved 050000H 050000H to 0507FCH 0507FCH Boot ROM 2 KB (F-Bus) 050800H 050800H to 07FFF4H 07FFF4H reserved 080000H 080000H to 09FFFCH 09FFFCH Sector 0 64 KB Sector 7 64 KB 0A0000H 0A0000H to 0BFFFC Sector 1 64 KB Sector 8 64 KB 0C0000H 0C0000H to 0DFFFC Sector 2 64 KB Sector 9 64 KB 0E0000H 0E0000H to 0EFFFC Sector 3 32 KB Sector 10 32 KB 0F0000H 0F0000H to 0F3FFCH Sector 4 8 KB Sector 11 8 KB Flash Memory 512 K on F-Bus on FV360GA FV360GA and F362GA F362GA (Continued) 45 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 Block 0F4000H 0F4000H to 0F7FFCH Sector 5 8 KB Sector 12 8 KB Flash Memory 512 K 0F8000H 0F8000H to 0FFFF4H Sector 6 16 KB Sector 13 16 KB on F-Bus on FV360GA FV360GA and F362GA F362GA 0FFFF8H FMV [R] 06 00 00 00H 0FFFFCH FRV [R] 00 05 00 00H on FV360GA/F362GA FV360GA/F362GA / 00 FF 00 00 on F361GA F361GA Fixed Reset/Mode Vector Write operations to address 0FFFF8H and 0FFFFCH are not possible. When reading these addresses, the values shown above will be read. (Continued) 46 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 100000H 100000H BVALR0 [R/W] 00000000 00000000 TREQR0 [R/W] 00000000 00000000 100004H 100004H TCANR0 [W] 00000000 00000000 TCR0 [R/W] 00000000 00000000 100008H 100008H RCR0 [R/W] 00000000 00000000 RRTRR0 [R/W] 00000000 00000000 10000CH 10000CH ROVRR0 [R/W] 00000000 00000000 RIER0 [R/W] 00000000 00000000 100010H 100010H CSR0 [R/W, R] 00000000 00000001 100014H 100014H RTEC0 [R] 00000000 00000000 BTR0 [R/W] -1111111 11111111 100018H 100018H IDER0 [R/W] XXXXXXXX XXXXXXXX TRTRR0 [R/W] 00000000 00000000 10001CH 10001CH RFWTR0 [R/W] XXXXXXXX XXXXXXXX TIER0 [R/W] 00000000 00000000 Block LEIR0 [R/W] 000-0000 100020H 100020H AMSR0 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100024H 100024H AMR00 AMR00 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100028H 100028H AMR10 AMR10 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10002CH 10002CH to 10004BH 10004BH GENERAL PURPOSE RAM [R/W] 10004CH 10004CH IDR00 IDR00 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100050H 100050H IDR10 IDR10 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100054H 100054H IDR20 IDR20 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100058H 100058H IDR30 IDR30 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10005CH 10005CH IDR40 IDR40 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100060H 100060H IDR50 IDR50 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100064H 100064H IDR60 IDR60 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100068H 100068H CAN 0 IDR70 IDR70 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX Remark : Address range for CAN 0 to CAN 3 depends on chip select range. Mentioned addresses are default values, determined by boot ROM contents. (Continued) 47 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 10006CH 10006CH IDR90 IDR90 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100074H 100074H IDR100 IDR100 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100078H 100078H IDR110 IDR110 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10007CH 10007CH IDR120 IDR120 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100080H 100080H IDR130 IDR130 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100084H 100084H IDR140 IDR140 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100088H 100088H Block IDR80 IDR80 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100070H 100070H +3 IDR150 IDR150 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10008CH 10008CH DLCR00 DLCR00 [R/W] - - - - - - - - - - - - XXXX DLCR10 DLCR10 [R/W] - - - - - - - - - - - - XXXX 100090H 100090H DLCR20 DLCR20 [R/W] - - - - - - - - - - - - XXXX DLCR30 DLCR30 [R/W] - - - - - - - - - - - - XXXX 100094H 100094H DLCR40 DLCR40 [R/W] - - - - - - - - - - - - XXXX DLCR50 DLCR50 [R/W] - - - - - - - - - - - - XXXX 100098H 100098H DLCR60 DLCR60 [R/W] - - - - - - - - - - - - XXXX DLCR70 DLCR70 [R/W] - - - - - - - - - - - - XXXX 10009CH 10009CH DLCR80 DLCR80 [R/W] - - - - - - - - - - - - XXXX DLCR90 DLCR90 [R/W] - - - - - - - - - - - - XXXX 1000A0H 1000A0H DLCR100 DLCR100 [R/W] - - - - - - - - - - - - XXXX DLCR110 DLCR110 [R/W] - - - - - - - - - - - - XXXX 1000A4H 1000A4H DLCR120 DLCR120 [R/W] - - - - - - - - - - - - XXXX DLCR130 DLCR130 [R/W] - - - - - - - - - - - - XXXX 1000A8H 1000A8H DLCR140 DLCR140 [R/W] - - - - - - - - - - - - XXXX DLCR150 DLCR150 [R/W] - - - - - - - - - - - - XXXX 1000ACH 1000ACH DTR00 DTR00 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000B4H 1000B4H DTR10 DTR10 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000BCH 1000BCH CAN 0 DTR20 DTR20 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX (Continued) 48 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 1000C4H 1000C4H DTR30 DTR30 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000CCH 1000CCH DTR40 DTR40 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000D4H 1000D4H DTR50 DTR50 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000DCH 1000DCH DTR60 DTR60 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000E4H 1000E4H DTR70 DTR70 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000ECH 1000ECH DTR80 DTR80 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000F4H 1000F4H DTR90 DTR90 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1000FCH 1000FCH DTR100 DTR100 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100104H 100104H DTR110 DTR110 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10010CH 10010CH DTR120 DTR120 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100114H 100114H DTR130 DTR130 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10011CH 10011CH DTR140 DTR140 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100124H 100124H Block DTR150 DTR150 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10012CH 10012CH CREG0 [R/W] 00000000 00000110 CAN 0 (Continued) 49 MB91360G MB91360G Series (Continued) Address 100180H 100180H Register +0 +1 FMCS [R/W] 1 - - 0X000 0X000 +2 +3 Block Flash Memory control for F361GA F361GA - 100200H 100200H BVALR1 [R/W] 00000000 00000000 TREQR1 [R/W] 00000000 00000000 100204H 100204H TCANR1 [W] 00000000 00000000 TCR1 [R/W] 00000000 00000000 100208H 100208H RCR1 [R/W] 00000000 00000000 RRTRR1 [R/W] 00000000 00000000 10020CH 10020CH ROVRR1 [R/W] 00000000 00000000 RIER1 [R/W] 00000000 00000000 100210H 100210H CSR1 [R/W] 00000000 00000001 100214H 100214H RTEC1 [R] 00000000 00000000 BTR1 [R/W] -1111111 11111111 100218H 100218H IDER1 [R/W] XXXXXXXX XXXXXXXX TRTRR1 [R/W] 00000000 00000000 10021CH 10021CH RFWTR1 [R/W] XXXXXXXX XXXXXXXX TIER1 [R/W] 00000000 00000000 LEIR1 [R/W] 000-0000 100220H 100220H AMSR1 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100224H 100224H AMR01 AMR01 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100228H 100228H AMR11 AMR11 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10022CH 10022CH to 100248H 100248H GENERAL PURPOSE RAM [R/W] 10024CH 10024CH IDR11 IDR11 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100254H 100254H IDR21 IDR21[R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100258H 100258H IDR31 IDR31 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX- 10025CH 10025CH IDR41 IDR41 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100260H 100260H Remark : Address range for CAN 0 to CAN 3 depends on chip select range. Mentioned addresses are default values, determined by boot ROM contents. IDR01 IDR01 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100250H 100250H CAN 1 IDR51 IDR51 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX (Continued) 50 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 100264H 100264H IDR71 IDR71 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10026CH 10026CH IDR81 IDR81 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100270H 100270H IDR91 IDR91 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100274H 100274H IDR101 IDR101 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100278H 100278H IDR111 IDR111 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10027CH 10027CH IDR121 IDR121 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXX - - - 100280H 100280H IDR131 IDR131 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100284H 100284H IDR141 IDR141 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100288H 100288H IDR151 IDR151 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX Block IDR61 IDR61 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100268H 100268H +3 10028CH 10028CH DLCR01 DLCR01 [R/W] - - - - - - - - - - - - XXXX DLCR11 DLCR11 [R/W] - - - - - - - - - - - - XXXX 100290H 100290H DLCR21 DLCR21 [R/W] - - - - - - - - - - - - XXXX DLCR31 DLCR31 [R/W] - - - - - - - - - - - - XXXX 100294H 100294H DLCR41 DLCR41 [R/W] - - - - - - - - - - - - XXXX DLCR51 DLCR51 [R/W] - - - - - - - - - - - - XXXX 100298H 100298H DLCR61 DLCR61 [R/W] - - - - - - - - - - - - XXXX DLCR71 DLCR71 [R/W] - - - - - - - - - - - - XXXX 10029CH 10029CH DLCR81 DLCR81[R/W] - - - - - - - - - - - - XXXX DLCR91 DLCR91 [R/W] - - - - - - - - - - - - XXXX 1002A0H 1002A0H DLCR101 DLCR101 [R/W] - - - - - - - - - - - - XXXX DLCR111 DLCR111 [R/W] - - - - - - - - - - - - XXXX 1002A4H 1002A4H DLCR121 DLCR121 [R/W] - - - - - - - - - - - - XXXX DLCR131 DLCR131 [R/W] - - - - - - - - - - - - XXXX 1002A8H 1002A8H DLCR141 DLCR141 [R/W] - - - - - - - - - - - - XXXX CAN 1 DLCR151 DLCR151 [R/W] - - - - - - - - - - - - XXXX 1002ACH 1002ACH DTR01 DTR01 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX (Continued) 51 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 1002B4H 1002B4H DTR21 DTR21 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002C4H 1002C4H DTR31 DTR31 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002CCH 1002CCH DTR41 DTR41 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002D4H 1002D4H DTR51 DTR51 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002DCH 1002DCH DTR61 DTR61 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002E4H 1002E4H DTR71 DTR71 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002ECH 1002ECH DTR81 DTR81 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002F4H 1002F4H DTR91 DTR91 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002FCH 1002FCH DTR101 DTR101 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100304H 100304H DTR111 DTR111 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10030CH 10030CH DTR121 DTR121 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100314H 100314H DTR131 DTR131 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10031CH 10031CH Block DTR11 DTR11 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1002BCH 1002BCH +3 DTR141 DTR141 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CAN 1 (Continued) 52 MB91360G MB91360G Series (Continued) Address 100324H 100324H Register +0 +1 +2 +3 DTR151 DTR151 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10032CH 10032CH CREG1 [R/W] 00000000 00000110 BVALR2 [R/W] 00000000 00000000 TREQR2 [R/W] 00000000 00000000 100404H 100404H TCANR2 [W] 00000000 00000000 TCR2 [R/W] 00000000 00000000 100408H 100408H RCR2 [R/W] 00000000 00000000 RRTRR1 [R/W] 00000000 00000000 10040CH 10040CH ROVRR2 [R/W] 00000000 00000000 RIER2 [R/W] 00000000 00000000 100410H 100410H CSR2 [R/W] 00000000 00000001 100414H 100414H RTEC2 [R] 00000000 00000000 BTR2 [R/W] -1111111 11111111 100418H 100418H IDER2 [R/W] XXXXXXXX XXXXXXXX TRTRR2 [R/W] 00000000 00000000 10041CH 10041CH RFWTR2 [R/W] XXXXXXXX XXXXXXXX TIER2 [R/W] 00000000 00000000 CAN 1 100400H 100400H Block LEIR2 [R/W] 000-0000 100420H 100420H AMSR2 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100424H 100424H AMR02 AMR02 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100428H 100428H AMR12 AMR12 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10042CH 10042CH to 100448H 100448H IDR02 IDR02 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100450H 100450H IDR12 IDR12 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100454H 100454H IDR22 IDR22[R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100458H 100458H IDR32 IDR32 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX- 10045CH 10045CH Remark : Address range for CAN 0 to CAN 3 depends on chip select range. Mentioned addresses are default values, determined by boot ROM contents. GENERAL PURPOSE RAM [R/W] 10044CH 10044CH CAN 2 IDR42 IDR42 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX (Continued) 53 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 100460H 100460H IDR62 IDR62 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100468H 100468H IDR72 IDR72 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10046CH 10046CH IDR82 IDR82 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100470H 100470H IDR92 IDR92 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100474H 100474H IDR102 IDR102 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100478H 100478H IDR112 IDR112 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10047CH 10047CH IDR122 IDR122 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXX - - - 100480H 100480H IDR132 IDR132 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100484H 100484H IDR142 IDR142 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100488H 100488H IDR152 IDR152 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX Block IDR52 IDR52 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100464H 100464H +3 10048CH 10048CH DLCR02 DLCR02 [R/W] - - - - - - - - - - - - XXXX DLCR12 DLCR12 [R/W] - - - - - - - - - - - - XXXX 100490H 100490H DLCR22 DLCR22 [R/W] - - - - - - - - - - - - XXXX DLCR32 DLCR32 [R/W] - - - - - - - - - - - - XXXX 100494H 100494H DLCR42 DLCR42 [R/W] - - - - - - - - - - - - XXXX DLCR52 DLCR52 [R/W] - - - - - - - - - - - - XXXX 100498H 100498H DLCR62 DLCR62 [R/W] - - - - - - - - - - - - XXXX DLCR72 DLCR72 [R/W] - - - - - - - - - - - - XXXX 10049CH 10049CH DLCR82 DLCR82[R/W] - - - - - - - - - - - - XXXX DLCR92 DLCR92 [R/W] - - - - - - - - - - - - XXXX 1004A0H 1004A0H DLCR102 DLCR102 [R/W] - - - - - - - - - - - - XXXX DLCR112 DLCR112 [R/W] - - - - - - - - - - - - XXXX 1004A4H 1004A4H DLCR122 DLCR122 [R/W] - - - - - - - - - - - - XXXX DLCR132 DLCR132 [R/W] - - - - - - - - - - - - XXXX 1004A8H 1004A8H DLCR142 DLCR142 [R/W] - - - - - - - - - - - - XXXX CAN 2 DLCR152 DLCR152 [R/W] - - - - - - - - - - - - XXXX 1004ACH 1004ACH DTR02 DTR02 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX (Continued) 54 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 1004ACH 1004ACH DTR12 DTR12 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004BCH 1004BCH DTR22 DTR22 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004C4H 1004C4H DTR32 DTR32 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004CCH 1004CCH DTR42 DTR42 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004D4H 1004D4H DTR52 DTR52 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004DCH 1004DCH DTR62 DTR62 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004E4H 1004E4H DTR72 DTR72 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004ECH 1004ECH DTR82 DTR82 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004F4H 1004F4H DTR92 DTR92 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004FCH 1004FCH DTR102 DTR102 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100504H 100504H DTR112 DTR112 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10050CH 10050CH DTR122 DTR122 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100514H 100514H Block DTR02 DTR02 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1004B4H 1004B4H +3 DTR132 DTR132 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CAN 2 (Continued) 55 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 +3 10051CH 10051CH DTR142 DTR142 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100524H 100524H DTR152 DTR152 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Block 10052CH 10052CH CREG2 [R/W] 00000000 00000110 100600H 100600H BVALR3 [R/W] 00000000 00000000 TREQR3 [R/W] 00000000 00000000 100604H 100604H TCANR3 [W] 00000000 00000000 TCR3 [R/W] 00000000 00000000 100608H 100608H RCR3 [R/W] 00000000 00000000 RRTRR31 RRTRR31 [R/W] 00000000 00000000 10060CH 10060CH ROVRR3 [R/W] 00000000 00000000 RIER3 [R/W] 00000000 00000000 100610H 100610H CSR3 [R/W] 00000000 00000001 100614H 100614H RTEC3 [R] 00000000 00000000 BTR3 [R/W] -1111111 11111111 100618H 100618H IDER3 [R/W] XXXXXXXX XXXXXXXX TRTRR3 [R/W] 00000000 00000000 10061CH 10061CH RFWTR3 [R/W] XXXXXXXX XXXXXXXX TIER3 [R/W] 00000000 00000000 CAN 2 LEIR3 [R/W] 000-0000 100620H 100620H AMSR3 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100624H 100624H AMR03 AMR03 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100628H 100628H AMR13 AMR13 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10062CH 10062CH to 100648H 100648H IDR03 IDR03 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100650H 100650H IDR13 IDR13 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100654H 100654H IDR23 IDR23[R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100658H 100658H Remark : Address range for CAN 0 to CAN 3 depends on chip select range. Mentioned addresses are default values, determined by boot ROM contents. GENERAL PURPOSE RAM [R/W] 10064CH 10064CH CAN 3 IDR33 IDR33 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX- (Continued) 56 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 10065CH 10065CH IDR53 IDR53 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100664H 100664H IDR63 IDR63 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100668H 100668H IDR73 IDR73 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10066CH 10066CH IDR83 IDR83 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100670H 100670H IDR93 IDR93 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100674H 100674H IDR103 IDR103 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100678H 100678H IDR113 IDR113 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10067CH 10067CH IDR123 IDR123 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXX - - - 100680H 100680H IDR133 IDR133 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100684H 100684H IDR143 IDR143 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100688H 100688H Block IDR43 IDR43 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 100660H 100660H +3 IDR153 IDR153 [R/W] XXXXXXXX XXXXXXXX XXXXX - - - XXXXXXXX 10068CH 10068CH DLCR032 DLCR032 [R/W] - - - - - - - - - - - - XXXX DLCR13 DLCR13 [R/W] - - - - - - - - - - - - XXXX 100690H 100690H DLCR232 DLCR232 [R/W] - - - - - - - - - - - - XXXX DLCR33 DLCR33 [R/W] - - - - - - - - - - - - XXXX 100694H 100694H DLCR43 DLCR43 [R/W] - - - - - - - - - - - - XXXX DLCR53 DLCR53 [R/W] - - - - - - - - - - - - XXXX 100698H 100698H DLCR63 DLCR63 [R/W] - - - - - - - - - - - - XXXX DLCR733 DLCR733 [R/W] - - - - - - - - - - - - XXXX 10069CH 10069CH DLCR83 DLCR83[R/W] - - - - - - - - - - - - XXXX DLCR93 DLCR93 [R/W] - - - - - - - - - - - - XXXX 1006A0H 1006A0H DLCR103 DLCR103 [R/W] - - - - - - - - - - - - XXXX DLCR113 DLCR113 [R/W] - - - - - - - - - - - - XXXX 1006A4H 1006A4H DLCR123 DLCR123 [R/W] - - - - - - - - - - - - XXXX DLCR133 DLCR133 [R/W] - - - - - - - - - - - - XXXX 1006A8H 1006A8H DLCR143 DLCR143 [R/W] - - - - - - - - - - - - XXXX CAN 3 DLCR153 DLCR153 [R/W] - - - - - - - - - - - - XXXX (Continued) 57 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 1006ACH 1006ACH DTR13 DTR13 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006BCH 1006BCH DTR23 DTR23 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006C4H 1006C4H DTR33 DTR33 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006CCH 1006CCH DTR43 DTR43 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006D4H 1006D4H DTR53 DTR53 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006DCH 1006DCH DTR63 DTR63 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006E4H 1006E4H DTR73 DTR73 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006ECH 1006ECH DTR83 DTR83 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006F4H 1006F4H DTR93 DTR93 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006FCH 1006FCH DTR103 DTR103 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100704H 100704H DTR113 DTR113 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10070CH 10070CH DTR123 DTR123 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100714H 100714H Block DTR03 DTR03 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 1006B4H 1006B4H +3 DTR133 DTR133 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX CAN 3 (Continued) 58 MB91360G MB91360G Series (Continued) Address Register +0 +1 +2 Block +3 10071CH 10071CH DTR143 DTR143 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 100724H 100724H DTR153 DTR153 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 10072CH 10072CH CREG3 [R/W] 00000000 00000110 180000H 180000H to 19FFFCH 19FFFCH Sector 0 64 KB Sector 7 64 KB 1A0000H 1A0000H to 1BFFFC Sector 1 64 KB Sector 8 64 KB 1C0000H 1C0000H to 1DFFFC Sector 2 64 KB Sector 9 64 KB 1E0000H 1E0000H to 1 EFFFCH Sector 3 32 KB Sector 10 32 KB 1F0000H 1F0000H to 1F3FFCH Sector 4 8 KB Sector 11 8 KB 1F4000H 1F4000H to 1F7FFCH Sector 5 8 KB Sector 12 8 KB 1F8000H 1F8000H to 1FFFFCH Sector 6 16 KB CAN 3 Sector 13 16 KB Flash Memory 512 K on F361GA F361GA - addresses depending on settings for ship select area CS1 Note: The data in reserved areas and areas marked "" is indeterminate. Do not use those areas! 59 MB91360G MB91360G Series s INTERRUPT CAUSES, INTERRUPT VECTORS, AND INTERRUPT CONTROL REGISTER Interrupt number Interrupt Interrupt level *1 Interrupt vector *2 Decimal Hexadecimal Setting Register Register address Offset Default Vector address RN Reset 0 00 0x3FC 0x000FFFFC Mode vector 1 01 0x3F8 0x000FFFF8 System reserved 2 02 0x3F4 0x000FFFF4 System reserved 3 03 0x3F0 0x000FFFF0 System reserved 4 04 0x3EC 0x000FFFEC System reserved 5 05 0x3E8 0x000FFFE8 6 06 0x3E4 0x000FFFE4 7 07 0x3E0 0x000FFFE0 Co-processor error trap *4 8 08 0x3DC 0x000FFFDC INTE instruction *4 9 09 0x3D8 0x000FFFD8 Instruction break exception *4 10 0A 0x3D4 0x000FFFD4 Operand break trap *4 11 0B 0x3D0 0x000FFFD0 Step trace trap *4 12 0C 0x3CC 0x000FFFCC NMI interrupt (tool) *4 13 0D 0x3C8 0x000FFFC8 Undefined instruction exception 14 0E 0x3C4 0x000FFFC4 NMI request 15 0F 0x3C0 0x000FFFC0 External Interrupt 0 16 10 ICR00 ICR00 0x440 0x3BC 0x000FFFBC 4 External Interrupt 1 17 11 ICR01 ICR01 0x441 0x3B8 0x000FFFB8 5 External Interrupt 2 18 12 ICR02 ICR02 0x442 0x3B4 0x000FFFB4 8 External Interrupt 3 19 13 ICR03 ICR03 0x443 0x3B0 0x000FFFB0 9 External Interrupt 4 20 14 ICR04 ICR04 0x444 0x3AC 0x000FFFAC External Interrupt 5 21 15 ICR05 ICR05 0x445 0x3A8 0x000FFFA8 External Interrupt 6 22 16 ICR06 ICR06 0x446 0x3A4 0x000FFFA4 External Interrupt 7 23 17 ICR07 ICR07 0x447 0x3A0 0x000FFFA0 Reload Timer 0 24 18 ICR08 ICR08 0x448 0x39C 0x000FFF9C 6 Reload Timer 1 25 19 ICR09 ICR09 0x449 0x398 0x000FFF98 7 Reload Timer 2 26 1A ICR10 ICR10 0x44A 0x394 0x000FFF94 CAN 0 RX 27 1B ICR11 ICR11 0x44B 0x390 0x000FFF90 CAN 0 TX/NS 28 1C ICR12 ICR12 0x44C 0x38C 0x000FFF8C CAN 1 RX 29 1D ICR13 ICR13 0x44D 0x388 0x000FFF88 CAN 1 TX/NS 30 1E ICR14 ICR14 0x44E 0x384 0x000FFF84 System reserved Co-processor fault trap *4 FH fixed (Continued) 60 MB91360G MB91360G Series (Continued) Interrupt number Interrupt Interrupt level *1 Interrupt vector *2 Decimal Hexadecimal Setting Register Register address Offset Default Vector address RN CAN 2 RX 31 1F ICR15 ICR15 0x44F 0x380 0x000FFF80 CAN 2 TX/NS 32 20 ICR16 ICR16 0x450 0x37C 0x000FFF7C 33 21 ICR17 ICR17 0x451 0x378 0x000FFF78 34 22 ICR18 ICR18 0x452 0x374 0x000FFF74 PPG 0/1 35 23 ICR19 ICR19 0x453 0x370 0x000FFF70 PPG 2/3 36 24 ICR20 ICR20 0x454 0x36C 0x000FFF6C PPG 4/5 37 25 ICR21 ICR21 0x455 0x368 0x000FFF68 PPG 6/7 38 26 ICR22 ICR22 0x456 0x364 0x000FFF64 Reload Timer 3 39 27 ICR23 ICR23 0x457 0x360 0x000FFF60 Reload Timer 4 40 28 ICR24 ICR24 0x458 0x35C 0x000FFF5C Reload Timer 5 41 29 ICR25 ICR25 0x459 0x358 0x000FFF58 ICU 0/1 42 2A ICR26 ICR26 0x45A 0x354 0x000FFF54 OCU 0/1 43 2B ICR27 ICR27 0x45B 0x350 0x000FFF50 ICU 2/3 44 2C ICR28 ICR28 0x45C 0x34C 0x000FFF4C OCU 2/3 45 2D ICR29 ICR29 0x45D 0x348 0x000FFF48 ADC 46 2E ICR30 ICR30 0x45E 0x344 0x000FFF44 14 Timebase Overflow 47 2F ICR31 ICR31 0x45F 0x340 0x000FFF40 Free Running Counter 0 48 30 ICR32 ICR32 0x460 0x33C 0x000FFF3C Free Running Counter 1 CAN 3 RX *5 CAN 3 TX/NS *5 49 31 ICR33 ICR33 0x461 0x338 0x000FFF38 SIO 0 *6 50 32 ICR34 ICR34 0x462 0x334 0x000FFF34 (12) SIO 1 *6 51 33 ICR35 ICR35 0x463 0x330 0x000FFF30 (15) Sound Generator 52 34 ICR36 ICR36 0x464 0x32C 0x000FFF2C UART 0 RX 53 35 ICR37 ICR37 0x465 0x328 0x000FFF28 0 UART 0 TX 54 36 ICR38 ICR38 0x466 0x324 0x000FFF24 1 UART 1 RX 55 37 ICR39 ICR39 0x467 0x320 0x000FFF20 2 UART 1 TX 56 38 ICR40 ICR40 0x468 0x31C 0x000FFF1C 3 UART 2 RX 57 39 ICR41 ICR41 0x469 0x318 0x000FFF18 10 UART 2 TX 58 3A ICR42 ICR42 0x46A 0x314 0x000FFF14 11 I2C 59 3B ICR43 ICR43 0x46B 0x310 0x000FFF10 13 Alarm Comparator 60 3C ICR44 ICR44 0x46C 0x30C 0x000FFF0C RTC (Watchtimer) / Calibration Unit 61 3D ICR45 ICR45 0x46D 0x308 0x000FFF08 DMA 62 3E ICR46 ICR46 0x46E 0x304 0x000FFF04 (Continued) 61 MB91360G MB91360G Series (Continued) Interrupt number Interrupt Interrupt level *1 Interrupt vector *2 RN Decimal Hexadecimal Setting Register Register address Offset Default Vector address 63 3F ICR47 ICR47 0x46F 0x300 0x000FFF00 System reserved *3 64 40 0x2FC 0x000FFEFC *3 65 41 0x2F8 0x000FFEF8 Security vector 66 42 0x2F4 0x000FFEF4 System reserved 67 43 (ICR51 ICR51) 0x473 0x2F0 0x000FFEF0 System reserved 68 44 (ICR52 ICR52) 0x474 0x2EC 0x000FFEEC System reserved 69 45 (ICR53 ICR53) 0x475 0x2E8 0x000FFEE8 System reserved 70 46 (ICR54 ICR54) 0x476 0x2E4 0x000FFEE4 System reserved 71 47 (ICR55 ICR55) 0x477 0x2E0 0x000FFEE0 System reserved 72 48 (ICR56 ICR56) 0x478 0x2DC 0x000FFEDC System reserved 73 49 (ICR57 ICR57) 0x479 0x2D8 0x000FFED8 System reserved 74 4A (ICR58 ICR58) 0x47A 0x2D4 0x000FFED4 System reserved 75 4B (ICR59 ICR59) 0x47B 0x2D0 0x000FFED0 System reserved 76 4C (ICR60 ICR60) 0x47C 0x2CC 0x000FFECC System reserved 77 4D (ICR61 ICR61) 0x47D 0x2C8 0x000FFEC8 System reserved 78 4E (ICR62 ICR62) 0x47E 0x2C4 0x000FFEC4 System reserved 79 4F (ICR63 ICR63) 0x47F 0x2C0 0x000FFEC0 Used by the INT instruction. 80 to 255 50 to FF 0x2BC to 0x000 0x000FFEBC to 0x000FFC00 Delayed interrupt activation bit System reserved *1 : The ICRs are located in the interrupt controller and set the interrupt level for each interrupt request. An ICR is provided for each interrupt request. *2 : The vector address for each EIT (exception, interrupt or trap) is calculated by adding the listed offset to the table base register value (TBR) . The TBR specifies the top of the EIT vector table. The addresses listed in the table are for the default TBR value (0x000FFC00) . The TBR is initialized to this value by a reset.After execution of the internal boot ROM TBR is set to 0x00FFC00. *3 : Used by REALOS *4 : System reserved *5 : Only available on MB91FV360GA MB91FV360GA *6 : DMA to/from SIO is not yet implemented. 62 MB91360G MB91360G Series s PERIPHERAL RESOURCES 1. INSTRUCTION CACHE This section describes the instruction cache memory included in FR50 Family members and it operation. This only applies to MB91FV360GA MB91FV360GA and MB91F361GA MB91F361GA. (1) General Description The instruction cache is temporary memory. When an external low-speed memory accesses an instruction code, the instruction cache stores the single-accessed code to increase the second and subsequent access speeds.Setting this memory to the RAM mode enables software to directly read and write instruction cache data RAM and tag RAM. (2) Main Body Structure · FR basic instruction length : 2 bytes · Block arrangement system : 2-way set associative system · Block One way consists of 128 blocks. One block consists of 16 bytes ( = 4 sub-blocks) . One sub-block consists of 4 bytes ( = 1 bus access unit) . 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes I3 I2 I1 I0 Way 1 Cache tag Sub-block 3 Sub-block 2 Sub-block 1 Sub-block 0 Block 0 Cache tag Sub-block 3 Sub-block 2 Sub-block 1 Sub-block 0 Block 127 Cache tag Sub-block 3 Sub-block 2 Sub-block 1 Sub-block 0 Block 0 Cache tag Sub-block 3 Sub-block 2 Sub-block 1 Sub-block 0 Block 127 128 blocks Way 2 128 blocks Instruction Cache Structure 63 MB91360G MB91360G Series Way 1 31 09 Address tag 07 SBV3 08 Reserved 06 SBV2 05 ABV1 04 SBV0 Sub-block valid LRU Entry lock 03 TAGV 02 Reserved 01 LRU 00 ETLK TAG valid Way 2 31 09 Address tag 07 SBV3 Reserved 06 SBV2 Sub-block valid 05 ABV1 04 SBV0 03 TAGV TAG valid Entry lock Instruction Cache Tag 64 08 02 Reserved