NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| DQ63312QGL07NKS | SynQor | DC to DC Converter, Dual Output, High Efficiency, Isolated DC/DC Converter |
14 pages, |
Original |  |
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| DQ63312QGL07NKT | SynQor | DC to DC Converter, Dual Output, High Efficiency, Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NNS | SynQor | DC to DC Converter, Dual Output, High Efficiency, Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NNT | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NRS | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NRT | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NYS | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07NYT | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07PKS | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| DQ63312QGL07PKT | SynQor | DC to DC Converter: Dual Output: High Efficiency: Isolated DC/DC Converter |
14 pages, |
Original | |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: , BA0 A0-A10 A0-A10, BA0 A0-A10 A0-A10, BA0 DQ0~DQ15 DQ16~DQ31 DQ32~DQ47 DQ48~DQ63 DQ0~DQ63 , controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. August 1996 Revision 1.0 SOB1UV6412- SOB1UV6412-(67/84/100/125)T-S Pin Name A0~A10/AP A10/AP A0~A8 BA0 DQ0~DQ63 CLK0 RAS* CAS* CKE0 Pin Designation 1 , 64 VCC 135 DQ30 136 DQ62 65 RAS* 66 CAS* 137 DQ31 138 DQ63 , Capacitance (DQ0~DQ63) CI/O 12 pF 1, 2 Notes: 4 1. 2. Capacitance is measured with ... | Original |
8 pages, |
RAS 0910 SOB1UV6412- SOB1UV6412- abstract |
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| Abstract: ~DQ15 DQ32~DQ39 DQ40~DQ47 DQ16~DQ23 DQ24~DQ31 DQ48~DQ55 DQ56~DQ63 DQ0~DQ63 SA0-SA2 , controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. July 1996 Revision 1.0 SDC4UV6442- SDC4UV6442-(67/84/100/125)T-S Pin Name A0~A10 BA0 DQ0~DQ63 CLK0~CLK3 RAS* CAS* CKE0 , 159 160 161 36 A6 78 DQ29 DQ30 DQ31 VSS 120 A7 162 DQ61 DQ62 DQ63 VSS , ) CI4 45 pF 1 Input/Output Capacitance (DQ0~DQ63) CI/O 12 pF 1, 2 Notes: 4 ... | Original |
8 pages, |
SDC4UV6442- SDC4UV6442- abstract |
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| Abstract: 16 SDRAM DQ16~DQ31 1M x 16 SDRAM CS2 1M x 16 SDRAM CS3 DQ48~DQ63 DQ0~DQ63 , controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. July 1996 Revision 1.0 SDC2UV6412- SDC2UV6412-(67/84/100/125)T-S Pin Name A0~A10 BA0 DQ0~DQ63 CLK0, CLK1 RAS* CAS* CKE0, CKE1 DQMB0-DQMB7 1 2 3 , 36 A6 78 DQ29 DQ30 DQ31 VSS 120 A7 162 DQ61 DQ62 DQ63 VSS 37 38 39 , Capacitance (CLK0, CLK1) CI4 33 pF 1 Input/Output Capacitance (DQ0~DQ63) CI/O 12 pF ... | Original |
8 pages, |
SDC2UV6412- SDC2UV6412- abstract |
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| Abstract: DQ16~DQ23 DQ24~DQ31 DQ48~DQ55 DQ56~DQ63 DQ0~DQ63 SA0-SA2 SCL A0~A2 SCL SDA SDA , DQMB6 controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. July 1996 Revision 1.0 SDC1UV6412- SDC1UV6412-(67/84/100/125)T-S Pin Name A0~A10 BA0 DQ0~DQ63 CLK0 RAS* CAS* CKE0 , 160 161 36 A6 78 DQ29 DQ30 DQ31 VSS 120 A7 162 DQ61 DQ62 DQ63 VSS 37 , 1 Input/Output Capacitance (DQ0~DQ63) CI/O 12 pF 1, 2 Notes: 4 1. 2. ... | Original |
8 pages, |
SDC1UV6412- SDC1UV6412- abstract |
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| Abstract: A0-A10 A0-A10, BA0 A0-A10 A0-A10, BA0 A0-A10 A0-A10, BA0 DQ0~DQ15 DQ16~DQ31 DQ32~DQ47 DQ48~DQ63 DQ0~DQ63 , ~ DQ47 DQMB6 controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. August 1996 Revision 1.0 SOB2UV6482- SOB2UV6482-(67/84/100/125)T-S Pin Name A0~A10/AP A10/AP A0~A8 BA0 DQ0~DQ63 , 65 RAS* 66 CAS* 137 DQ31 138 DQ63 67 WE* 68 NC 139 VSS 140 , Input/Output Capacitance (DQ0~DQ63) CI/O 12 pF 1, 2 Notes: 4 1. 2. Capacitance ... | Original |
8 pages, |
SOB2UV6482- SOB2UV6482- abstract |
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| Abstract: DQ48~DQ63 DQ0~DQ63 VCC SCL SCL SDA SDA EEPROM VSS Decoupling capacitors to , ~ DQ39 DQMB5 controls DQ40 ~ DQ47 DQMB6 controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu , BA0 DQ0~DQ63 CLK0, CLK1 RAS* CAS* CKE0, CKE1 Pin Designation 1 VSS 3 DQ0 5 , DQ30 136 DQ62 65 RAS* 66 CAS* 137 DQ31 138 DQ63 67 WE* 68 , Capacitance (CLK0, CLK1, CKE0, CKE1) CI4 21 pF 1 Input/Output Capacitance (DQ0~DQ63) CI/O ... | Original |
8 pages, |
SOB2UV6412- SOB2UV6412- abstract |
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| Abstract: C4~C7 DQ32~DQ47 DQ16~DQ31 4Mx16 BLOCK DQ48~DQ63 DQ0~DQ63, C0~C7 SA0-SA2 SCL , ~ DQ47, C4~C7 DQMB6 controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. October1996 Revision 1.0 SDC4UV7242- SDC4UV7242-(67/84/100/125)T-S Pin Name A0~A10/AP A10/AP BA0 DQ0~DQ63, C0~C7 CLK0 , 161 DQ63 36 A6 78 VSS 120 A7 162 VSS 37 A8 79 CLK2 121 A9 , /Output Capacitance (DQ0~DQ63, C0~C7) CI/O 12 pF 1, 2 Notes: 4 1. 2. Capacitance ... | Original |
7 pages, |
SDC4UV7242- SDC4UV7242- abstract |
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| Abstract: DQ32~DQ47 DQ16~DQ31 DQ48~DQ63 DQ0~DQ63 SA0-SA2 SCL A0~A2 SCL SDA SDA EEPROM , DQMB6 controls DQ48 ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. August 1996 Revision 1.0 SDC2UV7282- SDC2UV7282-(67/84/100/125)T-S Pin Name A0~A10/AP A10/AP BA0 DQ0~DQ63, C0~C7 CLK0, CLK1 RAS , 35 A4 77 DQ31 119 A5 161 DQ63 36 A6 78 VSS 120 A7 162 , pF 1 Input/Output Capacitance (DQ0~DQ63, C0~C7) CI/O 17 pF 1, 2 Notes: 4 ... | Original |
8 pages, |
SDC2UV7282- SDC2UV7282- abstract |
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| Abstract: DQ24~DQ31 DQ48~DQ55 CS2 CLK2 CS3 CLK3 DQ56~DQ63 DQ0~DQ63 SA0-SA2 SCL A0-A2 SCL , ~ DQ55 DQMB7 controls DQ56 ~ DQ63 Fujitsu Microelectronics, Inc. August1996 Revision 1.0 SDC4UV7282- SDC4UV7282-(67/84/100/125)T-S Pin Name A0~A10/AP A10/AP BA0 DQ0~DQ63, C0~C7 CLK0~CLK3 RAS* CAS* CKE0, CKE1 , 161 DQ63 36 A6 78 VSS 120 A7 162 VSS 37 A8 79 CLK2 121 A9 , Input/Output Capacitance (DQ0~DQ63, C0~C7) CI/O 19 pF 1, 2 Notes: 4 1. 2. ... | Original |
8 pages, |
SDC4UV7282- SDC4UV7282- abstract |
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| Abstract: Vss 77 DQ4 117 Vss 157 DQ5 38 DQ62 78 DQ2 118 DQ63 158 DQ3 , controls DQ56 - DQ63 Global write Byte write enable Clock Cache enable Cache output enable Address advance Address status processor Address status controller No connection DQO to DQ63 Input/Output , ). /CW6 enabies write to Byte6 (DQ48 to DQ55). /CW7 enables write to Byte7 (DQ56 to DQ63). 3. All , Supply Voltage Voltage on any pins relative to VSS (Except VDD) VDD3 VDD5 (DQO to DQ63) VT ... | Original |
16 pages, |
um61256f TI07 um61256fs um61256fs 15 um61256 HB66C6464BB HB66C6464BB abstract |
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| Abstract: DQ62 DQ63 VSS NC NC SA0 SA1 SA2 VCC Pin Name Function A0 - A11 Address Input DQ0 - DQ63 Data In/Out W0, W2 Read/Write Enable OE0, OE2 Output Enable RAS0 - RAS3 ... | Original |
1 pages, |
M374F0805DT1-C M374F0805DT1-C abstract |
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| Abstract: 49 51 53 55 57 59 61 63 65 67 69 71 Signal VSS DQ63 DQ61 DQ59 DQ57 VCC DQ55 , DQ0 ~ DQ63 Data input/output CLK0 Clock input CKE Clock enable input CS0 Chip , · · · DQ63 CKE U0 to U1 WE DSF U0 to U1 A(8:0) U0 to U1 BA(A9) DQ31 ... | Original |
3 pages, |
UG4256G6412FQG0 UG4256G6412FQG0 abstract |
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| Abstract: DQ63 VSS SCL VCC 45388 Warm Springs Blvd. Fremont, CA. 94539 Tel: (510) 668-2088 Absolute , Name Function A0 ~ A11 Address input (Multiplexed) BA0 , BA1 Select bank DQ0 ~ DQ63 , DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 U3 A0 ~ An, BA0 & 1 SDRAM U0 ~ U7 RAS SDRAM U0 ~ U7 ... | Original |
3 pages, |
UG416S6448JSG UG416S6448JSG abstract |
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| Abstract: VCC DQM6 DQM7 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS SCL VCC Absolute , Name Function A0 ~ A12 Address input (Multiplexed) BA0 , BA1 Select bank DQ0 ~ DQ63 , DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 U3 A0 ~ An, BA0 & 1 SDRAM U0 ~ U7 RAS SDRAM U0 ~ U7 ... | Original |
3 pages, |
UG432S6488KSG UG432S6488KSG abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| DIMM64 DIMM64 DIMM64 DIMM64;IC;144 PINORDER DIMM168 DIMM168 DIMM168 DIMM168; , , , , , , DQMB5,DQMB6,DQMB7,SA0 www.datasheetarchive.com/download/60837585-238067ZC/database.zip (dimm64.dvf) |
Intel | 17/06/1998 | 150.77 Kb | ZIP | database.zip |
| 57 154 DQ58 155 DQ59 156 DQ60 158 DQ61 159 DQ62 160 DQ63 161 BA0122 BA0122 BA0122 BA0122 CLK3163 CLK3163 CLK3163 CLK3163 CLK279 CLK279 CLK279 CLK279 CLK_En0128 CAS#111 DQ61 159 DQ62 160 DQ63 161 BA0122 BA0122 BA0122 BA0122 CLK3163 CLK3163 CLK3163 CLK3163 CLK279 CLK279 CLK279 CLK279 CLK_En0128 CAS#111 RAS#115 SA2167 SA2167 SA2167 SA2167 SA1166 SA1166 SA1166 SA1166 SA0165 SA0165 SA0165 SA0165 SCL www.datasheetarchive.com/download/48287946-715264ZC/ev-64120-pdf.zip (sdram.pdf) |
Scantec | 20/04/1998 | 694.12 Kb | ZIP | ev-64120-pdf.zip |
| (device file for DIMM_168) PACKAGE DIMM_168 PINCOUNT 168 PINORDER DIMM_168 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 , DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28, DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 , DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57, DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 'A10/(AP)' , A11 A12 A13 SA0 SA1 SA2 BA0 BA1 CKE0 CKE1 www.datasheetarchive.com/download/54130208-847651ZC/evalc2.zip (DIMM_168.txt) |
STMicroelectronics | 10/01/2001 | 346.67 Kb | ZIP | evalc2.zip |
| ]), .T(ddr_dq_t[62]); IOBUF_SSTL2_II dq63 (.I(ddr_dq_o[63]), .IO(ddr_dq[63]), .O(ddr_dq_i[63]), .T www.datasheetarchive.com/download/82125193-995910ZC/xapp200.zip (ddr_dq_io_64.v) |
Xilinx | 08/09/2000 | 1688.56 Kb | ZIP | xapp200.zip |
| ]), .T(ddr_dq_t[62]); IOBUF_SSTL2_II dq63 (.I(ddr_dq_o[63]), .IO(ddr_dq[63]), .O(ddr_dq_i[63]), .T tar:gzip:tar:gwww.datasheetarchive.com/files/xilinx/files/appnotes/xapp200.tar.gz!/xapp200.tar!/verilog/xapp200_verilog.tar.gz!/xapp200_verilog.tar!/2.5/src/ddr_dq_io_64.v |
Xilinx | 08/09/2000 | 1595.91 Kb | GZ | xapp200.tar.gz |
| 31 DQ33 DQ29 DQ25 DQ23 DQ19 DQ35 DQ37 DQ43 DQ53 DQ57 DQ61 DQ63 DQ67 DQ59 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7561.htm |
STMicroelectronics | 31/01/2001 | 9.36 Kb | HTM | 7561.htm |
| 31 DQ33 DQ29 DQ25 DQ23 DQ19 DQ35 DQ37 DQ43 DQ53 DQ57 DQ61 DQ63 DQ67 DQ59 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7562.htm |
STMicroelectronics | 31/01/2001 | 9.35 Kb | HTM | 7562.htm |
| 46v16m8 U08 (Dq[63 : 56], Dqs[7], Addr, Ba, Clk[2], Clk_n[2], Cke[0], Cs_n[0], Ras_n, Cas_n, We_n, Dm www.datasheetarchive.com/download/23549867-995995ZC/xapp608.zip (mt8vddt1664a.v) |
Xilinx | 14/06/2004 | 182.44 Kb | ZIP | xapp608.zip |
| .1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - DQ63 P1.161 R163 .50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - DQ63A R163.2 U9 www.datasheetarchive.com/download/40356767-175454ZC/64mb_n~1.zip (netlist.txt) |
Intel | 31/12/1998 | 737.7 Kb | ZIP | 64mb_n~1.zip |
| .1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - DQ63 P1.161 R163 .50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - DQ63A R163.2 U10 www.datasheetarchive.com/download/32544518-175456ZC/64mb_pll.zip (netlist.txt) |
Intel | 31/12/1998 | 797.04 Kb | ZIP | 64mb_pll.zip |