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DQ15-0 Datasheet

Part Manufacturer Description PDF Type
DQ15001-000 N/A Shortform Semicon, Diode, and SCR Datasheets Scan
DQ15002-000 N/A Shortform Semicon, Diode, and SCR Datasheets Scan

DQ15-0

Catalog Datasheet MFG & Type PDF Document Tags

XDR Rambus

Abstract: 8H001 , RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the , a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD D(a2) T0 T1 T2 T3 DQ15.0 DQN15.0 a1 = {Ba,Ca1} T4 ACT a0 T5 T6 RD a1 tRCD-R T7 T8 , accesses. These include DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal I/O Type , 4 Termination voltage for DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals
Elpida Memory
Original
XDR Rambus 8H001 EDX5116ABSE DQN14 M01E0107 E0643E40

014701 b

Abstract: 8x4Mx16 access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 t DQ15.0 RCD-W DQN15.0 tCC tCWD D(a1) D(a2) tWRP , } Write Transaction T0 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 RD a2 PRE a3 T1 T2 T3 , . These include DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal VDD GND VREF VTERM DQ15.0 DQN15 , of the selected bank is written with the data received from the DQ15.0 pins. The bank address is
Elpida Memory
Original
014701 b 8x4Mx16 VDDRQ11 E0643E31
Abstract: , and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the complementary signal of , T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 t DQ15.0 , } a1 = {Ba,Ca1} a2 = {Ba,Ca2} a3 = {Ba} Write Transaction T0 CFM CFMN RQ11.0 DQ15.0 DQN15 , memory accesses. These include DQ15.0 and DQN15.0 for carrying read and write data signals, RQ11.0 for , , SDO, and CMD signals. Table 1 Signal VDD GND VREF VTERM DQ15.0 DQN15.0 RQ11.0 CFM CFMN RST CMD Qimonda
Original
IDRD51-0-A1F1C 32C/40D 512-M 10292008-600R-IXL7
Abstract: normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data , T22 T23 CFM CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1 , T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data Elpida Memory
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x5116

Abstract: DQ15d used for normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0 , tCC tCWD D(a1) D(a2) Transaction a: WR T0 T1 T2 T3 RQ11.0 DQ15.0 DQN15 , tCYCLE PRE a3 tWRP Pr t DQ15.0 RCD-W DQN15.0 WR a2 a0 = {Ba,Ra} tCYCLE Q(a2 , accesses. These include DQ15.0 and DQN15.0 for carrying Table 1 Pin L EO Signal Description , 4 Termination voltage for DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals
Elpida Memory
Original
EDX5116ADSE E1033E40 x5116 DQ15d EDX5116ADSE-3C-E T21at M01E0706

EDX5116ACSE

Abstract: xdr elpida access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" , T22 T23 CFM CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD D(a2) T0 T1 T2 T3 DQ15.0 DQN15.0 a1 = {Ba,Ca1} T4 ACT a0 , accesses. These include DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal I/O Type , 4 Termination voltage for DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals
Elpida Memory
Original
EDX5116ACSE xdr elpida E0881E20

JEP-137

Abstract: JESD68 : CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a , CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD tCYCLE , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data
Silicon Storage Technology
Original
SST38VF166 JEP-137 JESD68 SW4506 T3A-2 JEP137 SST38UF166 48-LEAD 10-ILL MO-210 48-BALL

EDX5116ACSE

Abstract: transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to , CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD tCYCLE , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data
Elpida Memory
Original
E0881E10

EDX5116ACSE-3C-E

Abstract: EDX5116ACSE used for normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0 , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W , CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 tRCD-R RD a2 tCC tRDP Q(a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data
Elpida Memory
Original
EDX5116ACSE-3C-E

Rambus XDR

Abstract: XDR Rambus , RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the , T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN WR WR RQ11.0 ACT a0 a1 a2 tRCD-W tCC DQ15.0 tCWD DQN15 , T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT a0 DQ15.0 , signals. Table 2 : Pin Description Signal VDD GND VREF VTERM DQ15.0b DQN15.0b RQ11.0 CFM CFMN RST , . The number of DQ pins changes by I/O configuration. See the table below. x16 Singnal DQ15.0 DQN15
Elpida Memory
Original
Rambus XDR

SST38VF166

Abstract: JEP-137 transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to , CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD tCYCLE , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data
Silicon Storage Technology
Original
32h 327 SST38VF16616M SST38VF166-70-4C-EK S71065 MO-142
Abstract: normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data , T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 t DQ15.0 RCD-W DQN15.0 tCC tCWD D(a1) D , } a3 = {Ba} Write Transaction T0 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 RD a2 PRE a3 T1 , . These include DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal VDD GND VREF VTERM DQ15.0 DQN15 , of the selected bank is written with the data received from the DQ15.0 pins. The bank address is Samsung Electronics
Original
K4Y50164UC K4Y50084UC K4Y50044UC K4Y50024UC
Abstract: used for normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0 , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W , CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 tRCD-R RD a2 tCC tRDP Q(a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data Elpida Memory
Original
E0643E30

8x4Mx16

Abstract: , and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the complementary signal of , T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 t DQ15.0 , } a1 = {Ba,Ca1} a2 = {Ba,Ca2} a3 = {Ba} Write Transaction T0 CFM CFMN RQ11.0 DQ15.0 DQN15 , memory accesses. These include DQ15.0 and DQN15.0 for carrying read and write data signals, RQ11.0 for , , SDO, and CMD signals. Table 1 Signal VDD GND VREF VTERM DQ15.0 DQN15.0 RQ11.0 CFM CFMN RST CMD
Elpida Memory
Original
E0643E20

EDX5116ADSE-3C-E

Abstract: EDX5116ADSE : CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a , T20 T21 T22 T23 t DQ15.0 RCD-W DQN15.0 tCC tCWD D(a1) D(a2) tWRP PRE a3 tCYCLE , CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 RD a2 PRE a3 T1 T2 T3 T4 T5 T6 T7 , signals. The next group of pins are used for high bandwidth memory accesses. These include DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal VDD GND VREF VTERM DQ15.0 DQN15.0 RQ11.0 CFM CFMN RST CMD
Elpida Memory
Original
E1033E30

IDRD51-0-A1F1C

Abstract: , RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the , DQ15.0 tCWD DQN15.0 D(a1) tCYCLE PRE a3 tWRP D(a2) Transaction a: WR a0 = {Ba , T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT a0 DQ15.0 , Rambus XDR system design guidelines for connecting RSRV pins DQ15.0b DQN15.0b Total pin count , pins Singnal No. of pins DQ15.0 DQN15.0 16 16 DQ7.0 DQN7.0 8 8 DQ3
Qimonda
Original
32C/40C

8x4Mx16

Abstract: XDR Rambus DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the complementary signal of a , T17 T18 T19 T20 T21 T22 T23 CFM CFMN WR RQ11.0 ACT WR a0 a1 a2 tRCD-W tCC DQ15.0 tCWD , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT a0 DQ15.0 DQN15.0 RD a1 , 4a Termination voltage for DRSL signals. DQ15.0 I/O DRSLb 16 Positive data signals , Mux 16/tCC 16 16 termination 16 2 VTERM DQ15.0 16 DQN15.0 Version 1.0
Rambus
Original
RQ10GND DL-0476

K4Y50084UE-JCB3

Abstract: K4Y50164UE transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a , T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN WR WR RQ11.0 ACT a0 a1 a2 tRCD-W tCC DQ15.0 , .0 ACT a0 DQ15.0 DQN15.0 tRCD-R RD a1 tCC RD a2 tRDP PRE a3 Q(a1) Q(a2) a2 = {Ba,Ca2} a3 = {Ba} Read , 2 : Pin Description Signal VDD GND VREF VTERM DQ15.0 DQN15.0 RQ11.0 CFM CFMN RST CMD SCK SDI SDO , 16 DQ15.0 16 DQN15.0 Version 0.3 Aug 2005 Page 7 . 1:16 Demux 16:1 Mux .
Samsung Electronics
Original
K4Y50164UE K4Y50084UE-JCB3 K4Y50164UE-JCB3 K4Y50084UE K4Y50044UE K4Y50024UE

XDR DRAM

Abstract: ODF10 : CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a , CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD tCYCLE , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data
Samsung Electronics
Original
XDR DRAM ODF10 K4Y54044UF K4Y5416
Abstract: , RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the , DQ15.0 tCWD DQN15.0 D(a1) tCYCLE PRE a3 tWRP D(a2) Transaction a: WR a0 = {Ba , T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT a0 DQ15.0 , pins Singnal No. of pins DQ15.0 DQN15.0 16 16 DQ7.0 DQN7.0 8 8 DQ3 , VTERM DQ15.0 12 of 76 16 DQN15.0 Rev. 1.0 Feb. 2007 K4Y50164UE K4Y50084UE Samsung Electronics
Original
K4Y5016
Abstract: transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0/DQN15.0 data pins. The "N" appended to , CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W DQN15.0 WR a2 tCC D(a1) tCWD tCYCLE , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data Samsung Electronics
Original
K1C1616B2B
Abstract: used for normal memory access transactions: CFM/CFMN clock pins, RQ11.0 request pins, and DQ15.0 , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT WR a0 a1 t DQ15.0 RCD-W , CFMN RQ11.0 DQ15.0 DQN15.0 ACT a0 RD a1 tRCD-R RD a2 tCC tRDP Q(a1 , DQ15.0 and DQN15.0 for carrying Table 1 Pin Signal Description I/O Type No. of pins , DRSL signals. DQ15.0 I/O DRSLa 16 Positive data signals that carry write or read data Samsung Electronics
Original
K1C6416B2D

D513

Abstract: UtRAM Density DQ15.0/DQN15.0 data pins. The "N" appended to a signal name denotes the complementary signal of a , T17 T18 T19 T20 T21 T22 T23 CFM CFMN WR RQ11.0 ACT WR a0 a1 a2 tRCD-W tCC DQ15.0 tCWD , T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 CFM CFMN RQ11.0 ACT a0 DQ15.0 DQN15.0 RD a1 , 4a Termination voltage for DRSL signals. DQ15.0 I/O DRSLb 16 Positive data signals , Mux 16/tCC 16 16 termination 16 2 VTERM DQ15.0 16 DQN15.0 Version 1.0
Samsung Electronics
Original
D513 UtRAM Density K1C6416B8E
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