NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| DM54S112 | National Semiconductor | Dual Negative-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
4 pages, |
Original |  |
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| DM54S112J | Fairchild Semiconductor | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
5 pages, |
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| DM54S112J | National Semiconductor | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
4 pages, |
Scan | |
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| DM54S112J | National Semiconductor | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
4 pages, |
Original | |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: DM54S112 DM74S112 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset Clear and , Number DM54S112J or DM74S112N DM74S112N See NS Package Number J16A or N16E Function Table Inputs Outputs , Corporation TL F 6459 RRD-B30M105 RRD-B30M105 Printed in U S A DM54S112 DM74S112 DM74S112 Dual Negative-Edge-Triggered , Load) Symbol DM54S112 Parameter DM74S112 DM74S112 Units Min Nom Max Min Nom Max , 3 60 MHz DM54S112 DM74S112 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with ... | Original |
4 pages, |
N16E J16A DM74S112N DM74S112 DM54S112J DM54S112 C1995 DM54S112 abstract |
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| Abstract: National Semiconductor June 1989 DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device , Connection Diagram Dual-ln-Line Package CLFÎl CLR2 CLK2 K ?_ J? PR? Order Number DM54S112J or DM74S112N DM74S112N , Test Waveforms and Output Load) Symbol Parameter DM54S112 DM74S112 DM74S112 Units Min Nom Max Min Nom , (J) Order Number DM54S112J NS Package Number J16A 0,740 - 0.780 (18.80-19.81) fia iî5i lui ira ... | OCR Scan |
4 pages, |
preset 100 K N16E J16A DM74S112N DM74S112 DM54S112J DM54S112 DM54S112/DM74S112 DM54S112/DM74S112 abstract |
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| Abstract: Package DS006459-1 DS006459-1 Order Number DM54S112J or DM74S112N DM74S112N See Package Number J16A or N16E Function , Recommended Operating Conditions Symbol Parameter DM54S112 DM74S112 DM74S112 Units Min Nom Max , Number DM54S112J Package Number J16A 16-Lead Molded Dual-In-Line Package (N) Order Number DM74S112N DM74S112N ... | Original |
6 pages, |
N16E J16A DM74S112N DM74S112 DM54S112J DM54S112 DM74S112 abstract |
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| Abstract: National Semiconductor DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs (/) K) General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data Is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage , Function Table Dual-ln-Line Package TLCF/6459-1 TLCF/6459-1 Order Number DM54S112J or DM74S112N DM74S112N See NS Package Number ... | OCR Scan |
3 pages, |
DM54S112/DM74S112 DM54S112/DM74S112 abstract |
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| Abstract: Dual-ln-Line Package Order Number DM54S112J or DM74S112N DM74S112N See Package Number J16A or N16E Function Table , Temperature Range -55°C to +125"C 0"C to +70"C -65°C to +150°C Symbol Parameter DM54S112 DM74S112 DM74S112 Units , Dual-ln-Line Package (J) Order Number DM54S112J Package Number J16A PIN NO. 1_ IDENT 0.740-0.780 ... | OCR Scan |
5 pages, |
N16E J16A DM74S112N DM74S112 DM54S112J DM54S112 DM74S112 abstract |
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| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| DM54S112J | N/A | Dual J-K Flip-Flop | |
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| DM54S112J/883 | N/A | Dual J-K Flip-Flop | |