500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

DHVQFN14

Catalog Datasheet MFG & Type PDF Document Tags

DHVQFN14

Abstract: 74HC02 package; 14 leads; body width 4.4 mm SOT402-1 74LV02BQ -40 °C to +125 °C DHVQFN14 plastic , . Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description , TSSOP14 package [3] - 500 mW DHVQFN14 package [4] - 500 mW [1] The input , Semiconductors Quad 2-input NOR gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin , ISSUE DATE 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74LV02_4 Product data
NXP Semiconductors
Original
74HC02 74HCT02 JESD22-A114E 74LV02D 74LV02PW JESD22-A115-A
Abstract: DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad ï¬'at package; no leads; 14 , or input. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 , linearly with 8 mW/K. For TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN14 , Quad 2-input OR gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat , 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74ALVC32_2 Product data sheet  NXP Semiconductors
Original
JESD8B/JESD36 74ALVC32D 74ALVC32PW 74ALVC32BQ

dhvqfn14

Abstract: 74AHCT08D NXP outline package; 14 leads; body width 4.4 mm SOT402-1 -40 °C to +125 °C DHVQFN14 plastic dual , 5. Pin configuration DHVQFN14 74AHC_AHCT08_3 Product data sheet © NXP B.V. 2007. All rights , ] - 500 mW DHVQFN14 package [4] - 500 mW [1] The input and output voltage , 74AHC08; 74AHCT08 NXP Semiconductors Quad 2-input AND gate DHVQFN14: plastic dual in-line , . Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT08_3 Product data sheet © NXP B.V. 2007. All rights
NXP Semiconductors
Original
74AHC08D 74AHCT08D 74AHC08PW 74AHCT08PW 74AHC08BQ 74AHCT08D NXP JESD22-C101C

74HC04 nxp

Abstract: dhvqfn14 outline package; 14 leads; body width 4.4 mm SOT402-1 74LV04BQ -40 °C to +125 °C DHVQFN14 , . Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 74LV04_3 , mW DHVQFN14 package [1] [2] [5] - 500 mW The input and output voltage ratings , 4 December 2007 11 of 15 74LV04 NXP Semiconductors Hex inverter DHVQFN14: plastic , . Package outline SOT762-1 (DHVQFN14) 74LV04_3 Product data sheet © NXP B.V. 2007. All rights
NXP Semiconductors
Original
74HC04 74HCT04 74LV04N 74LV04D 74LV04DB 74LV04PW 74HC04 nxp
Abstract: 74HC27BQ â'40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin , ; 14 leads; body width 4.4 mm 74HCT27BQ â'40 °C to +125 °C DHVQFN14 plastic dual in-line , configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A , temperature â'65 +150 °C DIP14 package - 750 mW SO14, (T)SSOP14 and DHVQFN14 , above 70 °C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 NXP Semiconductors
Original
74HC27 74HCT27 74HC27N 74HC27D 74HC27DB 74HC27PW
Abstract: â'40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad , DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin , DHVQFN14 package [5] - 500 mW [1] The input and output voltage ratings may be exceeded if , Semiconductors Quad 2-input NAND gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin , ISSUE DATE 02-10-17 03-01-27 Fig 12. Package outline SOT762-1 (DHVQFN14) 74LV00_3 Product data NXP Semiconductors
Original
74HC00 74HCT00 74LV00N 74LV00D 74LV00DB 74LV00PW
Abstract: width 4.4 mm SOT402-1 74LV86BQ â'40 °C to +125 °C DHVQFN14 plastic dual in-line , and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 74LV86_3 Product data sheet © NXP B.V , DHVQFN14 package [5] - 500 mW [1] The input and output voltage ratings may be exceeded if , 11 of 15 74LV86 NXP Semiconductors Quad 2-input exclusive-OR gate DHVQFN14: plastic dual , outline SOT762-1 (DHVQFN14) 74LV86_3 Product data sheet © NXP B.V. 2007. All rights reserved NXP Semiconductors
Original
74HC86 74HCT86 74LV86N 74LV86D 74LV86DB 74LV86PW

74ALVC32

Abstract: 74ALVC32BQ package; 14 leads; body width 4.4 mm SOT402-1 74ALVC32BQ -40 °C to +85 °C DHVQFN14 plastic , configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 74ALVC32_2 Product data sheet © NXP , . For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K. 74ALVC32_2 Product data sheet , Semiconductors Quad 2-input OR gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin , ISSUE DATE 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74ALVC32_2 Product
NXP Semiconductors
Original

DHVQFN14

Abstract: 74AHCU04 74AHCU04BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad , configuration DHVQFN14 5.1 Pin description Table 2. Pin description Symbol Pin Description 1A , linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW , inverter DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no , 02-10-17 03-01-27 Fig 17. Package outline SOT762-1 (DHVQFN14) 74AHCU04_3 Product data sheet
NXP Semiconductors
Original
74AHCU04D 74AHCU04PW

74HC27

Abstract: dhvqfn14 -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762 , 74HCT27BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762 , . Pin configuration DIP14, SO14, (T)SSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description , package - 750 mW SO14, (T)SSOP14 and DHVQFN14 packages - 500 mW [2] total , packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 packages: Ptot derates linearly
NXP Semiconductors
Original
HCT273 74HCT27N 74HCT27D HCT27

dhvqfn14

Abstract: 74HCU04 -1 74LVU04BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad , . Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin , package [3] - 500 mW (T)SSOP14 package [4] - 500 mW DHVQFN14 package [5 , - 20 December 2007 15 of 19 74LVU04 NXP Semiconductors Hex inverter DHVQFN14 , . Package outline SOT762-1 (DHVQFN14) 74LVU04_6 Product data sheet © NXP B.V. 2007. All rights
NXP Semiconductors
Original
74HCU04 74LVU04N 74LVU04D 74LVU04DB 74LVU04PW

74AHC08PW TSSOP14 NXP

Abstract: dhvqfn14 outline package; 14 leads; body width 4.4 mm SOT402-1 -40 °C to +125 °C DHVQFN14 plastic dual , 5. Pin configuration DHVQFN14 74AHC_AHCT08_3 Product data sheet © NXP B.V. 2007. All rights , [2] - 500 mW TSSOP14 package [3] - 500 mW DHVQFN14 package [4] - , Semiconductors Quad 2-input AND gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin , ISSUE DATE 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT08_3 Product
NXP Semiconductors
Original
74AHC08PW TSSOP14 NXP 74AHCT08BQ

74HC132

Abstract: 74HCT132 mm SOT402-1 74LV132BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal , , SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin description Table 2. Pin , DHVQFN14 package [5] - 500 mW [1] The input and output voltage ratings may be exceeded if , Semiconductors Quad 2-input NAND Schmitt trigger DHVQFN14: plastic dual in-line compatible thermal enhanced , PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 17. Package outline SOT762-1 (DHVQFN14) 74LV132_4
NXP Semiconductors
Original
74HC132 74HCT132 74LV132D 74LV132DB 74LV132N 74LV132PW

dhvqfn14

Abstract: 74AHCT02 outline package; 14 leads; body width 4.4 mm SOT402-1 -40 °C to +125 °C DHVQFN14 plastic dual , 5. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin , package [3] - 500 mW DHVQFN14 package [4] - 500 mW [1] The input and , DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762 , Fig 10. Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT02_3 Product data sheet © NXP B.V. 2008
NXP Semiconductors
Original
74AHC02 74AHCT02 74AHC02D 74AHCT02D 74AHC02PW 74AHCT02PW 74AHC02BQ

74ALVC125

Abstract: 74ALVC125BQ SOT402-1 74ALVC125PW -40 °C to +85 °C 74ALVC125BQ -40 °C to +85 °C DHVQFN14 plastic dual , . Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 74ALVC125_2 , -state DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762 , Fig 11. Package outline SOT762-1 (DHVQFN14) 74ALVC125_2 Product data sheet © NXP B.V. 2008. All , appropriate. Section 3: DHVQFN14 package added. Section 7: derating values added for DHVQFN14 package
NXP Semiconductors
Original
74ALVC125D JESD22-A

SV00418

Abstract: dhvqfn14 configuration (SO14, SSOP14, TSSOP14) SV01923 Figure 2. Pin configuration (DHVQFN14; top view) 2003 Apr , 74LVC10A DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no , DHVQFN14 package to Ordering Information table; add DHVQFN14 pin configuration drawing; add DHVQFN14
Philips Semiconductors
Original
SV00418 04482

74HC86

Abstract: 74HCT86 -1 74LV86BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad , configuration DHVQFN14 74LV86_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 - , ] - 500 mW DHVQFN14 package [1] [2] [5] - 500 mW The input and output , Semiconductors Quad 2-input exclusive-OR gate DHVQFN14: plastic dual in-line compatible thermal enhanced , PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 12. Package outline SOT762-1 (DHVQFN14) 74LV86_3
NXP Semiconductors
Original

74HC00

Abstract: 74HCT00 DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 , )SSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol , (T)SSOP14 package [4] - 500 mW DHVQFN14 package [1] [2] [5] - 500 mW , Quad 2-input NAND gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad , 02-10-17 03-01-27 Fig 12. Package outline SOT762-1 (DHVQFN14) 74LV00_3 Product data sheet © NXP
NXP Semiconductors
Original
74LV00BQ 74LV001

dhvqfn14

Abstract: 74HC32 DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 , . Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 74LV32_3 , package [3] - 500 mW (T)SSOP14 package [4] - 500 mW DHVQFN14 package [1 , 9 November 2007 11 of 15 74LV32 NXP Semiconductors Quad 2-input OR gate DHVQFN14 , . Package outline SOT762-1 (DHVQFN14) 74LV32_3 Product data sheet © NXP B.V. 2007. All rights
NXP Semiconductors
Original
74HC32 74HCT32 74LV32N 74LV32D 74LV32DB 74LV32PW

dhvqfn14

Abstract: 74AHC30 -1 -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin , configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin Description A , : above 60 °C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN14 packages: above 60 °C the , -input NAND gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no , 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT30_3 Product data sheet
NXP Semiconductors
Original
74AHC30 74AHCT30 74AHC30D 74AHCT30D 74AHC30PW 74AHCT30PW

74HCU04

Abstract: 74HCu04 oscillator application note ; body width 4.4 mm SOT402-1 74HCU04BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line , configuration DIP14, SO14 and (T)SSOP14 74HCU04 Product data sheet Fig 5. Pin configuration DHVQFN14 , - 750 mW SO14, (T)SSOP14 and DHVQFN14 packages - 500 mW Ptot Conditions , above 70 °C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 , rights reserved. 13 of 18 74HCU04 NXP Semiconductors Hex inverter DHVQFN14: plastic dual
NXP Semiconductors
Original
74HCU04N 74HCU04D 74HCU04DB 74HCU04PW 74HCu04 oscillator application note NXP 74HCU04D JESD22-A114F

74AHC132

Abstract: 74AHC132BQ width 4.4 mm SOT402-1 74AHC132BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible , leads; body width 4.4 mm SOT402-1 74AHCT132BQ -40 °C to +125 °C DHVQFN14 plastic dual , configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin description Table 3: Pin , For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C. 9. Recommended operating , 74AHC132; 74AHCT132 Philips Semiconductors Quad 2-input NAND Schmitt trigger DHVQFN14: plastic
Philips Semiconductors
Original
74AHC132D 74AHC132PW EIA/JESD22-A114-B EIA/JESD22-A115-A EIA/JESD22-C101
Showing first 20 results.