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| Part Number | Manufacturer | Description | |||||
| 1. | Artesyn Technologies, Inc. | Tracking Dual Output DC-DC Converters | 299.94 Kb | 11 Pg. | |||
| 2. | Artesyn Technologies, Inc. | IC CONV DC-DC STEP DOWN 12VIN | 299.93 Kb | 11 Pg. | |||
| 3. | Power-One | DC/DC Converter | 361.1 Kb | 3 Pg. | |||
| 4. | Artesyn Technologies, Inc. | IC CONV DC-DC STEP DOWN 12VIN | 299.93 Kb | 11 Pg. | |||
| 5. | Artesyn Technologies, Inc. | Tracking Dual Output DC-DC Converters | 299.94 Kb | 11 Pg. |
| « Previous 1 Next » |
| 1. | 299.93 Kb • 11 Pages |
Abstract: ... DDR12 SERIES Dual output. DDR12 Series | Tracking Dual Output. DC-DC Converters. 1. [ 2 YEAR WARRANTY ] High current dual-output power module for DDR memory. Single compact module provides 25 A @ 2.5 ... Labels: DDR12, RoHS, Application Notes |
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| 2. | 205.76 Kb • 48 Pages |
Abstract: ... Rev. 0.2 Added DDR12, GEN6, and GEN8. Rev. 0.3 Added GEN 4. Table 2. Revision Level to Part Marking Cross-Reference. MPC8540 Revision. e500 Core Revision Device Marking Processor Version. Register ... Labels: DDR12, Cross Reference |
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| 3. | 203.8 Kb • 48 Pages |
Abstract: ... Rev. 0.2 Added DDR12, GEN6, and GEN8. Table 2. Revision Level to Part Marking Cross-Reference. MPC8540 Revision. e500 Core Revision Device Marking Processor Version. Register Value System Version ... Labels: DDR12, Cross Reference |
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| 4. | 231.41 Kb • 60 Pages |
Abstract: ... Rev. 0.2 Added CPM13-16, DDR12, and GEN6–8. Rev. 0.3 Added GEN 4. Table 2. Revision Level to Part Marking Cross-Reference. MPC8560 Revision. e500 Core Revision Device Marking Processor Version ... Labels: DDR12, Cross Reference |
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| 5. | 229.43 Kb • 60 Pages |
Abstract: ... Rev. 0.2 Added CPM13-16, DDR12, and GEN6–8. Table 2. Revision Level to Part Marking Cross-Reference. MPC8560 Revision. e500 Core Revision Device Marking Processor Version. Register Value System ... Labels: DDR12, Cross Reference |
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| 6. | 286.39 Kb • 24 Pages |
Abstract: ... MIOS1.MPIOSM32DDR.B.DDR12 = 1; /* setup MIOS Parallel Port bit 12 output */ /* set initial condition of the GPIO bits (LEDs) */ MIOS1.MPIOSM32DR.B.D11 = 1; MIOS1.MPIOSM32DR.B.D12 = 0; } /************** TPU ... Labels: DDR12, Application Notes |
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| 7. | 383.81 Kb • 24 Pages |
Abstract: ... MIOS1.MPIOSM32DDR.B.DDR12 = 1; /* setup MIOS Parallel Port bit 12 output */ /* set initial condition of the GPIO bits (LEDs) */ MIOS1.MPIOSM32DR.B.D11 = 1; MIOS1.MPIOSM32DR.B.D12 = 0; } /************** TPU ... Labels: DDR12, Application Notes |
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| 8. | 3734.26 Kb • 260 Pages |
Abstract: ... This power supply is generated from the 12V power rail using an Artesyn module, DDR12, shown in Figure 15-8. Figure 15-8. DDR12 Module. The DDR12 is also a point of load DC/DC convertor capable of ... Labels: DDR12, Cross Reference |
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| 9. | 674.08 Kb • 64 Pages |
Abstract: ... Ddr12* <6> Reserved. Should be always 0. RefTiming <7> 0 Normal operation. 1 Free running. AL300. November 28, 2001 38. In free running mode, external input HSYNC and VSYNC are disabled. Nominal input ... Labels: DDR12 |
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| 10. | 758.98 Kb • 64 Pages |
Abstract: ... Ddr12* <6> Reserved. Should be always 0. RefTiming <7> 0 Normal operation. AL300. February 20, 2003 38. 1 Free running. In free running mode, external input HSYNC and VSYNC are disabled. Nominal input ... Labels: DDR12 |
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