NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 11.70 12.38 10.76 ð18.66 1.15 .060 18.783 .73 .21 10500 11.31 11.90 ... | Original |
12 pages, |
wg 252 D2135 D1569 D2580 D1073 D1045 transistor d437 TRANSISTOR D1347 D1557 transistor D1437 transistor d736 D1347 transistor d400 D1790 transistor d472 information NE428M01 NE428M01 abstract |
| Abstract: 11.70 12.38 10.76 ð18.66 1.15 .060 18.783 .73 .21 10500 11.31 11.90 ... | Original |
14 pages, |
transistor d600 D1045 D1654 D2331 d2580 C10535E D945 NE428M01 D1790 transistor d472 D1681 transistor D1162 d472 TRANSISTOR TRANSISTOR d1557 D1557 datasheet abstract |
| Abstract: D1906 D1918 D1859 d1899 d1913 D1944 D1915 D1875 d1941 D1843 DVP-PM APPLICATION MANUAL Table of Contents Chapter 1: Program Structure of DVP-PM 1.1 O100 Main Program . 1-1 1.1.1 Manual Motion in O100 Main Program . 1-2 1.2 Structure of OX Motion Subroutine . 1-2 1.3 Structure of Pn Subroutine . ... | Original |
251 pages, |
D1853 transistor d1941 transistor transistor D1911 d1913 transistor d1859 transistor transistor D1710 transistor d1913 transistor D1843 D1835 transistor datasheet abstract |
| Abstract: availability and additional information. Document No. D18664EJ3V0DS00 (3rd edition) Date Published November , D18664EJ3V0DS td(on) ton tf toff NP70N04MUG NP70N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF , D18664EJ3V0DS 3 NP70N04MUG NP70N04MUG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER , D18664EJ3V0DS 20 NP70N04MUG NP70N04MUG CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 8 10000 VGS = 10 V ID = 35 , Voltage - V Data Sheet D18664EJ3V0DS 5 VGS - Gate to Source Voltage - V RDS(on) - Drain to ... | Original |
8 pages, |
NP70N04MUG-S18-AY NP70N04MUG D1866 70n04 NP70N04MUG abstract |
| Abstract: availability and additional information. Document No. D18663EJ2V0DS00 (2nd edition) Date Published April 2007 , D18663EJ2V0DS td(on) ton tf toff NP60N04MUG NP60N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER , 100 1000 PW - Pulse Width - s Data Sheet D18663EJ2V0DS 3 NP60N04MUG NP60N04MUG DRAIN CURRENT , Voltage - V 8 4 0 0 5 10 15 VGS - Gate to Source Voltage - V Data Sheet D18663EJ2V0DS , Sheet D18663EJ2V0DS 5 VGS - Gate to Source Voltage - V 10 Ciss, Coss, Crss - Capacitance - ... | Original |
10 pages, |
NP60N04MUG-S18-AY NP60N04MUG NEC 60N04 60n04 datasheet abstract |
| Abstract: availability and additional information. Document No. D18664EJ4V0DS00 (4th edition) Date Published April 2009 , D18664EJ4V0DS td(on) ton tf toff NP70N04MUG NP70N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF , D18664EJ4V0DS 3 NP70N04MUG NP70N04MUG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER , Data Sheet D18664EJ4V0DS 20 NP70N04MUG NP70N04MUG CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 8 , Sheet D18664EJ4V0DS 5 NP70N04MUG NP70N04MUG PACKAGE DRAWING (Unit: mm) TO-220 (MP-25K MP-25K) 3 0.8±0.1 ... | Original |
10 pages, |
NP70N04MUG-S18-AY NP70N04MUG D1866 70N04 datasheet abstract |
| Abstract: D18669JJ3V0SG D18669JJ3V0SG 4 4 4 4 5 5 6 6 6 7 7 8 9 10 10 10 11 11 12 , 2001 2003 2005 2008 Reporting Process MOS 4 D18669JJ3V0SG D18669JJ3V0SG 5 NEC MOSFET PC ID(DC) TO-263-7pin Bare Die 200 A 40 V , ) D18669JJ3V0SG 4pin EFLIP UMOS5 4pin EFLIP-LGA (1.8 mm2) 2004 2005 D18669JJ3V0SG , 100 -VDSS(V) 8 D18669JJ3V0SG D18669JJ3V0SG 9 mPA 2SK 2SJ ... | Original |
23 pages, |
NP161N04TUG NP110N04PDG NP160N04TUG NP100P04PDG PA2794GR np15p06 2SK3114B 2sk389 D18669JJ3V0SG MOSFET 2sk2488 Data sheet 2sk405 NP180N04TUG NP36P04SDG mpa602t datasheet abstract |
| Abstract: availability and additional information. Document No. D18665EJ2V0DS00 (2nd edition) Date Published April 2007 , D18665EJ2V0DS td(on) ton tf toff NP90N04MUG NP90N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF , 100 1000 PW - Pulse Width - s Data Sheet D18665EJ2V0DS 3 NP90N04MUG NP90N04MUG DRAIN CURRENT , 8 6 4 2 0 0 5 10 15 VGS - Gate to Source Voltage - V Data Sheet D18665EJ2V0DS , Current - A Data Sheet D18665EJ2V0DS 5 VGS - Gate to Source Voltage - V RDS(on) - Drain to ... | Original |
10 pages, |
NP90N04MUG-S18-AY NP90N04MUG D1866 90n04 UG 90n04 datasheet abstract |
| Abstract: availability and additional information. Document No. D18664EJ2V0DS00 (2nd edition) Date Published April 2007 , D18664EJ2V0DS td(on) ton tf toff NP70N04MUG NP70N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF , 1 10 100 1000 PW - Pulse Width - s Data Sheet D18664EJ2V0DS 3 NP70N04MUG NP70N04MUG , 8 6 4 2 0 0 5 10 15 VGS - Gate to Source Voltage - V Data Sheet D18664EJ2V0DS , Voltage - V Data Sheet D18664EJ2V0DS 5 VGS - Gate to Source Voltage - V RDS(on) - Drain to ... | Original |
8 pages, |
NP70N04MUG-S18-AY NP70N04MUG 70N04 NP70N04MUG abstract |
| Abstract: availability and additional information. Document No. D18664EJ4V0DS00 (4th edition) Date Published April 2009 , D18664EJ4V0DS td(on) ton tf toff NP70N04MUG NP70N04MUG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF , D18664EJ4V0DS 3 NP70N04MUG NP70N04MUG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER , Data Sheet D18664EJ4V0DS 20 NP70N04MUG NP70N04MUG CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 8 , Sheet D18664EJ4V0DS 5 NP70N04MUG NP70N04MUG PACKAGE DRAWING (Unit: mm) TO-220 (MP-25K MP-25K) 3 0.8±0.1 ... | Original |
8 pages, |
NP70N04MUG-S18-AY NP70N04MUG 70n04 D1866 NP70N04MUG abstract |
| Abstract: Package Overview I Type Typical Sample Semiconductor Pin Counts Pitches [mm] OKI Suffix DIP (Dual-in-line Package) 8, 14, 16, 18, 20, 22, 24, 28, 32, 36, 40, 42, 48 2.54 RA SDIP (Shrink Dual-in-line Package) 30, 42, 64 1.778 ZIP (Zig-Zag In-line Package) 20, 24, 28, 40 1.27 RD 50mil pitch type SOP (Small Outline Package) 8, 16, 24, 28, 32, 40, 44 1.27 MA heat resistant SSOP (Shrink Small Outline Package) 20, 30, 32, 6 ... | Original |
157 pages, |
SOJ42-P-400-1 DIP18-P-300-2 DIP20-P-300-2 20-P-300 ZIP28 TQFP48-P-0707-0 TQFP44-P-1010-0 ZIP28-P-400-1 ssop64 SOJ28-P-300-1 SOJ32-P-400-1 SOJ28-P-400-1 LQFP144-P-2020-0 QFP304-P-4040-0 datasheet abstract |
| Abstract: Package Overview I Type Typical Sample Semiconductor Pin Counts Pitches [mm] OKI Suffix DIP (Dual-in-line Package) 8, 14, 16, 18, 20, 22, 24, 28, 32, 36, 40, 42, 48 2.54 RA SDIP (Shrink Dual-in-line Package) 30, 42, 64 1.778 ZIP (Zig-Zag In-line Package) 20, 24, 28, 40 1.27 RD 50mil pitch type SOP (Small Outline Package) 8, 16, 24, 28, 32, 40, 44 1.27 MA heat resistant SSOP (Shrink Small Outline Package) 8, 14, 20, 30 ... | Original |
169 pages, |
MSM6778BAV-Z-01 MARK W1 TSOP DIP20-P-300-2 DIP14-P-300-2 TSOP infrared datasheet abstract |
| Abstract: LDB6x51 Evaluation Board for LXT6051 LXT6051, LXT6251A LXT6251A, and LXT6282 LXT6282 Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LDB6x51 Evaluation Board for LXT6051 LXT6051, LXT6251 LXT6251, and LXT6282 LXT6282 User Guide. Order Number: 249305-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel' ... | Original |
22 pages, |
STM-1 E2 liu JP16 LDB6 LDB60 LXT334 LXT6051 LXT6251A quad 74HC04 NOT GATE datasheet 74AC04 motorola LXT6282 intel pdh e2 LXT6251 LXT6051 abstract |
| Abstract: TM TM The Rockwell WaveArtistTM 100 (RWA100 RWA100) WaveArtistTM 300 (RWA300 RWA300) are complete audio system devices, each packaged in a low profile, small footprint, 208-pin ball grid array (BGA). These pin-compatible devices support a single design providing an increasing level of functionality from FM synthesis (RWA100 RWA100) to FM and high quality music wavetable synthesis with optional effects processor upgrade (RWA300 RWA300). (See Table 1.) All models support FM synthesis, 16-bit ... | Original |
18 pages, |
RWA300 RWA100 RWA035 MPU-401 MIDI WAVETABLE DSP MD151 digital reverb processor diagram RWA100/RWA300 RWA100 abstract |
| Abstract: WaveArtistTM 100 and WaveArtistTM 300 Audio System Devices Designer's Guide (Preliminary) Order No. 1104 Rev. 1, October 3, 1996 WaveArtistTM 100/300 Audio System Devices Designer's Guide NOTICE Information furnished by Rockwell International Corporation is believed to be accurate and reliable. However, no responsibility is assumed by Rockwell International for its use, nor any infringement of patents or other rights of third parties which may result from its use. No license is ... | Original |
64 pages, |
BGA rockwell EFFECTS audio schematic hy 214 MPU-401 NB b6 smd transistor Rockwell C19 Rockwell Collins RWA100 RWA300 transistor pnp d640 Yamaha professional audio mixer schematics delay reverb datasheet abstract |
| Abstract: Motor control 1 TeSys range provide you more simplicity, compactness, openness and flexibility . so many evolutions and new items to aid your productivity. 2 Accurate and reliable control of motors 3 4 5 6 7 Increase your productivity, adopt our solutions which help to simplify setting-up. 8 Motor starters p Ready-to-use component combinations, designed to work together in perfect harmony. 9 p Safe operation and level of coordination guaranteed by a maj ... | Original |
52 pages, |
LC1-D150 LC1-D38 schneider LC1-D25 schneider LC1-D80 LAD4TGDL LC1 K12 Schneider LC1-D32 LC1D40A LC1D65A schneider LC1-D38 LC1-D25 LC1-D09 installation manual LC1-D12 LC1-D50A datasheet abstract |
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| c33d7 81df1d 635adb6c201b6ba1b0c11a7 www.datasheetarchive.com/download/41848725-920336ZC/slvm669.zip (tps84250.lib) |
Texas Instruments | 31/08/2012 | 54.47 Kb | ZIP | slvm669.zip |
| *$ENCRYPTED_LIB *$INTERFACE *$ * TPS51427A TPS51427A TPS51427A TPS51427A * * (C) Copyright 2010 Texas Instruments Incorporated. All rights reserved. * * This model is designed as an aid for customers of Texas Instruments. * TI and its licensors and suppliers make no warrenties, either expressed * or implied, with respect to this model, including the warranties of * www.datasheetarchive.com/download/38801730-918361ZC/slim247.zip (tps51427A.lib) |
Texas Instruments | 06/08/2011 | 100.9 Kb | ZIP | slim247.zip |
| !PADS-POWERPCB-V3.5-MILS! DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 0 2=Inches 1=Metric 0=Mils USERGRID 25 Space between USER grid points MAXIMUMLAYER 4 Maximum routing layer WORKLEVEL 1 Level items will be created on DISPLAYLEVEL 1 toggle for displaying working level last LAYERPAIR 1 4 Layer pair used to route connection VIAMODE T www.datasheetarchive.com/download/72443479-365117ZC/385a.zip (Dc385a-1.asc) |
Linear | 22/09/2009 | 874.31 Kb | ZIP | 385a.zip |
| !PADS-POWERPCB-V5.0-INCHES! DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 2 2=Inches 1=Metric 0=Mils USERGRID 0.005 0.005 Space between USER grid points MAXIMUMLAYER 4 Maximum routing layer WORKLEVEL 1 Level items will be created on DISPLAYLEVEL 1 toggle for displaying working level last LAYERPAIR 1 2 Layer pair used to route connection VIAMODE T www.datasheetarchive.com/download/85057294-365134ZC/425b.zip (DC425B.asc) |
Linear | 22/09/2009 | 614.47 Kb | ZIP | 425b.zip |
| !PADS-POWERPCB-V5.0-INCHES! DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 2 2=Inches 1=Metric 0=Mils USERGRID 0.01 0.01 Space between USER grid points MAXIMUMLAYER 4 Maximum routing layer WORKLEVEL 4 Level items will be created on DISPLAYLEVEL 1 toggle for displaying working level last LAYERPAIR 1 2 Layer pair used to route connection VIAMODE T www.datasheetarchive.com/download/36717761-365282ZC/797a.zip (DC797A-1.asc) |
Linear | 22/09/2009 | 589.26 Kb | ZIP | 797a.zip |
| *$ENCRYPTED_LIB *$INTERFACE * TPA3116D2 TPA3116D2 TPA3116D2 TPA3116D2_AVG * * (C) Copyright 2012 Texas Instruments Incorporated. All rights reserved. * * This model is designed as an aid for customers of Texas Instruments. * TI and its licensors and suppliers make no warranties, either expressed * or implied, with respect to this model, including the warranties o www.datasheetarchive.com/download/8648241-919445ZC/slom309.zip (TPA3116D2_AVG.LIB) |
Texas Instruments | 22/05/2012 | 30.4 Kb | ZIP | slom309.zip |
| ISO-10303-21 ISO-10303-21 ISO-10303-21 ISO-10303-21; HEADER; /* * Generated by software with PDE/Lib inside * * PDElib Version 4.0, created Wed Jun 15 17:58:53 EDT 2005 * * International Technegroup Inc. (www.iti-oh.com) * */ FILE_DESCRIPTION(''),'2;1'); www.datasheetarchive.com/download/16644132-65294ZC/as-1060-0000.zip (AS-1060-0000.stp) |
Beckhoff | 10/11/2009 | 37.22 Kb | ZIP | as-1060-0000.zip |
| !PADS-POWERPCB-V3.5-INCHES! DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 2 2=Inches 1=Metric 0=Mils USERGRID 0.01 Space between USER grid points MAXIMUMLAYER 4 Maximum routing layer WORKLEVEL 1 Level items will be created on DISPLAYLEVEL 1 toggle for displaying working level last LAYERPAIR 1 4 Layer pair used to route connection VIAMODE T www.datasheetarchive.com/download/480843-365088ZC/292.zip (Dc292b-1.asc) |
Linear | 22/09/2009 | 829.43 Kb | ZIP | 292.zip |
| S 1 ,12HEL9011 12HEL9011 12HEL9011 12HEL9011_solid,27HNo Iges File Name specified,22HAutodesk Inventor 20G 1 09,37HAutoDesk Inventor Iges Exporter R2009 R2009 R2009 R2009,32,38,6,99,15,12HEL9011 12HEL9011 12HEL9011 12HEL9011_soliG 2 3 m,11,0,; G 4 406 1 0 0 1 0 0 000000000D 000000000D 000000000D 000000000D 1 406 www.datasheetarchive.com/download/43654162-65455ZC/el9011.zip (EL9011.igs) |
Beckhoff | 10/11/2009 | 35.84 Kb | ZIP | el9011.zip |
| _LOOP( '', ( #1862, #1863, #1864, #1865 ) ); #940 = AXIS2_PLACEMENT_3D( '', #1866, #1867, #1868 ); #941 = EDGE www.datasheetarchive.com/download/27777404-65201ZC/al2009_primaerteil_stp.zip (AL2009_Primaerteil.stp) |
Beckhoff | 10/11/2009 | 62.31 Kb | ZIP | al2009_primaerteil_stp.zip |
| Part | Similar Part | Notes |