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D1213A-02SOL-7 Diodes Incorporated Trans Voltage Suppressor Diode, 3.3V V(RWM), Unidirectional, 1 Element, Silicon, GREEN, PLASTIC PACKAGE-3 visit Digikey Buy
D1213A-02SM-7 Diodes Incorporated Trans Voltage Suppressor Diode, Unidirectional, 1 Element, Silicon visit Digikey Buy
D1213A-01SO-7 Diodes Incorporated Trans Voltage Suppressor Diode, Unidirectional, 1 Element, Silicon visit Digikey Buy
D1213A-01LP-7B Diodes Incorporated Trans Voltage Suppressor Diode, 3.3V V(RWM), Unidirectional, 1 Element, Silicon, GREEN, PLASTIC, X1-DFN1006-2, 2 PIN visit Digikey Buy
D1213A-02SO-7 Diodes Incorporated Trans Voltage Suppressor Diode, Unidirectional, 1 Element, Silicon visit Digikey Buy
D1213A-01T-7 Diodes Incorporated Trans Voltage Suppressor Diode, 3.3V V(RWM), Unidirectional, 1 Element, Silicon, visit Digikey Buy

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Part : D1213A-01LP-7B Supplier : Diodes Manufacturer : New Advantage Stock : 20,000 Best Price : $0.0401 Price Each : $0.0426
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D1213 Datasheet

Part Manufacturer Description PDF Type
D1213 Semelab METAL GATE RF SILICON FET Original
D1213A-01LP Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01LP4 Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01LP4-7B Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01LP-7B Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC DFN10062 Original
D1213A-01SO Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01SO-7 Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01T Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01T-7 Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC SOD523 Original
D1213A-01W Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01W-7 Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC SOT323 Original
D1213A-01WS Diodes 1 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-01WS-7 Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC SOD323 Original
D1213A-02S Diodes 2 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-02S-7 Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC SOT353 Original
D1213A-02SM Diodes 2 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-02SM-7 Diodes TVS - Diodes, Circuit Protection, TVS DIODE 3.3VWM 17VC SOT25 Original
D1213A-02SO Diodes 2 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-02SO-7 Diodes 2 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
D1213A-02SOL Diodes 2 CHANNEL LOW CAPACITANCE TVS DIODE ARRAY Original
Showing first 20 results.

D1213

Catalog Datasheet MFG & Type PDF Document Tags

LTC521

Abstract: LTC215X-14 Application VDD OVDD D12_13 · · · D0_1 LTC2152-14: 32K Point FFT, fIN = 15MHz, ­1dBFS, 250Msps 0 ­20 , -14/LTC2150-14 Absolute Maximum Ratings (Notes 1, 2) Pin Configuration TOP VIEW PAR/SER D12_13+ D12_13 , pins of each LVDS output pair. D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29 , , the overflow is set to 0. Functional Block Diagram VDD OVDD D12_13 · · · D0_1 ANALOG INPUT S , _1+ D12_13­ D12_13+ OF ­ OF + D0N-5 tD D12N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D13N
Linear Technology
Original
LTC521 LTC215X-14 LTC2152-14/ LTC2151-14/LTC2150-14 2152-14/LTC2151-14/LTC2150-14 85LSB 25LSB

d13n3

Abstract: sck 124 442 GND 215314 TA01a 0 ­20 DDR LVDS AMPLITUDE (dBFS) ANALOG INPUT D12_13 · · · D0 , _11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 37 36 35 34 33 , Table 2). D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34 , CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 · · · D0_1 OGND BUFFER CLOCK DDR , _1+ INVALID OFN-4 INVALID OFN-3 INVALID tD D12_13­ D12_13+ OF­ OF+ 215314 TD01
Linear Technology
Original
LTC2153-14 d13n3 sck 124 442 LTC2153UJ-14 LTC2153C LTC2153CUJ-14 35LSB 11LSBRMS LT5527 400MH 900MH

SDI video mixer circuit diagram

Abstract: Amplifier gain 5000, 10000, 20000 CMRR 80dB at 50 TA01a 0 ­20 DDR LVDS AMPLITUDE (dBFS) ANALOG INPUT D12_13 · · · D0_1 ­40 ­60 , _11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 37 36 35 34 33 , Table 2). D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34 , CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 · · · D0_1 OGND BUFFER CLOCK DDR , _1+ INVALID OFN-4 INVALID OFN-3 INVALID tD D12_13­ D12_13+ OF­ OF+ 215314 TD01
Linear Technology
Original
SDI video mixer circuit diagram Amplifier gain 5000, 10000, 20000 CMRR 80dB at 50 79dBFS LT5575 800MH LTC6409 100MH LTC6412 240MH

LTC2151C

Abstract: LTC2152-14 CORRECTION LOGIC OUTPUT DRIVERS D12_13 · · · D0_1 OGND CLOCK/DUTY CYCLE CONTROL ­20 , , 2) D10_11­ D10_11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP , , the overflow is set to 0. D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29 , OUTPUT DRIVERS VCM BUFFER D12_13 · · · D0_1 DDR LVDS OGND BUFFER GND CLOCK , Differential LVDS N tAP N+3 N+2 N+1 tL tH ENC­ ENC+ CLKOUT + CLKOUT ­ D0_1­ D0_1+ D12_13
Linear Technology
Original
LTC2151C LTC2152C W/316 W/290 82LSBRMS QFN-24 LTC6420-20

d13n-3

Abstract: LT 8216 CORRECTION LOGIC OUTPUT DRIVERS D12_13 · · · D0_1 OGND CLOCK/DUTY CYCLE CONTROL ­20 , , 2) D10_11­ D10_11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP , . D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34): Double-Data , -BIT PIPELINED ADC S/H VCM 0.1µF CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 · · , tH ENC­ ENC+ CLKOUT + CLKOUT ­ D0_1­ D0_1+ D12_13­ D12_13+ OF ­ OF + tC D0N
Linear Technology
Original
d13n-3 LT 8216 LTC2150C QFN-36 LT5517 300MH QFN-20 LTM9002

LTC2262-IUJ14

Abstract: tl 2262 39 38 37 36 35 34 33 32 31 DNC D10_11 DNC D12_13 DNC OF VCM VREF VDD , 32°C/W EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB D10_11­ D10_11+ D12_13­ D12_13 , -5 D0_1 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13 OFN , -3 D12N-2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN , RATE CMOS OUTPUT MODE All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13 (Pins 18
Linear Technology
Original
LTC2262-14 LTC2262-IUJ14 tl 2262 LTC2262IUJ-14 tl 2262 am LTC2262CUJ-14 d12n marking LTC2284 LTC2299 LTC5517 LTC5527 LTC5557

LTC2262IUJ-14

Abstract: d12n marking Temperature Range. ­65°C to 150°C PIN CONFIGURATIONS D12_13 D10_11 SENSE FULL-RATE CMOS , RATE LVDS OUTPUT MODE TOP VIEW D12_13+ D12_13­ D10_11+ D2_3­ D10_11­ 30 D8_9+ 29 D8_9­ 28 CLKOUT+ 27 , -4 tD D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 N+1 N+2 N+3 N+4 · · · D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N , INPUT N tH tL ENC­ ENC+ D0_1+ D0_1­ D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN-4 tC OFN-3 OFN , All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34
Linear Technology
Original
QFN-16 80/105/125M

TL 2262

Abstract: LTC2262IUJ-14 DNC D10_11 DNC D12_13 DNC OF VCM VREF VDD D10 D11 D12 D13 DNC , , MUST BE SOLDERED TO PCB D10_11­ D10_11+ D12_13­ D12_13+ OF­ OF+ VCM VREF , -5 D0_1 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13 OFN , -3 D12N-2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN , RATE CMOS OUTPUT MODE All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13 (Pins 18
Linear Technology
Original
integrated circuit TL 2262 balun 75/150 datasheet MX25L1605AM2C LTC2262C LTC2262I LTC2262UJ-14 LTC5575 LTC6400-20 LTC6604-2 LTC6604 LTC6604-10/ LTC6604-15
Abstract: eye-diagram measurement with D1213A. Table 1 shows the readout of the eye-diagrams and the degradation caused by D1213A. The result shows that Diodes low capacitance ESD protection device has an extremely , AN77 AN77 Diodes high speed data line ESD protector D1213A provides excellent USB2.0 protection , D1213A has extremely low impact on the high speed data signals. USB2.0 protection and signal , to satisfy the aforementioned requirements, Diodes protection family of D1213A devices are Diodes
Original

MABAE50060

Abstract: . ­65°C to 150°C PIN CONFIGURATIONS D12_13 D10_11 SENSE FULL-RATE CMOS OUTPUT MODE TOP VIEW VREF DNC , VIEW D12_13+ D12_13­ D10_11+ D2_3­ D10_11­ 30 D8_9+ 29 D8_9­ 28 CLKOUT+ 27 CLKOUT­ 41 26 OVDD 25 OGND , -3 D1N-3 D0N-2 D1N-2 N+1 N+2 N+3 N+4 · · · D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N , tH tL ENC­ ENC+ D0_1+ D0_1­ D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN-4 tC OFN-3 OFN , DATA RATE CMOS OUTPUT MODE All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13 (Pins
Linear Technology
Original
MABAE50060 LTC2261-14 LTC2260-14/LTC2259-14 125/105/80M 2261-14/LTC2260-14/LTC2259-14 W/106
Abstract: _11â'" D10_11+ D12_13â'" D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 , cycle stabilizer (see Table 2). D0_1â'"/D0_1+ to D12_13â'"/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25 , -3 INVALID tD D12_13â'" D12_13+ OFâ'" OF+ 215314 TD01 tSKEW SPI Port Timing (Readback Mode , each differential output pair. There are seven LVDS output pairs (D0_1+/D0_1â'" through D12_13â'"/D12_13 , D10_11â'" + D10_11+ C10 1µF D12_13â'" REGULATED 1.8V VDD OVDD D12_13+ L4 Linear Technology
Original
32VP-P LTM9003

C3460

Abstract: c3688 D1840 C3451 C3638 16 C4109 20 B904 D1213 C3664 K1450 25 B1231 D1841
-
OCR Scan
C3152 C3459 K1461 C3460 C3685 C3040 c3688 C3042 C3461 C3552 C3151 C3458 C3088 C3448
Abstract: _11â'" D10_11+ D12_13â'" D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 , _1â'"/D0_1+ to D12_13â'"/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34): Double-Data Rate , +1 tL tH ENCâ'" ENC+ CLKOUT + CLKOUT â'" D0_1â'" D0_1+ D12_13â'" D12_13+ tC D0N , _1â'" through D12_13â'"/D12_13+). Overflow (OF+/OFâ'") and the data output clock (CLKOUT+/CLKOUTâ'") each have , OUTPUT DRIVERS D12_13 â'¢ â'¢ â'¢ D0_1 OGND CLOCK/DUTY CYCLE CONTROL â'"20 DDR LVDS Linear Technology
Original
W/338 W/313

EDGE-CON-100

Abstract: R4801 SENSE VREF VCM VDD OF- D12_13- D12_13+ D10_11+ D10_11- OF+ AIN+ AINGND
-
Original
FIN1108 EDGE-CON-100 DC1369A R4801 LT1763CDE D1011 PCF8574T MABA-007159-000000 MABAES0060 LTC2259-14 LTC2258-14

38GHz

Abstract: LTC2256-14 . ­65°C to 150°C Pin Configurations D12_13 D10_11 SENSE FULL-RATE CMOS OUTPUT MODE TOP VIEW VREF DNC , VIEW D12_13+ D12_13­ D10_11+ D2_3­ D10_11­ 30 D8_9+ 29 D8_9­ 28 CLKOUT+ 27 CLKOUT­ 41 26 OVDD 25 OGND , +4 · · · D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 OF CLKOUT+ CLKOUT ­ OFN , Levels tAP ANALOG INPUT N tH ENC­ ENC+ D0_1+ D0_1­ D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ D12N-5 D13N , . Double Data Rate CMOS Output Mode All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13
Linear Technology
Original
38GHz LTC2256-14 LTC2257-14/LTC2256-14 65/40/25M 2258-14/LTC2257-14/LTC2256-14 13LSBRMS W/127

D13N3

Abstract: WBC1-1LB 39 38 37 36 35 34 33 32 31 DNC D10_11 DNC D12_13 DNC OF VCM VREF VDD , °C, JA = 32°C/W EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB D10_11­ D10_11+ D12_13­ D12_13+ OF­ OF+ VCM VREF SENSE VDD DOUBLE DATA RATE LVDS OUTPUT MODE TOP VIEW , · D12_13 OFN-5 OF OFN-4 OFN-2 tC tC CLKOUT+ OFN-3 CLKOUT ­ 226114 , -4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT
Linear Technology
Original
WBC1-1LB LTC2259C LTC2259I LTC2260C LTC2260I LT 8195

D13N3

Abstract: D12N-4 . ­65°C to 150°C PIN CONFIGURATIONS 40 39 38 37 36 35 34 33 32 31 DNC D10_11 DNC D12_13 , _11­ D10_11+ D12_13­ D12_13+ OF­ OF+ VCM VREF SENSE VDD DOUBLE DATA RATE LVDS , _1 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13 OFN-5 OF , -2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN-4 OFN , _1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34): Double Data Rate Digital Outputs. Two data bits are
Linear Technology
Original
LTC2256C LTC2257C LTC2257I LTC2258C LTC2258I

D13N3

Abstract: LTC2262IUJ-14 . ­40°C to 85°C Storage Temperature Range. ­65°C to 150°C Pin Configurations D12_13 , BE SOLDERED TO PCB DOUBLE DATA RATE LVDS OUTPUT MODE TOP VIEW D12_13+ D12_13­ D10_11+ D2_3­ D10 , -4 tD D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 N+1 N+2 N+3 tL N+4 · · · D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N , INPUT N tH ENC­ ENC+ D0_1+ D0_1­ D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ D12N-5 D13N-5 D12N-4 D13N , All Pins Below Have CMOS Output Levels (OGND to OVDD) D0_1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34
Linear Technology
Original
mark d13n LTC2262IUJ-14#TRPBF

LTC2256C

Abstract: LTC2257C DNC D10_11 DNC D12_13 DNC OF VCM VREF VDD D10 D11 D12 D13 DNC , , MUST BE SOLDERED TO PCB D10_11­ D10_11+ D12_13­ D12_13+ OF­ OF+ VCM VREF , _1 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13 OFN-5 OF , -2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN-4 OFN , _1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34): Double Data Rate Digital Outputs. Two data bits are
Linear Technology
Original
Abstract: -RSC141D1213 R SC 1 4 1 D1213 -
OCR Scan
125VAC 250VAC 500VDC 1000VAC 14-RSC141D1213
Abstract: TA01a 0 ­20 DDR LVDS AMPLITUDE (dBFS) ANALOG INPUT D12_13 · · · D0_1 ­40 ­60 , _11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 37 36 35 34 33 , Table 2). D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34 , CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 · · · D0_1 OGND BUFFER CLOCK DDR , _1+ INVALID OFN-4 INVALID OFN-3 INVALID tD D12_13­ D12_13+ OF­ OF+ 215314 TD01 Integrated Silicon Solution
Original
IS62WV51216ALL IS62WV51216BLL IS62WV51216ALL/ 62WV51216ALL 62WV51216BLL

62WV51216ALL

Abstract: IS62WV51216BLL-55TLI GND 215314 TA01a 0 ­20 DDR LVDS AMPLITUDE (dBFS) ANALOG INPUT D12_13 · · · D0 , _11+ D12_13­ D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 37 36 35 34 33 , Table 2). D0_1­/D0_1+ to D12_13­/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25, 28/29, 31/32, 33/34 , CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 · · · D0_1 OGND BUFFER CLOCK DDR , _1+ INVALID OFN-4 INVALID OFN-3 INVALID tD D12_13­ D12_13+ OF­ OF+ 215314 TD01
Integrated Silicon Solution
Original
IS62WV51216BLL-55TLI IS62WV51216BLL-55BLI
Abstract: TA01a â'"20 DDR LVDS AMPLITUDE (dBFS) ANALOG INPUT D12_13 â'¢ â'¢ â'¢ D0_1 â , _11â'" D10_11+ D12_13â'" D12_13+ GND SDO SDI SCK CS PAR/SER TOP VIEW 40 39 38 , cycle stabilizer (see Table 2). D0_1â'"/D0_1+ to D12_13â'"/D12_13+ (Pins 16/17, 18/19, 22/23, 24/25 , ADC S/H VCM 0.1µF GND CORRECTION LOGIC OUTPUT DRIVERS VCM BUFFER D12_13 â , -3 INVALID tD D12_13â'" D12_13+ OFâ'" OF+ 215314 TD01 tSKEW SPI Port Timing (Readback Mode Synqor
Original
MCOTS-C-270-28-FT

BA5946FP

Abstract: BA6297AFP DNC D10_11 DNC D12_13 DNC OF VCM VREF VDD D10 D11 D12 D13 DNC , , MUST BE SOLDERED TO PCB D10_11­ D10_11+ D12_13­ D12_13+ OF­ OF+ VCM VREF , _1 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 · · · D12_13 OFN-5 OF , -2 D13N-2 · · · D12_13+ D12_13­ OF+ OF­ CLKOUT+ CLKOUT ­ OFN-5 tC OFN-4 OFN , _1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34): Double Data Rate Digital Outputs. Two data bits are
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Original
BA5946FP BA6392FP BA6297AFP HSOP28 BA5946 CH3F
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