CY7C245A CY7C291A CY7C293A 7C245E EME-6300H 7C245A/7C291A/7C293A STD-008 UL-94V - Datasheet Archive

 

April 1992 QTP 91211 16K PROM FAMILY (0.8µ) MARKETING PART NBR DEVICE DESCRIPTION CY7C245A 2K x 8 REGISTERED CY7C291A 2K x

 

Qualification Report April 1992 QTP 91211 16K PROM FAMILY (0.8µ) MARKETING PART NBR DEVICE DESCRIPTION CY7C245A CY7C245A 2K x 8 REGISTERED CY7C291A CY7C291A 2K x 8 CY7C293A CY7C293A 2K x 8 POWERDOWN Version 1.0 PRODUCT DESCRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied: Marketing Part #: CY7C245A CY7C245A Device Description: 2K x 8 Registered Prom Cypress Division: Cypress Semiconductor Corporation Overall Die (or Mask) REV Level (pre-requisite for qualification): Die Size (stepping): 77 mils x 122 mils E What ID markings on Die: 7C245E 7C245E Cypress Qualification completion/Marketing Availability Dates (Current REV): 1991 Now TECHNOLOGY/FAB PROCESS DESCRIPTION Number of Metal Layers: 1 Metal Composition: Passivation Type and Materials: Metal 1: 1%SiAl, Ti 4,000A 2%P LTO + 15,000A Oxynitride Free Phosphorus contents in top glass layer(%): Die Coating(s), if used: None None Generic Process Technology/Design Rule (µ-drawn): CMOS, Double Poly, Metal / 0.8µm Gate Oxide Material/Thickness (MOS): SiO2 / 245A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor, Round Rock, Tx (Fab 2) Die Fab Line ID/Wafer Process ID: Fab 2 / P20A PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 24-pin, 300-mil Plastic DIP Die to Package edge clearance: 65 mils per side Mold Compound Name/Manufacturer: Lead Frame material: Sumitomo EME-6300H EME-6300H(R) Copper Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 160 mils x 210 mils Die Attach Method: Epoxy Die Attach Material: Silver Epoxy Wire Bond Method: Thermocompression Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / P27 CYPRESS SEMICONDUCTOR PAGE 3 PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 24-pin, 300-mil SOIC/SOJ Die to Package edge clearance: 65 mils per side Mold Compound Name/Manufacturer: Lead Frame material: Sumitomo EME-6300H EME-6300H(R) Copper Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 160 mils x 200 mils Die Attach Method: Epoxy Die Attach Material: Silver Epoxy Wire Bond Method: Thermocompression Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / S32 HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 24-pin, 300-mil Windowed/Non-windowed CerDIP Die to Package edge clearance: 62 mils per side Mold Compound Name/Manufacturer: Lead Frame material: N/A Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 170 mils x 270 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / D2 HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 28-pin, Square Windowed/Non-windowed LCC Die to Package edge clearance: 160 mils per side Mold Compound Name/Manufacturer: Lead Frame material: N/A Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 250 mils x 250 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / L3 CYPRESS SEMICONDUCTOR PAGE 4 OTHER INFORMATION For approval by similarity, identify other devices using the same basic die with bonding or metal mask options or test selections and explain: 7C245A/7C291A/7C293A 7C245A/7C291A/7C293A - Metal Mask Options If Cypress is planning any changes in the near future, identify change (Qtr/Yr) in: Die Design Rev./Shrink/Date: None Die Process Change/Date: None Fab/Assembly site change/Date: None Cross Licensee/Licensor/Date: None Other Devices to be qualified in this technology: None Other Packages to be qualified for this device: None ESD Voltage Rating (per MIL STD-008 STD-008, Method 3018): >1,000V Flammability Classification (UL-94V UL-94V): UL-94V0 UL-94V0 1/8 Alternate Fab/Assembly Locations: Fab: Fab 1, San Jose, CA Assembly : PDIP - Omedata, Indonesia Please attach the following Qualification / Reliability data for the die revision and Package type, for the fab and assembly sites identified above (mark [X] if included): 1 X HAST (5.5V, 130°C, 85%RH, 15psig) 7 2 X Temperature Cycle (-65°C to 150°C) 8 Data Retention Bake, Plastic (165°C) 9 3 X Operating Life at (temp): 150°C Latchup Testing X Steady State Life (HTSSL, 5.75V, 150°C) 4 X Data Retention Bake, Hermetic (250°C) 10 Temperature Humidity Bias (5.5V, 85°C, 85%RH) 5 X Autoclave (PCT, 121°C, 100%RH) 11 Other: Aged Bond Strength 6 X ESD Tests (MIL-STD 883, method 3015) 12 Other: Alpha Particle Sensitivity CYPRESS SEMICONDUCTOR PAGE 5 PRODUCT INFORMATION FOR QUALIFICATION BY SIMILARITY Product Family: 16K PROM Family, 0.8µ µ Mfg Division: Cypress Semiconductor Supplier's Part Number Rated Speed Pkg Size/ Type Die Revision /ID Die Size mil x mil (stepping) Design Rule (µ) µ Fabrication Passivation Mold Assembly ESD Volt Type Compound Line Rating Location Availability (mm/yy) Process Line ID ID 7C245A 7C245A -xxPC -xxSC -xxDC -xxDMB -xxWC -xxWMB -xxLC -xxLMB -xxQMB 25ns to 45ns 24.3 PDIP 24.3 SOIC 24.3 CDIP 24.3 CDIP 24.3 WDIP 24.3 WDIP 28S LCC 28S LCC 28S WLCC 7C245E 7C245E 77 x 122 0.8µ CMOS P20A 2 LTO + Oxynitride Sumitomo San Jose, CA >1,000V HBM Now 7C291A 7C291A -xxPC -xxSC -xxDC -xxDMB -xxWC -xxWMB -xxLC -xxLMB -xxQMB 20ns to 50ns 24.3 PDIP 24.3 SOIC 24.3 CDIP 24.3 CDIP 24.3 WDIP 24.3 WDIP 28S LCC 28S LCC 28S WLCC 7C291E 7C291E 77 x 122 0.8µ CMOS P20A 2 LTO + Oxynitride Sumitomo San Jose, CA >1,000V HBM Now 7C293A 7C293A -xxPC -xxSC -xxDC -xxDMB -xxWC -xxWMB -xxLC -xxLMB -xxQMB 20ns to 50ns 24.3 PDIP 24.3 SOIC 24.3 CDIP 24.3 CDIP 24.3 WDIP 24.3 WDIP 28S LCC 28S LCC 28S WLCC 7C293E 7C293E 77 x 122 0.8µ CMOS P20A 2 LTO + Oxynitride Sumitomo San Jose, CA >1,000V HBM Now CYPRESS SEMICONDUCTOR PAGE 6 NOTE: "xx" replaces all speed options for these devices. Options for 7C245A 7C245A are 25ns, 35ns, and 45ns; military available from 35ns to 45ns. Options for 7C291A/293A 7C291A/293A are 20ns, 25ns, 35ns, 35ns, 50ns; military are available from 25ns to 50ns only. CYPRESS SEMICONDUCTOR PAGE 7 DEVICE RELIABILITY SUMMARY Marketing Part: Pkg Description: CY7C245A CY7C245A 24-pin, 300-mil Wafer Fab: Assembly: Fab 2 - Round Rock, Tx Cypress - San Jose, CA High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C) - Early Failure Rate Device Lot# 48 Hours Cumulative 7C291E 7C291E 2043349 0/1998 0/1998 High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C) - Latent Failure Rate Device Lot# 80 Hours 500 Hours Cumulative 7C291E 7C291E 2043349 0/346 0/346 0/346 High Temperature Steady State Life Test (HTSSL, 5.75V, 150°C) Device Lot# 80 Hours 168 Hours Cumulative 7C291E 7C291E 7C245E 7C245E 2043349 2117278 0/129 0/129 0/129 0/129 0/258 Group C High Temperature Dynamic Operating Life Test (HTSSL, 5.75V, 150°C) Device Lot# 184 Hours Cumulative 7C291E 7C291E 2043349 0/80 0/80 Data Retention Bake, Hermetic Packaged Devices (No bias, 250°C) Device Lot# 81 Hours 162 Hours Cumulative 7C291E 7C291E 2042249 0/129 0/129 0/129 Temperature Cycle (Condition C, -65°C to 150°C) Device Lot# 100 Cycles 1000 Cycles Cumulative 7C291E 7C291E 2043349 1/76 0/75 1/76: Fine Leak Failure CYPRESS SEMICONDUCTOR PAGE 8 Pressure Cooker (121°C, 100% R.H., unbiased) Device Lot# 96 Hours 168 Hours Cumulative 7C245E 7C245E 7C291E 7C291E 7C291E 7C291E 2119321 2117278 2139124 0/76 0/76 0/76 0/76 0/76 0/228 HAST (130°C, 85% R.H., 5.5V) Device Lot# 100 Hours Cumulative 7C245E 7C245E 2119321 0/76 0/151 7C291E 7C291E 2117278 0/75 CYPRESS SEMICONDUCTOR PAGE 9 DEVICE RELIABILITY SUMMARY 16K 0.8µ PROM FAMILY CY7C245A/CY7C291A/CY7C293A CY7C245A/CY7C291A/CY7C293A Electrostatic Discharge Human Body Model Circuit per Mil Std 883, Method 3015 >+2,000V Unit 1 >-1,000V >+2,000V Unit 2 >-1,000V >+2,000V Unit 3 >-1,000V (Highest passing voltage, +10% Guard-banded)