CY7C167A 7C167A C167A-2 C167A-1 7C167A-15 7C167A-25 7C167A-35 7C167A-45 - Datasheet Archive

 

16K x 1 Static RAM Features Functional Description · Automatic power-down when deselected · CMOS for optimum

 

CY7C167A CY7C167A 16K x 1 Static RAM Features Functional Description · Automatic power-down when deselected · CMOS for optimum speed/power · High speed - 15 ns · Low active power - 275 mW · Low standby power - 83 mW · TTL-compatible inputs and outputs · Capable of withstanding greater than 2001V electrostatic discharge · VIH of 2.2V The CY7C167A CY7C167A is a high-performance CMOS static RAM organized as 16,384 words by 1 bit. Easy memory expansion is provided by an active LOW chip enable (CE) and three-state drivers. The CY7C167A CY7C167A has an automatic power-down feature, reducing the power consumption by 67% when deselected. Writing to the device is accomplished when the chip select (CE) and write enable (WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A0 through A 13). Reading the device is accomplished by taking the chip enable (CE) LOW, while (WE) remains HIGH. Under these conditions, the contents of the location specified on the address pins will appear on the data output (DO) pin. The output pin remains in a high-impedance state when chip enable is HIGH, or write enable (WE) is LOW. A die coat is used to insure alpha immunity. LogicBlockDiagram Pin Configuration DIP Top View DI A0 A1 A2 A3 A4 A5 A6 DO SENSE AMP A0 A1 A2 A3 A4 A5 A6 ROW DECODER INPUT BUFFER 128 x 128 ARRAY DO WE GND 1 20 2 19 3 18 4 17 5 7C167A 7C167A 16 6 15 7 14 8 13 9 12 10 11 V CC A13 A12 A11 A10 A9 A8 A7 DI CE C167A-2 C167A-2 CE POWER DOWN WE A12 A13 A11 A9 A10 A8 A7 COLUMN DECODER C167A-1 C167A-1 Selection Guide 7C167A-15 7C167A-15 Maximum Operating Current (mA) 7C167A-25 7C167A-25 7C167A-35 7C167A-35 7C167A-45 7C167A-45 20 25 35 45 90 80 60 60 80 Commercial 7C167A-20 7C167A-20 15 Maximum Access Time (ns) 70 60 Military Cypress Semiconductor Corporation · 3901 North First Street · 50 San Jose · CA 95134 · 408-943-2600 December 1988 - Revised December 1992 CY7C167A CY7C167A Output Current into Outputs (LOW). 20 mA Maximum Ratings Static Discharge Voltage . >2001V (per MIL-STD-883 MIL-STD-883, Method 3015) (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature . -65°C to+150°C Latch-Up Current. >200 mA Ambient Temperature with Power Applied . -55°C to+125°C Operating Range Range DC Voltage Applied to Outputs in High Z State . -0.5V to +7.0V Ambient Temperature VCC Commercial Supply Voltage to Ground Potential (Pin 20 to Pin 10). -0.5V to +7.0V 0°C to +70°C 5V ± 10% -55°C to +125°C 5V ± 10% Military[1] DC Input Voltage .-3.0V to +7.0V Electrical Characteristics Over the Operating Range[2] 7C167A-15 7C167A-15 Parameter Description Test Conditions 7C167A-20 7C167A-20 7C167A-25 7C167A-25 Min. Min. Min. Max. Max. VOH Output High Voltage VCC = Min., IOH = -4.0 mA VOL Output Low Voltage VCC = Min., IOL = 12.0 mA, 8.0 mA Mil VIH Input High Voltage 2.2 VCC 2.2 VCC VIL Input Low Voltage[3] -0.5 0.8 -0.5 0.8 IIX Input Load Current GND < V I < VCC -10 +10 -10 +10 IOZ Output Leakage Current GND < VO < VCC Output Disabled -10 +10 -10 +10 IOS Output Short Circuit Current[4] VCC = Max., VOUT = GND ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA Com'l ISB Automatic CE Power-Down Current[5] Max. VCC, CE > VIH Com'l 2.4 2.4 0.4 Description Output High Voltage VCC = Min., IOH = -4.0 mA VOL Output Low Voltage Input High Voltage 2.2 VCC V -0.5 0.8 V -10 +10 µA -10 +10 µA -350 mA 90 80 60 mA 80 70 40 20 40 20 40 Min. VCC = Min., IOL = 12.0 mA, 8.0 mA Mil VIH V -350 Mil VOH 0.4 -350 Mil Test Conditions Unit V 0.4 7C167A-35 7C167A-35 Parameter Max. 2.4 Max. 2.4 7C167A-45 7C167A-45 Min. Max. 2.4 0.4 2.2 mA Unit V 0.4 VCC 2.2 V VCC V VIL Input Low Voltage -0.5 0.8 -0.5 0.8 V IIX Input Load Current GND < V I < VCC -10 +10 -10 +10 µA IOZ Output Leakage Current GND < VO < VCC Output Disabled -10 +10 -10 +10 µA IOS Output Short Circuit Current[4] VCC = Max., VOUT = GND -350 -350 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA Com'l 60 50 mA Mil 60 50 Automatic CE Power-Down Current[5] Max. VCC, CE > VIH Com'l 20 Mil 20 ISB [3] mA 20 Notes: 1. TA is the "instant on" case temperature. 2. See the last page of this specification for Group A subgroup testing information. 3. VIL min. = -3.0V for pulse durations less than 30 ns. 4. Duration of the short circuit should not exceed 30 seconds. 5. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given. 2 CY7C167A CY7C167A Capacitance[6] Parameter Description Input Capacitance Output Capacitance Chip Enable Capacitance CIN COUT CCE Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. 10 10 6 Unit pF pF pF AC Test Loads and Waveforms R1 329 (481 MIL) 5V R1 329 (481 MIL) 5V OUTPUT ALL INPUT PULSES 3.0V OUTPUT R2 202 (255 MIL) 30 pF INCLUDING JIG AND SCOPE Equivalent to: (a) INCLUDING JIG AND SCOPE THÉVENIN EQUIVALENT 125 OUTPUT GND R2 202 (255 MIL) 5 pF 90% 10% 90% 10% < 5 ns < 5 ns C167A-4 C167A-4 (b) C167A-3 C167A-3 167 OUTPUT 1.9V Commercial 1.73V Military Switching Characteristics Over the Operating Range[2, 7] 7C167A-15 7C167A-15 Parameter 7C167A-25 7C167A-25 7C167A-35 7C167A-35 7C167A-45 7C167A-45 Min. Description 7C167A-20 7C167A-20 Min. Min. Min. Min. Max. Max. Max. Max. Max. Unit READ CYCLE tRC Read Cycle Time Com'l 15 20 tAA Address to Data Valid Com'l tOHA Data Hold from Address Change tACE CE LOW to Data Valid tLZCE CE LOW to Low Z[8] 25 30 20 Mil 25 35 15 20 Mil 20 5 CE HIGH to High Z tPU CE LOW to Power-Up tPD 15 CE HIGH to Power-Down WRITE CYCLE 5 5 8 25 8 0 0 15 35 10 20 40 5 5 0 ns 35 5 5 ns 30 25 5 20 5 [8, 9] tHZCE 25 ns 40 45 15 20 ns 5 0 ns ns 15 0 20 ns ns ns 25 ns [10] tWC Write Cycle Time 15 20 20 25 40 ns tSCE CE LOW to Write End 12 15 20 25 30 ns tAW Address Set-Up to Write End 12 15 20 25 30 ns tHA Address Hold from Write End 0 0 0 0 0 ns tSA Address Set-Up to Write Start 0 0 0 0 0 ns tPWE WE Pulse Width 12 15 15 20 20 ns tSD Data Set-Up to Write End 10 10 10 15 15 ns tHD Data Hold from Write End 0 0 0 0 0 ns [8, 9] tHZWE WE LOW to High Z tLZWE WE HIGH to Low Z [8] 7 7 5 5 7 5 10 5 15 5 ns ns Notes: 6. Tested initially and after any design or process changes that may affect these parameters. 7. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I OL/IOH and 30-pF load capacitance. 8. At any given temperature and voltage condition, tHZ is less than tLZ for any given device. 9. t HZCE and t HZWE are tested with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady state voltage. 10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 3 CY7C167A CY7C167A Switching Waveforms Read Cycle No. 1[11, 12] tRC ADDRESS tOHA DATA OUT tAA DATA VALID PREVIOUS DATA VALID C167A-5 C167A-5 Read Cycle No. 2 [11, 13] tRC CE tACE tLZCE DATA OUT VCC SUPPLY CURRENT tHZCE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tPD tPU ICC 50% 50% ISB C167A-6 C167A-6 Write Cycle No. 1 (WE Controlled)[10] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATAIN VALID DATA IN tHZWE DATA I/O tHD tLZWE HIGH IMPEDANCE DATA UNDEFINED C167A-7 C167A-7 Notes: 11. WE is high for read cycle. 12. Device is continuously selected, CE = VIL. 13. Address valid prior to or coincident with CE transition LOW. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 4 CY7C167A CY7C167A Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled)[10, 14] tWC ADDRESS tSA tSCE CE tAW tHA tPWE WE tHD tSD DATAIN VALID DATA IN tHZWE HIGH IMPEDANCE DATA UNDEFINED DATA I/O C167A-8 C167A-8 NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.2 NORMALIZED ICC , I SB 1.2 ICC 1.0 0.8 0.6 0.4 0.2 4.5 1.0 0.8 0.6 0.4 5.0 5.5 ISB 0.0 -55 6.0 25 125 1.6 1.3 1.4 NORMALIZED tAA 1.4 1.2 1.1 TA =25°C 1.0 1.2 1.0 VCC =5.0V 0.8 0.9 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 60 50 40 VCC =5.0V TA =25°C 30 20 10 0 0 6.0 0.6 -55 25 125 AMBIENT TEMPERATURE (°C) 5 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 0.8 4.0 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) NORMALIZED tAA VCC =5.0V VIN =5.0V 0.2 ISB 0.0 4.0 ICC OUTPUT SINK CURRENT (mA) NORMALIZED ICC , I SB 1.4 OUTPUT SOURCE CURRENT (mA) Typical DC and AC Characteristics OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 150 125 100 75 VCC =5.0V TA =25°C 50 25 0 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) 5.0 CY7C167A CY7C167A Typical DC and AC Characteristics (continued) TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 2.0 1.5 20.0 10.0 1.0 VCC =4.5V TA =25°C 0.5 1.0 2.0 3.0 4.0 5.0 0.0 0 SUPPLY VOLTAGE (V) 200 400 600 800 1000 CAPACITANCE (pF) NORMALIZED ICC DELTA tAA (ns) NORMALIZED IPO 2.5 0.0 0.0 NORMALIZED ICC vs. CYCLE TIME 1.1 30.0 3.0 VCC =5.0V TA =25°C VIH =0.5V 1.0 0.9 0.8 10 20 Ordering Information Speed (ns) ICC (mA) 15 80 Ordering Code Package Name Package Type Operating Range 50 20-Lead (300-Mil) Molded DIP V5 20-Lead Molded SOJ D6 20-Lead (300-Mil) CerDIP Military CY7C167A-25PC CY7C167A-25PC P5 20-Lead (300-Mil) Molded DIP Commercial V5 20-Lead Molded SOJ D6 20-Lead (300-Mil) CerDIP Military CY7C167A-35PC CY7C167A-35PC P5 20-Lead (300-Mil) Molded DIP Commercial V5 20-Lead Molded SOJ CY7C167A-35DMB CY7C167A-35DMB 45 P5 CY7C167A-35VC CY7C167A-35VC 60 CY7C167A-20PC CY7C167A-20PC CY7C167A-25DMB CY7C167A-25DMB 35 20-Lead Molded SOJ CY7C167A-25VC CY7C167A-25VC 60 20-Lead (300-Mil) Molded DIP V5 CY7C167A-20DMB CY7C167A-20DMB 25 P5 CY7C167A-20VC CY7C167A-20VC 80 CY7C167A-15PC CY7C167A-15PC CY7C167A-15VC CY7C167A-15VC 20 D6 20-Lead (300-Mil) CerDIP Military CY7C167A-45DMB CY7C167A-45DMB D6 20-Lead (300-Mil) CerDIP Military 6 30 CYCLE FREQUENCY (MHz) Commercial Commercial 40 CY7C167A CY7C167A MILITARY SPECIFICATIONS Group A Subgroup Testing Switching Characteristics DC Characteristics Subgroups Parameter VOH 1,2,3 READ CYCLE VOL 1,2,3 tRC 7,8,9,10,11 VIH 1,2,3 tAA 7,8,9,10,11 VIL Max. 1,2,3 tOHA 7,8,9,10,11 IIX 1,2,3 tACE 7,8,9,10,11 IOZ 1,2,3 WRITE CYCLE ICC 1,2,3 tWC 7,8,9,10,11 ISB 1,2,3 tSCE 7,8,9,10,11 tAW 7,8,9,10,11 tHA 7,8,9,10,11 tSA 7,8,9,10,11 tPWE 7,8,9,10,11 tSD 7,8,9,10,11 tHD 7,8,9,10,11 Parameter Document #: 38-00093-C 38-00093-C 7 Subgroups CY7C167A CY7C167A 8 CY7C167A CY7C167A Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 MIL-STD-1835 D-8 Config. A 1. 20-Lead (300-Mil) Molded DIP P5 © Cypress Semiconductor Corporation, 1992. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C167A CY7C167A Package Diagrams (continued) 20-Lead Molded SOJ V5 10