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Part Manufacturer Description Datasheet BUY
CY7C1514KV18-333BZXC Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 visit Digikey Buy
CY7C1514KV18-250BZI Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165 visit Digikey Buy
CY7C1514KV18-250BZC Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165 visit Digikey Buy
CY7C1514KV18-300BZXI Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 visit Digikey Buy
CY7C1514KV18-250BZXC Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 visit Digikey Buy
CY7C1514KV18-250BZXI Cypress Semiconductor QDR SRAM, 2MX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 visit Digikey Buy

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Part : CY7C1514KV18-250BZI Supplier : Cypress Semiconductor Manufacturer : Future Electronics Stock : - Best Price : $126.70 Price Each : $126.70
Part : CY7C1514KV18-250BZXC Supplier : Cypress Semiconductor Manufacturer : Future Electronics Stock : - Best Price : $98.70 Price Each : $98.70
Part : CY7C1514KV18-250BZCKG Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 22 Best Price : - Price Each : -
Part : CY7C1514KV18-250BZI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 102 Best Price : $171.41 Price Each : $210.97
Part : CY7C1514KV18-250BZXC Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 44 Best Price : $131.87 Price Each : $162.30
Part : CY7C1514KV18-250BZXI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 166 Best Price : $171.41 Price Each : $210.97
Part : CY7C1514KV18-250CKB Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 136 Best Price : $114.66 Price Each : $141.12
Part : CY7C1514KV18-250XCKG Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 1,294 Best Price : - Price Each : -
Part : CY7C1514KV18-300BZI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 162 Best Price : $137.59 Price Each : $169.34
Part : CY7C1514KV18-300BZXC Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 11 Best Price : $137.59 Price Each : $169.34
Part : CY7C1514KV18-300BZXI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 102 Best Price : $158.22 Price Each : $194.73
Part : CY7C1514KV18-333BZI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 137 Best Price : $167.7400 Price Each : $206.44
Part : CY7C1514KV18-333BZXC Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 568 Best Price : $167.7400 Price Each : $206.44
Part : CY7C1514KV18-333BZXI Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 152 Best Price : $167.7400 Price Each : $206.44
Part : CY7C1514KV18-333ZCES Supplier : Cypress Semiconductor Manufacturer : Rochester Electronics Stock : 172 Best Price : - Price Each : -
Part : CY7C1514KV18-250BZXI Supplier : Cypress Semiconductor Manufacturer : Chip1Stop Stock : 157 Best Price : $146.00 Price Each : $221.00
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CY7C1514KV18 Datasheet

Part Manufacturer Description PDF Type
CY7C1514KV18-200BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 200MHZ 165FBGA Original
CY7C1514KV18-250BZC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 250MHZ 165FBGA Original
CY7C1514KV18-250BZI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 250MHZ 165FBGA Original
CY7C1514KV18-250BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 250MHZ 165FBGA Original
CY7C1514KV18-250BZXI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 250MHZ 165FBGA Original
CY7C1514KV18-300BZC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 300MHZ 165FBGA Original
CY7C1514KV18-300BZC Cypress Semiconductor 72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V Original
CY7C1514KV18-300BZI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 300MHZ 165FBGA Original
CY7C1514KV18-300BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 300MHZ 165FBGA Original
CY7C1514KV18-300BZXC Cypress Semiconductor 72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V Original
CY7C1514KV18-300BZXI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 300MHZ 165FBGA Original
CY7C1514KV18-333BZC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 333MHZ 165FBGA Original
CY7C1514KV18-333BZC Cypress Semiconductor 72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V Original
CY7C1514KV18-333BZI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 333MHZ 165FBGA Original
CY7C1514KV18-333BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 333MHZ 165FBGA Original
CY7C1514KV18-333BZXC Cypress Semiconductor 72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V Original
CY7C1514KV18-333BZXI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 333MHZ 165FBGA Original

CY7C1514KV18

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: 2M x 36 (2 arrays each of 1M x 36) for CY7C1514KV18. Therefore, only 22 address inputs are needed to , 20 address inputs for CY7C1514KV18. These inputs are ignored when the appropriate port is deselected , to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. enables for a seamless transition between devices , CY7C1512KV18, CY7C1514KV18 ® Configurations CY7C1510KV18 ­ 8M x 8 CY7C1525KV18 ­ 8M x 9 CY7C1512KV18 ­ 4M x 18 CY7C1514KV18 ­ 2M x 36 Separate Independent Read and Write Data Ports Supports concurrent Cypress Semiconductor
Original

350bz

Abstract: 2M x 36 (2 arrays each of 1M x 36) for CY7C1514KV18. Therefore, only 22 address inputs are needed to , 20 address inputs for CY7C1514KV18. These inputs are ignored when the appropriate port is deselected , to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. enables for a seamless transition between devices , CY7C1512KV18, CY7C1514KV18 ® Configurations CY7C1510KV18 ­ 8M x 8 CY7C1525KV18 ­ 8M x 9 CY7C1512KV18 ­ 4M x 18 CY7C1514KV18 ­ 2M x 36 Separate Independent Read and Write Data Ports Supports concurrent
Cypress Semiconductor
Original
350bz

CY7C1512KV18-250BZXC

Abstract: MO-216 CY7C1514KV18. Therefore, only 22 address inputs are needed to access the entire memory array of CY7C1510KV18 and CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These , sections. The same basic descriptions apply to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. lower 18 , CY7C1512KV18, CY7C1514KV18 ® Configurations CY7C1510KV18 ­ 8M x 8 CY7C1525KV18 ­ 8M x 9 CY7C1512KV18 ­ 4M x 18 CY7C1514KV18 ­ 2M x 36 Separate Independent Read and Write Data Ports Supports concurrent
Cypress Semiconductor
Original
CY7C1512KV18-250BZXC MO-216 CY7C1512KV18-250BZC CY7C1525KV18-250BZXC

bzx 650

Abstract: CY7C1514KV18. Therefore, only 22 address inputs are needed to access the entire memory array of CY7C1510KV18 and CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These , . The same basic descriptions apply to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. Read , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 ® 72-Mbit QDR II SRAM 2-Word Burst , x 18 Two-word burst on all accesses CY7C1514KV18 ­ 2M x 36 Double data rate (DDR
Cypress Semiconductor
Original
bzx 650
Abstract: arrays each of 2 M × 18) for CY7C1512KV18, and 2 M × 36 (2 arrays each of 1 M × 36) for CY7C1514KV18. , inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are ignored when the , following sections. The same basic descriptions apply to CY7C1525KV18, and CY7C1514KV18. Functional , CY7C1525KV18 CY7C1512KV18 CY7C1514KV18 72-Mbit QDR® II SRAM Two-Word Burst Architecture 72 , CY7C1512KV18 ­ 4 M × 18 CY7C1514KV18 ­ 2 M × 36 Separate independent read and write data ports Supports Cypress Semiconductor
Original
Abstract: CY7C1514KV18. Therefore, only 22 address inputs are needed to access the entire memory array of CY7C1510KV18 and CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These , CY7C1514KV18. Read Operations The CY7C1512KV18 is organized internally as two arrays of 2M x 18. Accesses , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 ® 72-Mbit QDR II SRAM 2-Word Burst , x 18 2-word Burst on all Accesses CY7C1514KV18 ­ 2M x 36 Double Data Rate (DDR Cypress Semiconductor
Original
Abstract: CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 å2-Mbå¸tå"¯Qå½"R å"¯å­˜å­˜å"¯æ­¢RAMå , â'¢ 408-943-2600 Revised May 4, 2012 CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 , , CY7C1514KV18 å½"[1å:0å¬ 1片 21 Aæ ·20:0æ ¸ 21 RPæ­¢ å"¯ å"¯ 2Må , , CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 å"¯. å , CY7C1512KV18, CY7C1514KV18 å½'Yåå½'1510Kæ­¥1片 å½'Yåå½'1525Kæ­¥1片 å½'Yåå Cypress Semiconductor
Original
1512K 1514K

CY7C1512KV18-250BZXI

Abstract: CY7C1514KV18-300BZI 18) for CY7C1512KV18, and 2M x 36 (2 arrays each of 1M x 36) for CY7C1514KV18. Therefore, only 22 , inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are ignored when the , following sections. The same basic descriptions apply to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 72-Mbit QDRTM-II SRAM 2-Word Burst , x 18 2-word Burst on all Accesses CY7C1514KV18 ­ 2M x 36 Double Data Rate (DDR
Cypress Semiconductor
Original
CY7C1512KV18-250BZXI CY7C1525KV18-167BZC
Abstract: arrays each of 2 M × 18) for CY7C1512KV18, and 2 M × 36 (2 arrays each of 1 M × 36) for CY7C1514KV18. , inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are ignored when the , following sections. The same basic descriptions apply to CY7C1525KV18, and CY7C1514KV18. Functional , CY7C1525KV18 CY7C1512KV18 CY7C1514KV18 72-Mbit QDR® II SRAM Two-Word Burst Architecture 72 , CY7C1512KV18 ­ 4 M × 18 CY7C1514KV18 ­ 2 M × 36 Separate independent read and write data ports Supports Cypress Semiconductor
Original

CY7C1512KV18-250BZXI

Abstract: each of 2 M × 18) for CY7C1512KV18, and 2 M × 36 (2 arrays each of 1 M × 36) for CY7C1514KV18. , CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are , to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. lower 18-bit write data register, provided BWS[1:0 , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 ® Features Configurations CY7C1510KV18 ­ 8 M × 8 CY7C1525KV18 ­ 8 M × 9 CY7C1512KV18 ­ 4 M × 18 CY7C1514KV18 ­ 2 M × 36 Separate independent read and write
Cypress Semiconductor
Original
Abstract: controls D[17:9]. CY7C1514KV18ï'  ï'­ BWS0 controls D[8:0], BWS1 controls D[17:9], BWS2 controls D[26:18 , arrays each of 1 M × 36) for CY7C1514KV18. Therefore, only 22 address inputs are needed to access the , CY7C1514KV18. These inputs are ignored when the appropriate port is deselected. Q[x:0] OutputData output , CY7C1514KV18. Read Operations The CY7C1512KV18 is organized internally as two arrays of 2 M × 18 , CY7C1525KV18 CY7C1512KV18 CY7C1514KV18 72-Mbit QDR® II SRAM Two-Word Burst Architecture 72 Cypress Semiconductor
Original
Abstract: '­ BWS0 controls D[8:0] and BWS1 controls D[17:9]. CY7C1514KV18ï'  ï'­ BWS0 controls D[8:0], BWS1 , ) for CY7C1512KV18, and 2 M × 36 (2 arrays each of 1 M × 36) for CY7C1514KV18. Therefore, only 22 , CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are ignored when the appropriate port is , CY7C1514KV18. Read Operations The CY7C1512KV18 is organized internally as two arrays of 2 M × 18 , CY7C1525KV18 CY7C1512KV18 CY7C1514KV18 72-Mbit QDR® II SRAM Two-Word Burst Architecture 72 Cypress Semiconductor
Original

CY7C1514KV18-333BZI

Abstract: CY7C1512KV18-300BZC each of 2 M × 18) for CY7C1512KV18, and 2 M × 36 (2 arrays each of 1 M × 36) for CY7C1514KV18. , CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These inputs are , to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. Write Operations Write operations are initiated , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 ® Features Configurations CY7C1510KV18 ­ 8 M × 8 CY7C1525KV18 ­ 8 M × 9 CY7C1512KV18 ­ 4 M × 18 CY7C1514KV18 ­ 2 M × 36 Separate independent read and write
Cypress Semiconductor
Original
CY7C1512KV18-300BZC
Abstract: 2M x 36 (2 arrays each of 1M x 36) for CY7C1514KV18. Therefore, only 22 address inputs are needed to , 20 address inputs for CY7C1514KV18. These inputs are ignored when the appropriate port is deselected , to CY7C1510KV18, CY7C1525KV18, and CY7C1514KV18. lower 18-bit write data register, provided BWS[1:0 , CY7C1512KV18, CY7C1514KV18 ® Configurations CY7C1510KV18 ­ 8M x 8 CY7C1525KV18 ­ 8M x 9 CY7C1512KV18 ­ 4M x 18 CY7C1514KV18 ­ 2M x 36 Separate Independent Read and Write Data Ports Supports concurrent Cypress Semiconductor
Original

CY7C1512KV18-250BZXC

Abstract: CY7C1512KV18-250BZI CY7C1514KV18. Therefore, only 22 address inputs are needed to access the entire memory array of CY7C1510KV18 and CY7C1525KV18, 21 address inputs for CY7C1512KV18, and 20 address inputs for CY7C1514KV18. These , CY7C1514KV18. The CY7C1512KV18 is used with a single clock that controls both the input and output , CY7C1510KV18, CY7C1525KV18 CY7C1512KV18, CY7C1514KV18 ® 72-Mbit QDR II SRAM 2-Word Burst , x 18 2-word Burst on all Accesses CY7C1514KV18 ­ 2M x 36 Double Data Rate (DDR
Cypress Semiconductor
Original
CY7C1512KV18-250BZI