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Part : CY7C140-25DC Supplier : Rochester Electronics LLC Manufacturer : Rochester Electronics Stock : - Best Price : - Price Each : -
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CY7C140/ Datasheet

Part Manufacturer Description PDF Type
CY7C140 Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original
CY7C140 Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original
CY7C140-25DC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan
CY7C140-25LC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan
CY7C140-25LC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-25PC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan
CY7C140-30DC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-30DI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-30LC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original
CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original
CY7C140-30PC Cypress Semiconductor 1K x 8 Dual-Port Static RAM Scan
CY7C140-30PC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static RAM Original
CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static Ram Original
CY7C140-30PI Cypress Semiconductor 1K x 8 Dual-Port Static RAM Scan
CY7C140-30PI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-35DC Cypress Semiconductor Multiple Array MatriX High-Density EPLDs Scan
CY7C140-35DC Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
CY7C140-35DI Cypress Semiconductor 1024 x 8 Dual-Port Static RAM Scan
Showing first 20 results.

CY7C140/

Catalog Datasheet MFG & Type PDF Document Tags

B057r

Abstract: cv7c130 CYPRESS SEMICONDUCTOR MbE D 4bE D â  250=^5 QGGbBMO T QCYP 'n^GrLVO. CY7C130/CY7C131 CY7C140 , 16 or more bits using SLAVE CY7C140/ CY7C141 â'¢ BUSY output Hag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for porf-to-port communication Functional Description The CY7C130/CY7C131/CY7C140/ CY7C141 are high-speed CMOS IK by 8 dual-port static RAMs. Hvo ports are provided permitting , -bitdual-portstaticRAMor as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems
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OCR Scan
B057r cv7c130 Zl13 CY7C130 CY7C140/CY7C141 CV7C130/CY7C131 CY7C140/ CY7C130/CY7C131/CY7C140/ CY7CI41

cy7c131

Abstract: CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS Features â'¢ 0.8-micron CMOS for optimum speed , bus width to 16 or more bits using SLAVE CY7C140/ CY7C141 â'¢ BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for port-to-port communication IK x 8 Dual-Port , Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS IK by 8 dual-port static RAMs. TWo , conjunction with the CY7C140/CY7C141 slave dual­ port device in systems requiring 16-bit or greater word
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OCR Scan
IDT7130 IDT7140 CY7C130/CY7C131/CY7C140 55LMB 7C140/CY 7C141

7C13135

Abstract: CY7C141-25JXC CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features · True Dual-Ported memory , width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for port-to-port communication · Available in 48-pin DIP (CY7C130/140 , /CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting , -bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port
Cypress Semiconductor
Original
7C13135 CY7C141-25JXC CY7C130/CY7C131/CY7C140/CY7C141 CY7C131-15JI CY7C131-15JXI

7CJ41-25

Abstract: CY7C130 'ZZAZ. CY7C140/CY7C141 Features â'¢ 0,8-micron CMOS for optimum speed/power â'¢ Automatic power-down , bits using SLAVE CY7C140/ CY7C141 â'¢. BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for port-to-port communication Functional Description The CY7C130/CY7C131/CY7C140 , -bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port , is controlled independently on each port by the chip enable (CE) pin. The CY7C130 and CY7C140 are
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OCR Scan
7CJ41-25 ebe switches 7CI40-35 20O1V C131-35LMB CY7C141-35LMB CY7C131-4SLC OY7C141-45LC CY7C131-45JC

CY7C131-35J

Abstract: CY7C130 CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 1K x 8 Dual-Port Static RAM Features , operation The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141 are high speed CMOS 1K by 8 dual-port , dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or , /130A/CY7C131/131A easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 BUSY output flag on CY7C130/130A/CY7C131/131A; BUSY input on CY7C140/CY7C141 INT flag for
Cypress Semiconductor
Original
CY7C131-35J CY7C131-25JC Z1014 PLCC-52 CY7C130/130A/CY7C131/131A/CY7C140 CY7C130/130A/ CY7C131/131A CY7C130/130A/140

CY7C131-15JXI

Abstract: 7C131 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description , CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are , CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths. It is the , Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for port-to-port
Cypress Semiconductor
Original
7C131 TwB 75 1K x 4 static ram ttl 7c130-55 CY7C130-55DMB 7C130

C1303

Abstract: CY7C131 40 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional , CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for port-to-port communication , functionally equivalent to IDT7130/IDT7140 The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K , master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring
Cypress Semiconductor
Original
C1303 600-M

C1303

Abstract: CY7C131-35JC fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram , power-down · Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for , Pin-compatible and functionally equivalent to IDT7130/IDT7140 The CY7C130/CY7C131/CY7C140 and CY7C141 are , RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in
Cypress Semiconductor
Original
CY7C131-35JC C1307 38-00027-M

5200 CY7C131 1K x 8 Dual-Port Static RAM

Abstract: CY7C130 slave CY7C140/CY7C141 â'¢ BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT , -pin TQFP â'¢ Pin-compatible and functionally equivalent to IDT7130/IDT7140 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are , or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in , feature is controlled independently on each port by the chip enable (CE) pins. The CY7C130 and CY7C140
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OCR Scan
5200 CY7C131 1K x 8 Dual-Port Static RAM
Abstract: using slave CY7C140/CY7C141 BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 INT flag , Static Ram Functional Description The CY7C130/CY7C131 /CY7C140 and CY7C141 are high-speed CMOS 1K by 8 , dual-port RAM in conjunction with the CY7C140/CY7C141 slave du al-port device in systems requiring 16-bit or , each port by the chip enable (CE) pins. The CY7C130 and CY7C140 are available in 48-pin DIP. The , 408-943-2600 May 1989 - Revised May 29, 1997 / "'"IT,*'*" CY7C130/CY7C131 CY7C140/CY7C141 (continued -
OCR Scan

7C13135

Abstract: 7C130 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description , CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are , CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths. It is the , Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for port-to-port
Cypress Semiconductor
Original

Z1314

Abstract: z131 CY7C140/ CY7C141 â'¢ BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for port-to-port communication Functional Description The CY7C130/CY7C131/CY7C140/ CY7C141 are high-speed CMOS IK , master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring , feature is controlled independently on each port by the chip enable (CE) pins. The CY7C130 and CY7C140 are , drain output and requires pull-up resistor. CY7C140/CY7C141 (Slave): BUSY is input. 2. Open drain
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OCR Scan
Z1314 z131 893Q C140 TSGB GQGT73M C140/ CY7CJ30/CY7C131 CY7C13 CY7C141-45JI 45FMB

C1307

Abstract: cY7c131 I fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram , power-down · Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for , Pin-compatible and functionally equivalent to IDT7130/IDT7140 The CY7C130/CY7C131/CY7C140 and CY7C141 are , RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in
Cypress Semiconductor
Original
cY7c131 I C13017 C130-15 38-00027-L

C1303

Abstract: CY7C130 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 DualPort Static RAM D Features D Pin , D D D Functional Description Automatic powerdown The CY7C130/CY7C131/CY7C140 and CY7C141 , dualport static RAM or as a master dualport RAM in conjunction with the CY7C140/CY7C141 slave dual port , operation Master CY7C130/CY7C131 easily ex pands data bus width to 16 or more bits using SLAVE CY7C140/ CY7C141 D BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 D INT flag for
Cypress Semiconductor
Original
38-00027-K

CY7C131

Abstract: C1307 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 DualPort Static RAM D Features D Pin , D D D Functional Description Automatic powerdown The CY7C130/CY7C131/CY7C140 and CY7C141 , dualport static RAM or as a master dualport RAM in conjunction with the CY7C140/CY7C141 slave dual port , operation Master CY7C130/CY7C131 easily ex pands data bus width to 16 or more bits using SLAVE CY7C140/ CY7C141 D BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 D INT flag for
Cypress Semiconductor
Original

CY7C130

Abstract: CY7C131 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description , easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 · BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 · INT flag for port-to-port communication · Available in , to IDT7130/IDT7140 The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port , dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or
Cypress Semiconductor
Original

Zl14

Abstract: cy7c130-55pc power-down â'¢ Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 â'¢ BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for , '¢ Pin-compatible and functionally equivalent to IDT7130/IDT7140 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 , dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or
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OCR Scan
Zl14 cy7c130-55pc C1306
Abstract: power-down Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 INT flag for port-to-port , functionally equivalent to IDT7130/IDT7140 The CY7C130/CY7C131 /CY7C140 and CY7C141 are high-speed CMOS 1K , master dual-port RAM in conjunction with the CY7C140/CY7C141 slave du­ al-port device in systems , feature is controlled independently on each port by the chip enable (CE) pins. The CY7C130 and CY7C140 -
OCR Scan
130/C 140/C
Abstract: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description , â'¢ Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 â'¢ BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for , CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are , CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths. It is the Cypress Semiconductor
Original
Abstract: ^ S' CY7C130/CY7C131 CY7C140/CY7C141 mm CYPRESS SEMICONDUCTOR â  1024 x 8 , bus width to 16 or more bits using SLAVE CY7C140/ CY7C141 â'¢ BUSY output flag on CY7C130/ CY7C131; BUSY input on CY7C140/CY7C141 â'¢ INT flag for port-to-port communication The CY7C130/CY7C131/CY7C140/ CY7C141 are high-speed CMOS IK by 8 dual-port static RAMs. 1\vo ports are pro­ vided , standalone 8-bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 -
OCR Scan
7C140-55D CY7C141-55JI 45LMB CY7C140-45D 38-00027-G

3246A

Abstract: Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141 B 05Y output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141 TNT flag for port-to-port communication , equivalent to IDT713CVIDT7140 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Functional Description The CY7C130/CY7C131 /CY7C140 and CY7C141 are high-speed CMOS 1K by 8 duai-port static RAMs. Two , the CY7C140/CY7C141 slave du al-port device in systems requiring 16-bit or greater word widths. It is
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OCR Scan
3246A CY7C141-30JC CY7C141-30NC CY7C141-30JI CY7C141-35JC CY7C141-35NC

893Q

Abstract: CY7C131-55JI fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Featu res · True , ; BUSY input on CY7C140/CY7C141 · TNT flag for port-to-port communication · Available in 48-pin DIP , conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths , enable (UE) pins. The CY7C130 and CY7C140 are available in 48-pin DIP. The CY7C131 and CY7C141 are , 8 9 - Revised March 27, 1997 CY7C130/CY7C131 CY7C140/CY7C141 I:"" A E î O D Pin
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OCR Scan
CY7C131-55JI bit-slice t913 CY7C1312 Y7C140/CY7C141 CY7C130/CY7C131/GY7C140
Showing first 20 results.