NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| CY7C1383D | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
29 pages, |
Original | |
| CY7C1383D-100AXC | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
29 pages, |
Original | |
| CY7C1383D-100AXC | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
30 pages, |
Original | |
| CY7C1383D-133AXC | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
29 pages, |
Original | |
| CY7C1383D-133AXCT | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V |
30 pages, |
Original | |
| CY7C1383D-133AXI | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V |
30 pages, |
Original | |
| CY7C1383DV25 | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
29 pages, |
Original | |
| CY7C1383DV25-100AXC | Cypress Semiconductor | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
29 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: CY7C1381D CY7C1381D CY7C1383D PRELIMINARY 18-Mbit (512K x 36/1M 36/1M x 18) Flow-Through SRAM Functional , boundary scan for BGA and fBGA packages · "ZZ" Sleep Mode option The CY7C1381D/CY7C1383D is a 3.3V , Output Enable (OE) and the ZZ pin. The CY7C1381D/CY7C1383D allows either interleaved or linear burst , addresses can be internally generated as controlled by the Advance pin (ADV). The CY7C1381D/CY7C1383D , 408-943-2600 Revised November 2, 2004 PRELIMINARY CY7C1381D CY7C1381D CY7C1383D 1 Logic Block Diagram  ... | Original |
29 pages, |
CY7C1383D CY7C1381D 36/1M CY7C1381D abstract |
| Abstract: CY7C1381D CY7C1381D, CY7C1381F CY7C1381F CY7C1383D, CY7C1383F CY7C1383F 18-Mbit (512 K Ã- 36/1 M Ã- 18) Flow-Through SRAM , /CY7C1381F/CY7C1383D/CY7C1383F is a 3.3 V, 512 K Ã- 36 and 1 M Ã- 18 synchronous flow through SRAMs, designed , /CY7C1383D/CY7C1383F allows interleaved or linear burst sequences, selected by the MODE input pin. A HIGH , (ADV). CY7C1381D/CY7C1381F/CY7C1383D/CY7C1383F operates from a +3.3 V core power supply while all , Asynchronous output enable CY7C1381D/CY7C1383D available in JEDEC-standard Pb-free 100-pin TQFP, Pb-free and ... | Original |
36 pages, |
CY7C1381D CY7C1381F CY7C1383D CY7C1383F CY7C1381D abstract |
| Abstract: CY7C1381D CY7C1381D, CY7C1381F CY7C1381F CY7C1383D, CY7C1383F CY7C1383F 18-Mbit (512K x 36/1M 36/1M x 18) Flow-Through SRAM , /CY7C1383D available in JEDEC-standard Pb-free 100-pin TQFP, Pb-free and non Pb-free 165-ball FBGA package. , JTAG-Compatible Boundary Scan · ZZ sleep mode option The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V , include the output enable (OE) and the ZZ pin. The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F allows , CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F operates from a +3.3V core power supply while all outputs operate ... | Original |
29 pages, |
CY7C1383F CY7C1383D CY7C1381F CY7C1381D AN1064 CY7C1381D-133BZXI cypress AN1064 sram system guidelines 36/1M CY7C1381D/CY7C1383D CY7C1381F/CY7C1383F CY7C1381D abstract |
| Abstract: CY7C1381D CY7C1381D, CY7C1381F CY7C1381F CY7C1383D, CY7C1383F CY7C1383F 18-Mbit (512K x 36/1M 36/1M x 18) Flow-Through SRAM , /CY7C1383D available in JEDEC-standard Pb-free 100-pin TQFP, Pb-free and non Pb-free 165-ball FBGA package. , JTAG-Compatible Boundary Scan · ZZ sleep mode option The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V , include the output enable (OE) and the ZZ pin. The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F allows , CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F operates from a +3.3V core power supply while all outputs operate ... | Original |
29 pages, |
CY7C1383F CY7C1383D CY7C1381F CY7C1381D AN1064 36/1M CY7C1381D/CY7C1383D CY7C1381F/CY7C1383F CY7C1381D abstract |
| Abstract: CY7C1381D CY7C1381D CY7C1383D, CY7C1383F CY7C1383F 18-Mbit (512 K Ã- 36/1 M Ã- 18) Flow-Through SRAM 18-Mbit (512 K Ã- 36/1 M Ã- 18) Flow Through SRAM Features Functional Description The CY7C1381D/CY7C1383D , the output enable (OE) and the ZZ pin. The CY7C1381D/CY7C1383D/CY7C1383F allows interleaved or linear , can be internally generated as controlled by the advance pin (ADV). CY7C1381D/CY7C1383D/CY7C1383F , JEDEC-standard Pb-free 100-pin TQFP, Pb-free and non Pb-free 165-ball FBGA package. CY7C1383D available in ... | Original |
33 pages, |
CY7C1381D CY7C1383D CY7C1383F CY7C1381D abstract |
| Abstract: CY7C1381D/CY7C1381F CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F 18 Mbit (512K x 36/1M 36/1M x 18) Flow Through SRAM , /CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to , (GW). Asynchronous inputs include the output enable (OE) and the ZZ pin. The CY7C1381D/CY7C1383D , (ADV). CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F operates from a +3.3V core power supply while all , , 2010 [+] Feedback CY7C1381D/CY7C1381F CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F Logic Block Diagram  CY7C1381D CY7C1381D ... | Original |
30 pages, |
CY7C1383F CY7C1381F CY7C1381D AN1064 CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F 36/1M CY7C1381D/CY7C1381F abstract |
| Abstract: CY7C1381D/CY7C1381F CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F 18 Mbit (512K x 36/1M 36/1M x 18) Flow Through SRAM , /CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to , JTAG-Compatible Boundary Scan ZZ sleep mode option The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F allows , /CY7C1383D/CY7C1381F/CY7C1383F operates from a +3.3V core power supply while all outputs operate with a , CY7C1381D/CY7C1381F CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F Logic Block Diagram  CY7C1381D/CY7C1381F CY7C1381D/CY7C1381F [3] (512K x 36 ... | Original |
30 pages, |
CY7C1383F CY7C1381F CY7C1381D AN1064 CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F 36/1M CY7C1381D/CY7C1381F abstract |
| Abstract: CYPRESS / GALVANTECH # - Connect pin 14 (FT pin) to Vss CY7C1019BV33-15VC CY7C1019BV33-15VC GS71108AJ-12 GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC CY7C1019BV33-15VXC GS71108AGJ-12 GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC CY7C1019BV33-15ZC GS71108ATP-12 GS71108ATP-12 CY7C1019BV33-15ZXC CY7C1019BV33-15ZXC GS71108AGP-12 GS71108AGP-12 For Industrial Temp: CY7C1019CV33-10VC CY7C1019CV33-10VC GS71108AJ-10 GS71108AJ-10 Cypress: Replace last "C" with an "I" CY7C1019CV33-10VXC CY7C1019CV33-10VXC GS71108AGJ-10 GS71108AGJ-10 Galvantech: Add an "I" at the end of the part number CY7C1019CV3 CY7C1019CV3 ... | Original |
31 pages, |
GS84036AGT-150 CY7C1480V25-200BZC CY7C1441V25-150AC CY7C1480V25-200BZXC CY7C1021DV33-10ZC GVT71128DA36T-5 CY7C1021v-12zc GS864018GT-200 CY7C1041V33-12ZXC GS840Z36AT-100 CY7C1356B-166AC CY7C1021DV33-10ZXC CY7C1354C-200BGXC CY7C1011BV33-12ZC CY7C1011BV33-12ZXC CY7C1011BV33-12ZC abstract |
| Abstract: BSM25GP120 b2 SEMICONDUCTORS MCU/MPU/DSP Atmel. . . . . . . . . 167, 168, 169, 170, 171, 172 Blackhawk. . . . . . . . . . . . . . . . . . . . . . . . . 173 Cyan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Cypress. . . . . . . . . . . . . . . 175, 176, 177, 178 Elprotronic. . . . . . . . . . . . . . . . . . . . . . . . . 179 Future Designs, Inc. . . . . . . . . . . . . . . . . . 180 Fre ... | Original |
379 pages, |
A564 transistor led clock circuit diagram at89s52 24pu pir project using avr thyristor t 558 f eupec ZIGBEE interface with AVR ATmega16 Precision triac control thermostat 32-BIT 32-BIT abstract |
| Abstract: QUICK INDEX NEW IN THIS ISSUE! (Detailed Index - See Pages 3-24) AD9272 AD9272 Analog Front End, iMEMS® Accelerometers & Gyroscopes . . . . . . 782, 2583 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-528 Acceleration and Pressure Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . Page 2585 Active RF Product and Antennas . . . . . . . . . . . . 529-592 Rotary Position Sensor and SinglFuseTM Thin Film Chip Fuses . . . Pgs. 2000, 2071 Semiconductors ... | Original |
2704 pages, |
600va ups circuit diagrams ANA 618 20010 TV SHARP IC TDA 9381 PS 600va numeric ups circuit diagrams led clock circuit diagram at89s52 24pu LG color tv Circuit Diagram tda 9370 circuit diagram wireless spy camera schematic diagram atx Power supply 500w AD9272 AD9272 abstract |
| GSI Technology Part | Industry Part | Manufacturer |
| GS816018BGT-150 Buy | CY7C1383D-100AXC Buy | Cypress Semiconductor |
| GS816018BGT-200 Buy | CY7C1383D-133AXC Buy | Cypress Semiconductor |
| GS816018BT-150 Buy | CY7C1383D-100AC Buy | Cypress Semiconductor |
| GS816018BT-200 Buy | CY7C1383D-133AC Buy | Cypress Semiconductor |
| GS8160F18BGT-6.5 Buy | CY7C1383DV25-133AXC Buy | Cypress Semiconductor |
| GS8160F18BGT-7.5 Buy | CY7C1383DV25-100AXC Buy | Cypress Semiconductor |
| GS8160F18BT-6.5 Buy | CY7C1383DV25-133AC Buy | Cypress Semiconductor |
| GS8160F18BT-7.5 Buy | CY7C1383DV25-100AC Buy | Cypress Semiconductor |
| GS816118BD-150 Buy | CY7C1383D-100BZC Buy | Cypress Semiconductor |
| GS816118BD-150 Buy | CY7C1383DV25-100BZC Buy | Cypress Semiconductor |
| ISSI Part | Industry Part | Manufacturer | Description |
| IS61LF102418A Buy | CY7C1383D Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5B3 Buy | CY7C1383D-133BZC Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5B3 Buy | CY7C1383D-133BZXC Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5B3I Buy | CY7C1383D-133BZI Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5B3I Buy | CY7C1383D-133BZXI Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5TQI Buy | CY7C1383D-133AXI Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5TQL Buy | CY7C1383D-100AXC Buy | Cypress Semiconductor | |
| IS61LF102418A-6.5TQL Buy | CY7C1383D-133AXC Buy | Cypress Semiconductor | |
| IS61LF102418A-7.5B3 Buy | CY7C1383D-100BZC Buy | Cypress Semiconductor | |
| IS61LF102418A-7.5B3 Buy | CY7C1383D-100BZXC Buy | Cypress Semiconductor |