CS42428 DS605F1 YFTAC1AL0311 ER605A4

(Reference CS42428_DS605F1 Data Sheet) All references to the CS42428 mentioned below shall be taken to refer to revision C1 of

Errata: CS42428 CS42428 Rev. C1 (Reference CS42428 CS42428_DS605F1 DS605F1 Data Sheet) All references to the CS42428 CS42428 mentioned below shall be taken to refer to revision C1 of the CS42428 CS42428 product. The hardware revision code can be found in the 12-character field printed on the last line below the part number of each chip. The seventh and eighth characters from the right indicate the revision code (for instance, YFTAC1AL0311 YFTAC1AL0311 indicates a Revision C1 part). Upon disabling the PDN bit, the ADC will startup in one of two modes that affect dynamic range. In one mode, the ADC's dynamic range will meet data sheet specification; in the other, the ADC's dynamic range will exhibit a degradation by approximately 4 dB. Which mode the ADC will enter upon the release of PDN is indeterminate. Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to http://www.cirrus.com http://www.cirrus.com Copyright © Cirrus Logic, Inc. 2007 (All Rights Reserved) OCTOBER '07 ER605A4 ER605A4