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CS210013-CZZ Cirrus Logic IC PLL CRYSTAL GP visit Digikey
CS8421-EZZR Cirrus Logic Consumer Circuit, CMOS, PDSO20, 4.40 MM, LEAD FREE, MO-153,TSSOP-20 visit Digikey
CS5480-INZ Cirrus Logic Analog Circuit, 1 Func, CMOS, PQCC24 visit Digikey
CS4234-ENZR Cirrus Logic Analog Circuit, 1 Func, 6 X 6 MM, LEAD FREE, QFN-40 visit Digikey
CDB2000-PC-LCO Cirrus Logic Evaluation, Design Tools Eval Bd Gen. Purpose PLL DC visit Digikey
CDB4349 Cirrus Logic Eval Bd 192kHz Str DAC w/VC 1Vrms visit Digikey

CRYSTAL+14.318MHZ

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: rise and fall time requirements One I/O clock at 24MHz Two Ref. Clocks at 14.318MHz CPU clocks to , -41 accepts a 14.318MHz reference crystal or clock as its input and runs from a 3.3V supply. Block Diagram , 14.318MHz 14.318MHz 48MHz 48MHz 24MHz 24MHz 48MHz 24MHz HI-Z HI-Z 48MHz 24MHz 48MHz 24MHz 48MHz 24MHz TCLK/2 TCLK/4 0 0 0 0 0 1 14.318MHz 14.318MHz 33.33MHz 75.0MHz 16.67MHz 37.5MHz 32MHz 32MHz 0 1 0 14.318MHz 55.0MHz 27.5MHz Integrated Circuit Systems
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ICS9169C-41 ICS9169CF-41 CRYSTAL 14.318MHZ 318MH
Abstract: lower EMI than other clock devices. The ICS9169C-41 accepts a 14.318MHz reference crystal or clock as , requirements One I/O clock at 24MHz Two Ref. Clocks at 14.318MHz CPU clocks to PCI clock skew of 1-4ns (CPU , 14.318MHz Crystal output. Nominally 14.318MHz Ground Processor clock output which are a multiple of the , 14.318MHz 14.318MHz 14.318MHz 14.318MHz 14.318MHz 14.318MHz 14.318MHz TCLK (1) 33.33MHz 75.0MHz 55.0MHz , TCLK/4 32MHz 32MHz 32MHz HI-Z 32MHz 32MHz 32MHz TCLK/3 14.318MHz 14.318MHz 14.318MHz HI-Z Integrated Circuit Systems
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9169c
Abstract: , accuracy, as well as rise and fall time requirements One I/O clock at 24MHz Two Ref. Clocks at 14.318MHz , -41 accepts a 14.318MHz reference crystal or clock as its input and runs from a 3.3V supply. Block Diagram , Voltage Supply 2 X1 IN Crystal input. Nominally 14.318MHz 3 X2 OUT Crystal output. Nominally 14.318MHz 4, 11 20, 23, 29 GND PWR Ground CPUCLK1 OUT Processor clock output , 0 0 1 1 0 1 0 1 0 1 0 1 14.318MHz 14.318MHz 14.318MHz 14.318MHz 14.318MHz Integrated Circuit Systems
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syncronous bus driver
Abstract: source can be (1) a 14.318MHz crystal connected across the XI and X2 input pins, or (2) an input clock connected to the XI input pin with a frequency of 14.318MHz. In the latter case, the X2 pin is left open , addition, the UJ48C54A h a s one rebuffered reference clock output (14.318MHz) while the UJ48C55A has two. Quite often, these reb u ffered reference clocks (14.318MHz) are used as the sources for the video , ), the reference clock (14.318MHz) and the CPUCLK will be turned off and fnrred lnw, respectively,_ 2 -
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48C54 W48C55A 48c55 48C54A 48C54A-04 48C55A-61 LU48C54A UI48C55A LU48C54 UI48C55 ID48C54A LLP48C54
Abstract: , CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 45 On rising edges 500us apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (B=60MHz, C=40MHz, D=14.318MHz) 50 165 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 110 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all American Microsystems
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FS6372 FS6370 14.318MHz Crystal GE NPX ROM-Based 11486-8 FS6377 FS6372- ISO9001
Abstract: , CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 45 On rising edges 500us apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (B=60MHz, C=40MHz, D=14.318MHz) 50 165 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 110 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all American Microsystems
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AMI AMERICAN NPX-50
Abstract: 16 or 32MHz C 6 £ M 24MHz c 7 14 ^2 14.318MHz 12MHz c 8 13 14.318MHz , 6 24MHz ⡠7 14 I ] 14.318MHz 12MHz c 8 13 AGND c 9 12 10 11 , 15 III VDD Z GND 1 14.318MHz ZI PD* Z] SCLK22 for AV9155-01 .-02 Pin Name 1.843MHz X2 XI VDD GND 16MHz/32MHz 24MHz 12MHz AGND OE SCLK22 AVDD PD* 14.318MHz 14.318MHz GND VDD , GND 14 ^ 14.318MHz 13 14.318MHz 12 ⡠11 PD* ⡠SCLK23 Pin Description for -
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AV9155 AV9155-02 AV9155-03 AV9155-23 AV9155-36 AV9155-
Abstract: · Supports Spread Spectrum modulation: 0 to -0.5% down spread. · Uses external 14.318MHz crystal , internally latched prior to the pin being used for output on 3V 14.318MHz clocks. 3.3V power supply 14.318MHz Crystal input X1 Crystal Output 14.318MHz Crystal output PCI clock outputs Margin testing , 66MHz 14.318MHz 0 to -0.5% Down Spread 0 0 0 1 105MHz 52.5MHz 70MHz 14.318MHz 0 to -0.5% Down Spread 0 0 1 0 200MHz 50MHz 66.7MHz 14.318MHz 0 to Integrated Circuit Systems
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ICS9250-33 156MH SEL100/133 GND48 FS0/48MH FS1/48MH
Abstract: -MHz clock output for OPL4. 14.318-MHz clock buffered output for OPL3 or PCMCIA controller. W48C20 , 14.318-MHz output when compared to similar devices. External Components/Crystal Selection The W48C20 , 14.318-MHz, 12-pF load crystal is recommended. A series resonant crystal or a parallel resonant crystal , ) = 12 pF. 2. If a clock is used as input, the duty cycle of the 14.318MHz output will be the same as Cypress Semiconductor
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CRYSTAL oscillator 14.318MHZ
Abstract: 14.318MHz Two copies of 48MHz clock Three copies of REF clock @ 14.318MHz Reference crystal oscillator (14.318MHz) Spread Spectrum (-0.5%) clocking Power management controls Low frequency test mode , . The RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage of 3.3V. A 14.318MHz external clock can also be used instead of the Block Diagram 3 REF0:2 VDDref , running at a fixed frequency equal to the reference crystal or external frequency (14.318MHz). These Fairchild Semiconductor
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100MH SEL100/66 VDD48MH DS50007100
Abstract: /CPU clock) Two copies oflO A P IC clock @ 14.318MHz Two copies o f 48M Hz clock Three copies o f REF clock @ 14.318MHz Reference crystal oscillator (14.318MHz) Spread Spectrum (-0.5%) clocking Power , a second phase locked loop. The RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage o f 3.3V. A 14.318MHz external clock can also be used instead o f the , equal to the reference crystal or external frequency (14.318MHz). These operate from a 3.3V power source -
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Abstract: devices. The ICS9169C-46 accepts a 14.318MHz reference crystal or clock as its input and runs from a 3.3V , 24MHz â'¢ One Ref. Clock at 14.318MHz â'¢ CPU clocks to PCI clock skew of l-4ns (CPU early) â'¢ Low CPU , PLL OD REFO (14.318MHz) CPUCLKO CPUCLK1 CPUCLK2 CPUCLK3 CPUCLK4 CPUCLK5 CPUCLK6 CPUCLK7 CPUCLK8 , (MHz) IOCLK (MHz) 0 0 14.318MHz Hi Z Hi Z Hi Z Hi Z Hi Z 0 1 14.318MHz 66.67 33.3 14.318 48 24 1 0 14.318MHz 50.0 25.0 14.318 48 24 1 1 14.318MHz 60.0 30.0 14.318 48 24 Actual Output Frequencies Output -
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ICS9169CF ICS9169CF-46
Abstract: O 14.318-MHz clock buffered output for OPL3 or PCMCIA controller. X2 8 I Crystal , and X2. A parallel resonant 14.318-MHz, 12-pF load crystal is recommended. A series-resonant crystal , has good duty cycle. The circuit exhibits about 50% less clock jitter from the 14.318-MHz output when , a clock is used as input, the duty cycle of the 14.318-MHz output will be the same as the input Cypress Semiconductor
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16,9344 33.8688 MHz crystal clock generator 9344-MHZ 318-MH
Abstract: copies of IOAPIC clock @ 14.318MHz â'¢ Two copies of 48MHz clock â'¢ Three copies of REF clock @ 14.318MHz â'¢ Reference crystal oscillator (14.318MHz) â'¢ Spread Spectrum (-0.5%) clocking â'¢ Power , generated through a second phase locked loop. The RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage of 3.3V. A 14.318MHz external clock can also be used instead of the , (14.318MHz). These operate from a 3.3V power source. APIC0:1 44, 45 OUT APIC clocks running at a fixed -
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Abstract: similar devices. SUGGESTED LAYOUT 14.318MHz in c L L i 18 !_ ! pin 7 n 6 C 33£1 (optional , , 14.318MHz Output Clock Rise Time O utput Clock Fall Time O utput Clock Duty Cycle, 24.576MHz Output Clock Duty Cycle, 16.9344MHz Output Clock Duty Cycle, 33.868MHz Output Clock Duty Cycle, 14.318MHz, Note 2 A , as input with CL = 12pf. If a clock is used as input, the duty cycle of the 14.318MHz output will be -
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S4231 IC WORKS 48C20 I1I48C20 1U48C20 UM8C20 UJ48C20 UI48C20
Abstract: Eight copies of PCI Clock (Synchronous w/CPU clock) Two copies of IOAPIC clock @ 14.318MHz Two copies of 48MHz clock Three copies of REF clock @ 14.318MHz Reference crystal oscillator (14.318MHz); no , Desktop and Notebook Systems. The RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage of 3.3V. A 14.318MHz external clock can also be used instead of the crystal , fixed frequency equal to the reference crystal or external frequency (14.318MHz). These operate from a Fairchild Semiconductor
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Abstract: clock) Two copies of IOAPIC clock @ 14.318MHz Two copies of 48MHz clock Three copies o f REF clock @ 14.318MHz Reference crystal oscillator (14.318MHz) Spread Spectrum (-0.5%) clocking Power management , . The RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage of 3.3V. A 14.318MHz external clock can also be used instead of the Advanced Applications · 100MHz , running at a fixed frequency equal to the reference crystal or external frequency (14.318MHz). These -
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Abstract: PCI Clock (Synchronous w/CPU clock) Two copies o f IOAPIC clock @ 14.318MHz Two copies o f 48MHz clock Three copies o f REF clock @ 14.318MHz Reference crystal oscillator (14.318MHz) Spread Spectrum , RC7100 accepts a 14.318MHz crystal as its reference frequency and operates at a core voltage of 3.3V. A 14.318MHz external clock can also be used instead of the Block Diagram REF0:2 VDDref VSSref APIC0:1 , (14.318MHz). These operate from a 3.3V power source. APIC0:1 44, 45 OUT APIC clocks running at a -
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VDD48MHZ VSS48MHZ
Abstract: 14 - 14318MHz 13 - 14318MHz 12 - AVDD 11 - SCLK22 Clock Table (in MHz) PIN 8 6 7 1 13.14 18 17 , 1.843MHz X2 Xl/ICLK VDD GND 16MHz/32MHz 24MHz 12MHz AGND OE SCLK22 AVDD 14318MHz 14318MHz GND VDD 2XCPU CPU , 18 - SCLK22 17 - CPU 16 - VDD 15 - GND 14 - 14.318MHz 13 - 14318MHz 12 - PD* 11 - SCLK23 OE - 10 , /ICLK VDD GND 24MHz 16MHz 8MHz AGND OE SCLK23 PD* 14.318MHz 14.318MHz GND VDD CPU SCLK22 SCLK21 SCLK20 -
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ICS2655 ICS2655-0XX 035RTY 4A257SA
Abstract: 14.318MHz reference clock outputs · 2 - 14.318MHz clock outputs · 1 - 66MHz clock output · One , XTAL_OUT O, SE 14.318MHz crystal output. 4 VDD PWR 3.3V power supply for outputs. 5 , for outputs. 14.318MHz crystal input. 3.3V tolerant input to select Spread Spectrum percentage , SLG62102 Block Diagram XTAL_IN (14.318MHz) XTAL_OUT (14.318MHz) REF0 REF1 XTAL Frequency Silego Technology
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Silego Technology SLG62102K SLG62102KTR
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