NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Package RQFP208 RQFP208 CQFP256 CPGA257 CPGA257 BGA313 BGA313 SDO Pin Number 103 126 R17 AE23 Tables B-9 through , TQFP176 TQFP176 PQFP208 PQFP208 CQFP256 Table B-11. A32140DX A32140DX SDO Pin Number 52 82 87 103 67 Package CQFP208 CQFP208 PQFP208 PQFP208 RQFP208 RQFP208 RQFP240 RQFP240 CQFP256 Table B-12. A32200DX A32200DX SDO Pin Number 103 103 106 123 67 Package RQFP208 RQFP208 RQFP240 RQFP240 CQFP256 Table B-13. A32300DX A32300DX SDO Pin Number 106 123 67 25 Silicon , Package CQFP256 Table B-19. RT14100A RT14100A SDO Pin Number 126 Notes: 1. ACT1 and 40MX families of ... | Original |
32 pages, |
CQFP132 A42MX PLCC84 PQFP100 RH1280 RQFP208 42MX rt1280 40MX 16-pin JTAG CONNECTOR Actel a1225xl 8250 uart sample c programs ACTEL A42MX09 06M7374 PQFP208 datasheet abstract |
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| Abstract: 135 341 168 CG/LG896 CG/LG896 - - 620 310 CQFP256 TBD TBD TBD RT P ro A S ... | Original |
11 pages, |
aircraft logic gates CCGA CQ208 CQ256 LG1152 LG484 A3PE3000L RTSX32su rtax2000sl RTAX2000S CG1272 RT3PE3000L RTAX1000S-SL cg624 datasheet abstract |
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| Abstract: Ceramic Quad Flatpack (CQFP) 28 Lead Ceramic Quad Flatpack NS Package Number EL28B EL28B © 2000 National Semiconductor Corporation MS101107 MS101107 www.national.com Ceramic Quad Flatpack (CQFP) August 1999 Ceramic Quad Flatpack (CQFP) 64 Lead Ceramic Quad Flatpack NS Package Number EL64A EL64A 100 Lead Ceramic Quad Flatpack NS Package Number EL100A EL100A www.national.com 2 Ceramic Quad Flatpack (CQFP) 116 Lead Ceramic Quad Flatpack NS Package Number EL116A EL116A 116 Lead Ceramic Qu ... | Original |
14 pages, |
EL64A CQFP EL100A EL116A EL132B EL132C EL132D EL28B CERAMIC QUAD FLATPACK CQFP EL28B abstract |
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| Abstract: v2.1 SX Family FPGAs RadTolerant and HiRel Features High Density Devices · · · RadTolerant SX Family · · · · · · Tested Total Ionizing Dose (TID) Survivability Level Radiation Performance to 100 Krads (Si) (ICC Standby Parametric) Devices Available from Tested Pedigreed Lots Up to 160 MHz On-Chip Performance Offered as Class B and E-Flow (Actel Space Level Flow) QMl Certified Devices · · · · · · · Easy Logic Integration · · · · · HiRel SX Family ... | Original |
46 pages, |
54SX A54SX16 A54SX32 Actel PQFP208 RT54SX RT54SX72S RTSX16 trd24 RT54SX32-CQ208 RTSX32 datasheet abstract |
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| Abstract: Preliminary v1.5.2 54SX Family FPGAs RadTolerant and HiRel Fe a t ur es · Up to 225 User I/Os Rad To ler ant 54S X Fam i ly · Up to 1,080 Dedicated Flip-Flops · Tested Total Ionizing Dose (TID) Survivability Level E asy L ogi c In teg ra ti on · Radiation Performance to 100Krads (Si) (ICC Standby Parametric) · Non-Volatile, User Programmable · Devices Available from Tested Pedigreed Lots · Highly Predictable Performance with 100% Automatic Place and Route · U ... | Original |
40 pages, |
RT54SX A54SX32 A54SX16 54SX TRANSISTOR ASY 28 RTSX32 datasheet abstract |
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| Abstract: v 2 .0 54SX Family FPGAs RadTolerant and HiRel Hig h D ens it y De vi ces Fe a t ur es · 16,000 and 32,000 Available Logic Gates Rad To ler ant 54S X Fam i ly · Tested Total Ionizing Dose (TID) Survivability Level · Up to 228 User I/Os · Radiation Performance to 100Krads (Si) (ICC Standby Parametric) · Up to 1,080 Dedicated Flip-Flops · Devices Available from Tested Pedigreed Lots · Non-Volatile, User Programmable · Up to 160 MHz On-Chip Performance · Offered ... | Original |
36 pages, |
RTSX16 RT54SX72S RT54SX A54SX32 A54SX16 54SX RTSX32 datasheet abstract |
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| Abstract: v2.0 HiRel SX-A Family FPGAs Features and Benefits · Leading Edge Performance · · · · · · · · · · · 215 MHz System Performance (Military Temperature) 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature) 240 MHz Internal Performance (Military Temperature) Specifications · · · · 48,000 to 108,000 Available System Gates Up to 228 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops 0.25/0.22 u CMOS Process Technology · · Features · · · ... | Original |
50 pages, |
RT54SX-S REQ64 PAR64 A54SX72A A54SX32A datasheet abstract |
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| Abstract: Preliminary v1.0 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce · QML Certified Devices · 215 MHz System Performance (Military Temperature) · 100% Military Temperature Tested (55°C and +125°C) · 5.3ns Clock-to-Out (Pin-to-Pin) (Military Temperature) · 33 MHz PCI Compliant · 240 MHz Internal Performance (Military Temperature) · CPLD and FPGA Integration Sp e ci f i c a t i on s · 48,000 to 108,000 Available System Gates · Up to 228 User-Programmab ... | Original |
40 pages, |
SX FPGAs REQ64 PAR64 A54SX72A A54SX32A A54SX32 54SX32A 54SX32 datasheet abstract |
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| Abstract: Preliminary v1.0 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce · QML Certified Devices · 215 MHz System Performance (Military Temperature) · 100% Military Temperature Tested (55°C and +125°C) · 5.3ns Clock-to-Out (Pin-to-Pin) (Military Temperature) · 33 MHz PCI Compliant · 240 MHz Internal Performance (Military Temperature) · CPLD and FPGA Integration Sp e ci f i c a t i on s · 48,000 to 108,000 Available System Gates · Up to 228 User-Programmab ... | Original |
40 pages, |
REQ64 PAR64 A54SX72A A54SX32A A54SX32 54SX32 datasheet abstract |
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| Abstract: Advanced v0.2 RT54SX-S RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce · First Actel FPGA Designed Specifically for Space Applications · Up to 2,012 Additional SEU Hardened Flip-Flops Eliminate Software TMR Necessity (LETth > 40, GEO SEU Rate < 1010 upset/bit-day) · Up to 100krad (Si) Total Ionizing Dose (TID) Parametric Performance Supported with Lot-Specific Test Data · Single Event Latch-Up Immune · Flexible I/O Accommodates 2.5V, 3.3V, and 5.0 ... | Original |
48 pages, |
voter TM1019 RT54SX72S RT54SX-S REQ64 PAR64 RT54SX-S abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| maximum at 80 MHz Low Power Modes - lap, doze, sleep Packaging 240 CQFP/256 BGA *Estimated www.datasheetarchive.com/files/motorola/design-n/sps/powerpc/library/fact_she/603.htm |
Motorola | 25/11/1996 | 4.83 Kb | HTM | 603.htm |
| 304 CQFP/256 BGA *Estimated performance. | PowerPC Home Page | Site Map www.datasheetarchive.com/files/motorola/design-n/sps/powerpc/library/fact_she/604.htm |
Motorola | 25/11/1996 | 4.77 Kb | HTM | 604.htm |
| transistors Packaging - 240 CQFP/256 BGA For additional information, call 1 www.datasheetarchive.com/files/motorola/design-n/sps/powerpc/library/fact_she/603e.htm |
Motorola | 25/11/1996 | 7.6 Kb | HTM | 603e.htm |