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TW2819-BA2-CR Intersil Corporation Multichannel H.264 Audio/Video Codec; Calc Temperature Range::Comm; Temp Range: 0° to 70°
TW2809-BC1-GR Intersil Corporation Multichannel H.264 Audio/Video Codec; Calc Temperature Range::Comm; Temp Range: 0° to 70°
TW5866-BA2-CR Intersil Corporation 9D1 H.264 CODEC with 8-Channel A/V Decoder; BGA416; Temp Range: 0° to 70°
TP3070V-G/63 Texas Instruments IC PROGRAMMABLE CODEC, Codec
TLC32040IFN Texas Instruments PCM CODEC, PQCC28
TLC32040CFNR Texas Instruments PCM CODEC, PQCC28

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CODEC Datasheet

Part Manufacturer Description PDF Type
CODEC-5.1 LSI Logic Hardware Tools, Daughter Card Original
CODEC-5.1 Daughtercard LSI Logic User Guide Original
CODEC-SLIC Infineon Technologies Press release Infineon Announces Industrys Smallest, Full-Featured Dual Channel CODEC-SLIC Chipset Ideal for VoIP Applications Original

CODEC

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: assigned to the Codec. 6-6 DSP56166 ON-CHIP SIGMA/DELTA CODEC For More Information On This Product , Semiconductor, Inc. Figure 6-4 shows the memory mapped registers used with the on-chip codec.There are , . The CCR0 controls the clocking scheme and decimation/interpolation ratio of the codec. The CCR0 bits , direct the operation of the on-chip codec. The CCR1 controls the receive and transmit audio gains, the , codec. The status bits and flag bits are described in the following paragraphs. 6.5.7.1 COSR Codec Freescale Semiconductor
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ANA 618 MVP-100 DSP5616
Abstract: between conventional dual supply CODEC and the single supply CODEC. 2. Dynamic range of the single supply CODEC. 3. Output amplitude of CODEC to which another codec having a different dynamic range is , level of the dual supply CODEC. 3 V single supply CODEC (MSM7541/7542, MSM7566/7567, MSM7702, MSM7717 , Example 1. When the 3 V single supply CODEC is interfaced with the 5 V single supply CODEC. MSM7541 0.7 , with the dual supply CODEC. MSM7541 0.7 Vo-p input 1.0 Vo-p output AIN VFRO MSM6997 -
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MSM6997H MSM7543 LM386 application note MSM6932 MSM6996 MSM7566 E2U0039-16-X3 LM386 MSM7543/7544
Abstract: will occur inside the USB peripheral, it is beneficial to cover the operation of codecs. In general , controller must deliver data at a rate of 180KBps to the codec. The designer of the USB audio system must , capability can also increase a codec's cost and complexity. Support for bi-directional transfers means that , guaranteed, the buffer allows some tolerance in servicing the codec's need for data. This is especially , sets of signals connecting the codec and controller: data and control. It is possible to find codecs Intel
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ic 7404 datasheet ad1845 Intel 8x930Ax 14 pin ic 7404 datasheet IC 7404 connecting diagram for ic 7404 AP-648 AD1845 74HC32
Abstract: CODEC_RESET. Thus, to reset the CODEC, you clear the CODEC_RESET bit in Port Data Register C on the ESSI port , of the CODEC. The codec_control subroutine performs this action. Following is one method of sending , CODEC. The data travels through special serial ports using the DSPÕs ESSI ports and the CODECÕs , to control the transfer of CODEC control information. ¥ SC00 (CODEC_RESET pin) ¥ SC10 (CCS , port data registers. For instance, the CODEC_RESET pin on the CODEC connects to the SC00 pin on ESSI0 Motorola
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CS4218 DSP56300 ccs synchronous serial port interrupt DSP563xxEVM SC10 SC1001 AN1790/D DSP563
Abstract: .67 Link Timing Parameters at the , Definitions Description 24.0MHz bit clock sourced from the HDA controller and connecting to all codecs. , controller and connects to all codecs. Serial data output signal driven by the HDA controller to all codecs. , . Serial data input signal driven by the codec. This is point-to-point serial data from the codec to the , at each rising edge of BCLK. SDI can be driven by the controller to initialize the codecâ'™s ID Realtek Semiconductor
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alc888s ALC888S-GR JATR-1076-21 ALC888S 00BSC LQFP-48 PKGC-065
Abstract: codecs. Each codec drives its own point-to-point SDI signal(s) to the controller. Figure 6, on page 10 , audio codec. Though every effort has been made to ensure that this document is current and accurate , connecting to all codecs. 48kHz of signal is used to synchronize input and output streams on the link, it is sourced from the HDA controller and connects to all codecs. Serial data output signal driven by the HDA controller to all codecs. Commands and data streams are carried on SDO. The data rate is double pumped; the Realtek Semiconductor
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ALC260-LF ALC260 ALC260-VD ALC260-VD-LF
Abstract: .60 Link Timing Parameters at the , to initialize the codecâ'™s ID. Active low reset signal. Asserted to reset the codec to default , inbound stream. RST#, BCLK, SYNC, SDO0, and SDO1 are driven by controller to codecs. Each codec drives , Realtek ALC262 Series Audio Codecs. Though every effort has been made to assure that this document is , controller and connecting to all codecs. 48kHz of signal is used to synchronize input and output streams on Realtek Semiconductor
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tag 9114 ALC262-GR ALC262-VB0-GR ALC262SRS-GR ALC262H-GR ALC262-VC1-GR ALC262-VC2-GR
Abstract: . Software control can be used to power down individual codecs. Each codec contains an ADC, a DAC, and a , is at high impedance during time slots not assigned to the codec. Codec 1 transmits data in the first , to a codec, except in the case of the line output. Connecting the output of both codecs to the line , control data. The next eight slots are used for actual conversion data sent and received by the codec. , TLV320AIC22C DUAL VOICE OVER INTERNET PROTOCOL (VoIP) CODEC SPAS041B ­ OCTOBER 2001 ­ REVISED Texas Instruments
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Abstract: and connects to all codecs. Source Controller Controller Controller Codec/Controller , controller to codecs. Each codec drives its own point-to-point SDI signal(s) to the controller. Figure 5 , # Description 24.0MHz bit clock sourced from the HDA controller and connecting to all codecs. A 48kHz signal , connects to all codecs. Serial Data Output signal driven by the HDA controller to all codecs. Commands and , Input signal driven by the codec. This is point-to-point serial data from the codec to the HDA Realtek Semiconductor
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alc665 ALC665 JATR-2265-11 ALC665-GR
Abstract: and noise shaping. Both codecs should be connected to a local line or to a PSTN line, but one codec , DSP and the IOM operation modes can be set, as well as some analog parameters in the two codecs. The , oscillator. GP_CLK7 must therefore be used as the input clock for the universal codec. GP_CLK7 is enabled , codec PCD5096 After reset, all the flip-flops are in a defined state, and the IOM, DSP and codecs are , provides a clock (GP_CLK7) and a reset signal to the universal codec. The reset signal must be generated by -
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SIEMENS AVR GENERATOR ECHO line canceller IC phone PCD5093 PCD5093H PCD5096H philips dect QFP52 QFP100 QFP160
Abstract: ALC269 (ALC269Q-GR, ALC269QSRS-GR) HIGH DEFINITION AUDIO CODEC WITH EMBEDDED CLASS D SPEAKER , intended for the hardware and software engineer's general information on the Realtek ALC269 codec IC , Input Voltage). High Definition Audio Codec with Embedded Class D Speaker Amplifier ii Track , .19 7.3.2. Codec Reset .20 7.3.3. Codec Initialization Sequence Realtek Semiconductor
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Realtek ALC269Q High Definition Audio RJ9 jack dimension ALC269Q AC1085 ic for driver get 8 pin class d sdi to hdmi converter ic QFN-48
Abstract: .67 Link Timing Parameters at the , codecs. 7.1 Channel High Definition Audio Codec 8 Track ID: JATR-1076-21 Rev. 1.4 ALC880 , stream. RST#, BCLK, SYNC, SDO0 and SDO1 are driven by the controller to codecs. Each codec drives its , clock sourced from the HDA controller and connecting to all codecs. 48kHz signal is used to synchronize input and output streams on the link. It is sourced from the HDA controller and connects to all codecs. Realtek Semiconductor
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ALC880D ALC880-LF ALC880D-VH ALC880-VH-LF ALC880D-VH-LF REALTEK SEMICONDUCTOR realtek 8112 alc880-vh alc880 Realtek Semiconductor ALC880D-LF ALC880-VH
Abstract: conversion information. Software control can be used to power down individual codecs. Each codec is composed , assigned to the codec. Codec 1 transmits data in the first assigned time slot, followed by codec 2 in the , TLV320AIC22 DUAL VOIP CODEC SLAS281B ­ JULY 2000 ­ REVISED JUNE 2002 detailed description codecs There , TLV320AIC22 DUAL VOIP CODEC SLAS281B ­ JULY 2000 ­ REVISED JUNE 2002 D D D D D D D D D , (DAC) Programmable Input/Output Gain Analog Crosspoint to Connect the Two Coder/Decoders (Codecs) to Texas Instruments
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I2C code for TLV320 control voip codec chip RJ11 headset VOIP TLV320 TLV320AIC22PT TMS320C54X
Abstract: ALC662 (ALC662-GR, ALC662-VC-GR) 5.1 CHANNEL HIGH DEFINITION AUDIO CODEC DATASHEET Rev. 1.1 , hardware and software engineerâ'™s general information on the Realtek ALC662 codec IC. Though every , High Definition Audio Codec ii Track ID: JATR-1076-21 Rev. 1.1 ALC662 Series Datasheet , .17 7.3.2. Codec Reset .18 7.3.3. Codec Initialization Sequence Realtek Semiconductor
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Abstract: ALC88x series and ALC262 series audio codecs 5.1 Channel High Definition Audio Codec 2 Track ID , ALC662 Series (ALC662-GR, ALC662-VC0-GR, ALC662-VC1-GR) 5.1 CHANNEL HIGH DEFINITION AUDIO CODEC , codec IC. Though every effort has been made to ensure that this document is current and accurate, more , Definition Audio Codec ii Track ID: JATR-1076-21 Rev. 1.3 ALC662 Series Datasheet Table of , .18 7.3.2. Codec Reset Realtek Semiconductor
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spdif jack pin out ALC662 5.1 audio power amplifier
Abstract: codecs. The universal codec is designed to operate in a digital cordless telephone system, for example , universal codec. GPJ3LK7 is enabled during a reset of the PCD5093 and when either the Burst Mode Logic or , IOM, DSP and codecs are in inactive mode. In typical applications the universal codec is used with the PCD5093, which provides a clock (GP_CLK7) and a reset signal to the universal codec. The reset signal must , (HEX) 78 RESETSTATE (HEX) 0000 FUNCTION control signals for codecs, codec test modes. Power-down -
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IOM2 philips dl 711 delay 0003H 0018H
Abstract: Definitions Description 24.0MHz bit clock sourced from the HDA controller and connecting to all codecs. , controller and connects to all codecs. Serial data output signal driven by the HDA controller to all codecs. , ALC886 (P/N: ALC886-GR) 7.1+2 CHANNEL HIGH DEFINITION AUDIO CODEC DATASHEET Rev. 1.0 01 , general information on the Realtek ALC886 Audio Codec ICs. Though every effort has been made to ensure , Release Date 2010/10/01 Summary First release. 7.1+2 Channel High Definition Audio Codec ii Realtek Semiconductor
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70Ch
Abstract: .63 Link Timing Parameters at the , codecs. Each codec drives its own point-to-point SDI signal(s) to the controller. Figure 6 shows the , to all codecs. 48kHz of signal is used to synchronize input and output streams on the link. It is sourced from the HDA controller and connects to all codecs. Serial data output signal driven by the HDA controller to all codecs. Commands and data streams are carried on SDO. The data rate is double pumped; the Realtek Semiconductor
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ALC883-GR ALC883DD-GR ALC883
Abstract: codec.There are five registers mapped into four memory locations. On-chip Codec DATA REGISTERS 8 7 15 , registers. One interrupt vector is assigned to the Codec. 6-6 DSP56166 ON-CHIP SIGMA/DELTA CODEC , controls the clocking scheme and decimation/interpolation ratio of the codec. The CCR0 bits are described , operation of the on-chip codec. The CCR1 controls the receive and transmit audio gains, the codec clocking , flags of the on-chip codec. The status bits and flag bits are described in the following paragraphs Motorola
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filter Low Pass 1206 1748 MHz
Abstract: OKI Semiconductor Telecom Products A-Law CODECs Part Number MSM6996H MSM6996V MSM6998 , CODEC (HD44237C), single-ended CODEC, single-ended CODEC, balanced Single-rail CODEC, balanced (G.714) Single-rail CODEC, single-ended (G.711) Dual-channel, single-rail CODEC, balanced (G.714) Single-rail CODEC, balanced (G.711) Single-rail CODEC, balanced (G.714) Single-rail CODEC, balanced (G.711) MSM7542 pin-compatible Single-rail CODEC, single-ended (G.711) Single-rail CODEC, balanced (G.711) Dual-channel -
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MSM7507-03 MSM7509B MSM7534 MSM7544 MSM7567 MSM7579 G714 MSM6843 Analog Front-End VOICE SCRAMBLER G.711 MSM7582
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