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CGS74C2525 CGS74CT2525 CGS74C2526 CGS74CT2526 CT2525 ACT2525 ACT2526 C1996 - Datasheet Archive
CGS74C2526 CGS74CT2526 1-to-8 Minimum Skew Clock Driver The CGS 'C CT2525 is a minimum skew clock driver with one input driving
CGS74C2525 CGS74C2525 CGS74CT2525 CGS74CT2525 CGS74C2526 CGS74C2526 CGS74CT2526 CGS74CT2526 1-to-8 Minimum Skew Clock Driver The CGS 'C CT2525 CT2525 is a minimum skew clock driver with one input driving eight outputs specifically designed for signal generation and clock distribution applications The '2525 is designed to distribute a single clock to eight separate receivers with low skew across all outputs during both the tPLH and tPHL transitions The '2526 is similar to the '2525 but contains a multiplexed clock input to allow for systems with dual clock speeds or systems where a separate test clock has been implemented Features Y Y Y Y Y Y Y Y Y Logic Symbols These CGS devices implement National's FACTTM family Ideal for signal generation and clock distribution Guaranteed pin to pin and part to part skew Multiplexed clock input ('2526) Guaranteed 2 kV minimum ESD protection Symmetric output current drive of 24 mA for IOL IOH 'CT has TTL-compatible inputs These products are identical to 74AC ACT2525 ACT2525 and 2526 Available as Mil Aero versions 54AC ACT2525 ACT2525 54AC ACT2526 ACT2526 Connection Diagrams '2525 Pin Assignment for DIP and SOIC '2525 TL F 10684 1 '2526 TL F 10684 3 '2526 TL F 10684 2 TL F 10684 4 TRI-STATE is a registered trademark of National Semiconductor Corporation FACTTM is a trademark of National Semiconductor Corporation C1996 C1996 National Semiconductor Corporation TL F 10684 RRD-B30M106 RRD-B30M106 Printed in U S A http www national com CGS74C2525 CGS74C2525 CGS74CT2525 CGS74CT2525 CGS74C2526 CGS74C2526 CGS74CT2526 CGS74CT2526 1-to-8 Minimum Skew Clock Driver September 1995 Functional Description Truth Tables On the multiplexed clock device the SEL pin is used to determine which CLKn input will have an active effect on the outputs of the circuit When SEL e 1 the CLK1 input is selected and when SEL e 0 the CLK0 input is selected The non-selected CLKn input will not have any effect on the logical output level of the circuit The output pins act as a single entity and will follow the state of the CLK or CLK1 CLK0 pins when either the multiplexed ('2526) or the straight ('2525) clock distribution chip is selected '2525 Inputs Outputs CLK O0 O7 L H L H '2526 Inputs Pin Description Pin Names Description CLK0 CLK CLK0 CLK1 O0 O7 SEL Clock Input ('2525) Clock Inputs ('2526) Outputs Clock Select ('2526) L H X X Outputs CLK1 SEL O0 O7 X X L H L L H H L H L H L e Low Voltage Level H e High Voltage Level X e Immaterial '2525 '2526 TL F 106847 http www national com TL F 10684 8 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) DC Input Diode Current (IIK) VI e b0 5V VI e VCC a 0 5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO e 0 5V VO e VCC a 0 5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (iJA) Plastic (N) 14-Lead Plastic (M) 14-Lead Plastic (N) 16-Lead Plastic (M) 16-Lead Supply Voltage (VCC) `C' `CT' Input Voltage (VI) b 0 5V to a 7 0V b 20 mA a 0 2 mA b 20 mA a 20 mA b 40 C to a 85 C b 55 C to a 125 C Input Rise and Fall Times Devices (30% to 70% of VCC) VCC e 3 3V 4 5V 5 5V Input Rise and Fall Times Devices (0 8V to 2 0V) b 0 5V to (VCC a 0 5V) g 50 mA g 50 MA 10 5 ns max 14 4 ns max 17 6 ns max 9 6 ns max Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur The databook specifications should be met without exception to ensure that the system design is reliable over its power supply temperature and output input loading variables National does not recommend operation of CGS circuits outside databook specifications b 65 C to a 150 C C C C C 0V to VCC 0V to VCC Output Voltage (VO) Operating Temperature (TA) CGS74C CGS74C CT 54AC ACT b 0 5V to (VCC a 0 5V) 102 128 97 124 2 0V to 6 0V 4 5V to 5 5V W W W W DC Electrical Characteristics for CGS74C CGS74C and 54AC Family Devices Over recommended operating conditions unless specified otherwise CGS74C CGS74C Symbol Parameter VCC (V) 54AC CGS74C CGS74C TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ VIH VIL VOH Conditions Guaranteed Limits Minimum High Level Input Voltage 30 45 55 15 2 25 2 75 21 3 15 3 85 21 3 15 3 85 21 3 15 3 85 V VOUT e 0 1V or VCC b0 1V Maximum Low Level Input Voltage 30 45 55 15 2 25 2 75 09 1 35 1 65 09 1 35 1 65 09 1 35 1 65 V VOUT e 0 1V or VCC b0 1V Minimum High Level Output Voltage (Note 2) 30 45 55 2 99 4 49 5 49 29 44 54 29 44 54 29 44 54 V 2 56 3 86 4 86 24 37 47 2 46 3 76 4 76 V 01 01 01 01 01 01 01 01 01 V 0 36 0 36 0 36 0 40 0 50 0 50 0 44 0 44 0 44 30 45 55 VOL Units Maximum Low Level Output Voltage (Note 2) 30 45 55 30 45 55 0 002 0 001 0 001 3 IOUT e b50 mA VIN e VIL or VIH b 12 mA b 24 mA IOH b 24 mA IOUT e 50 mA V VIN e VIL or VIH 12 mA 24 mA IOL 24 mA http www national com DC Electrical Characteristics for CGS74C CGS74C and 54AC Family Devices (Continued) Over recommended operating conditions unless specified otherwise CGS74C CGS74C Symbol Parameter VCC (V) 54AC CGS74C CGS74C TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ IIN Maximum Input Leakage Current (Note 3) IOLD IOHD ICC Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current (Note 3) 55 Units Conditions Guaranteed Limits g0 1 g1 0 g1 0 mA VI e VCC GND 55 50 75 mA VOLD e 1 65V Max 55 b 50 b 75 mA VOHD e 3 85V Min 80 0 80 0 mA VIN e VCC or GND 55 80 DC Electrical Characteristics for CGS74CT CGS74CT and 54ACT 54ACT Family Devices Over recommended operating conditions unless specified otherwise CGS74CT CGS74CT Symbol Parameter VCC (V) 54ACT 54ACT CGS74CT CGS74CT TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ Units Conditions Guaranteed Limits VIH Minimum High Level Input Voltage 45 55 15 15 20 20 20 20 20 20 V VOUT e 0 1V or VCC b0 1V VIL Maximum Low Level Input Voltage 45 55 15 15 08 08 08 08 08 08 V VOUT e 0 1V or VCC b0 1V VOH Minimum High Level Output Voltage (Note 2) 45 55 4 49 5 49 44 54 44 54 44 54 V IOUT e b50 mA 3 86 4 86 3 70 4 70 3 76 4 76 V VIN e VIL or VIH b 24 mA IOH b 24 mA 01 01 01 01 01 01 V IOUT e 50 mA 45 55 0 36 0 36 0 50 0 50 0 44 0 44 V VIN e VIL or VIH 24 mA IOL 24 mA g0 1 g1 0 g1 0 mA VI e VCC GND 16 15 mA VI e VCC b 2 1V 45 55 VOL Maximum Low Level Output Voltage (Note 2) 45 55 0 001 0 001 IIN Maximum Input Leakage Current 55 ICCT Maximum ICC Input 55 IOLD Minimum Dynamic Output Current (Note 4) 55 50 75 mA VOLD e 1 65V Max 55 b 50 b 75 mA VOHD e 3 85V Min 160 0 80 0 mA VIN e VCC or GND IOHD ICC http Maximum Quiescent Supply Current (Note 5) www national com 55 06 80 4 AC Electrical Characteristics Over recommended operating conditions unless specified otherwise CGS74C CGS74C Symbol VCC Range (V) (Note 6) Parameter 54AC CGS74C CGS74C TA e a 25 C CL e 50 pF TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Typ Units Min Typ Max Min Max Min tPLH tPHL Propagation Delay CLK to On ('2525) 33 50 30 32 65 50 11 0 78 30 25 11 0 82 30 29 Max 12 5 81 ns tPLH tPHL Propagation Delay CLKn to On ('2526) 33 50 30 36 70 55 13 0 78 30 33 14 0 86 ns tPLH tPHL Propagation Delay SEL to On ('2526) 33 50 30 40 80 65 14 0 85 30 35 15 0 95 ns tOSHL Maximum Skew Common Edge Output-to-Output (Note 7) Variation tOST tPV 03 15 600 50 02 10 500 33 03 15 600 50 02 10 500 Maximum Skew Opposite Edge Output-to-Output (Note 7) Variation 50 04 Maximum Skew Part-to-Part Variation (Note 8) 'C2525 C2525 'CT2525 CT2525 'C2526 C2526 50 35 'CT2526 CT2526 tOSLH 33 50 50 50 30 ps Maximum Skew Common Edge Output-to-Output (Note 7) Variation ps 15 10 10 ns 10 trise tfall Maximum Rise Fall Time (20% to 80% VCC) trise tfall Maximum Rise Fall Time (0 8V 2 0V and 2 0V 0 8V) 40 ns ns 40 09 3 75 11 ns ns AC Electrical Characteristics Over recommended operating conditions unless specified otherwise CGS74CT CGS74CT Symbol Parameter 54ACT 54ACT CGS74CT CGS74CT TA e a 25 C CL e 50 pF VCC Range (V) (Note 6) TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Min tPLH tPHL Propagation Delay CLK to On ('2525) tPLH tPHL Propagation Delay CLKn to On ('2526) Typ Max 50 46 65 50 58 85 5 Min Max Units Min Max 90 40 10 1 ns 11 1 51 12 4 ns http www national com AC Electrical Characteristics Over recommended operating conditions unless specified otherwise (Continued) CGS74CT CGS74CT Symbol Parameter 54ACT 54ACT CGS74CT CGS74CT TA e a 25 C CL e 50 pF VCC Range (V) (Note 6) TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Min tPLH tPHL Propagation Delay SEL to On ('2526) 50 tOSHL Maximum Skew Common Edge Output-to-Output (Note 7) Variation Maximum Skew Opposite Edge Output-to-Output (Note 7) Variation Max 51 85 12 4 50 Maximum Skew Common Edge Output-to-Output (Note 7) Variation Typ tOSLH tOST tPV Maximum Skew Part-to-Part Variation (Note 8) Min Max Min Typ 44 Units Max 14 1 ns 02 550 ps 50 02 550 ps 50 04 10 ns AC2525 AC2525 ACT2525 ACT2525 AC2526 AC2526 50 35 ns ACT2526 ACT2526 50 50 ns 50 30 trise tfall Maximum Rise Fall Time (20% to 80% VCC) trise tfall Maximum Rise Fall Time (0 8V 2 0V and 2 0V 0 8V) 09 3 75 11 ns ns Note 2 All outputs loaded thresholds on input associated with output under test Note 3 IIN and ICC 3 0V are guaranteed to be less than or equal to the respective limit ICC for 54AC 25 C is identical to CGS74C CGS74C 5 5V VCC 25 C Note 4 Maximum test duration 2 0 ms one output loaded at a time Note 5 ICC for 54ACT 54ACT 25 C is identical to CGS74CT CGS74CT 25 C Note 6 Voltage Range 5 0 is 5 0V g 0 5V voltage range 3 3 is 3 3V g 0 3V Note 7 Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH) or in opposite directions both HL and LH (tOST) tOSHL and tOSLH are characterized and guaranteed by design 1 MHz Note 8 Part-to-part skew is defined as the absolute value of the difference between the propagation delay for any outputs from device to device The parameter is specified for a given set of conditions (i e capacitive load VCC temperature of outputs switching etc ) Parameter guaranteed by design Note 9 Load capacitance includes the test jig http www national com 6 Capacitance Symbol Parameter Typ Units Conditions 45 pF VCC e 5 0V Power Dissipation Capacitance ('2525) 820 pF 1 2 x 10b18 (f) pF VCC e 5 0V Power Dissipation Capacitance ('2526) 820 pF 1 2 x 10b18 (f) pF VCC e 5 0V CIN Input Capacitance CPD CPD f e frequency Recommended Maximum Power Dissipation (W) TA e 25 C LFPM TA e 85 C PDIP SOIC PDIP 0 1 105 0 858 0 528 SOIC 0 41 225 1 493 1 055 0 714 0 504 500 1 71 1 210 0 820 0 578 Timing Diagrams TL F 10684 27 TL F 10684 28 Test Circuit RL is 500X CL is 50 pF for all prop delays and skew measurements TL F 10684 29 7 http www national com Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows TL F 10684 26 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (M) NS Package Number M14A http www national com 8 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Integrated Circuit (M) NS Package Number M16A 14-Lead Plastic Dual-In-Line Package (N) NS Package Number N14A 9 http www national com CGS74C2525 CGS74C2525 CGS74CT2525 CGS74CT2525 CGS74C2526 CGS74C2526 CGS74CT2526 CGS74CT2526 1-to-8 Minimum Skew Clock Driver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (N) NS Package Number N16E LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 http www national com 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax a49 (0) 180-530 85 86 Email europe support nsc com Deutsch Tel a49 (0) 180-530 85 85 English Tel a49 (0) 180-532 78 32 Fran ais Tel a49 (0) 180-532 93 58 Italiano Tel a49 (0) 180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2308 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications