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QLX4270RIQT7 Intersil Corporation DisplayPort Lane Extender; QFN46; Temp Range: 0° to 70° visit Intersil Buy
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QLX4300SIQT7 Intersil Corporation Quad Lane Extender; QFN46; Temp Range: 0° to 70° visit Intersil Buy

CFS T1

Catalog Datasheet MFG & Type PDF Document Tags

CFS2575

Abstract: MH89760 T1 / DS1 CFS2575 CFS 2575 Adjustable Inductor CEPT Output Transformer Surface Mount SMD-6 . 2-11 CFS 2575 is an adjustable inductor (clock extractor coil) for MITEL MH89760 device. Typical applications are: The MH89760 has a , inductor should be tuned to provide a frequency of 1.544 MHz ± 200 Hz. · PBX or computer to T1/CEPT Digital trunks. · High speed data link using T1/CEPT Digital Trunk. · TDM Multiplexers. ·
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CFS2914

Abstract: MH89790 CEPT CFS2914 CFS 2914 Adjustable Inductor CEPt Clock Extr. Coil. Through Hole Standard . 2-12 Typical applications are: CFS 2914 is an adjustable inductor (clock extractor coil) for MITEL MH89790 device. · · High speed data link using T1/CEPT Digital trunks. · TDM Multiplexers. · The MH89790 has a built in , tuned to provide a frequency of 2.048 MHz ± 200 Hz. PBX or computer to T1/CEPT Digital trunks
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2048MHZ

three phase bridge inverter

Abstract: three phase pulse generator - t1 J-L -»n t2 t8 I-1â'" m t3 til J L_ 1141 t9- yt 12 â t I : X LATCH ADDRESS LATCH DATA Fig. 2 INTEL mode Bus Interface Waveforms Parameter Symbol Min Typ Max Units ALE high period t1 , , Temperature = 25°C t* t1 AS DS R/W CE AD0-AD7 J J-*t2a t4 t3 t5 I t6 t7-H W âºits' I I - , the pulse is deleted. The minimum allowable pulse width is defined by the clock frequency, the CFS 3 , 128 as set by PDT clock frequency 1, 2, 4, 8, 16 or 32 (as set by CFS) PDT word 1111111 1111110 .
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three phase bridge inverter three phase pulse generator 3 phase waveform generator three phase bridge inverter in 120 degree ultrasonic generator 1 Mhz Marconi bridge rectifier p MA818

three phase pulse generator electronic circuit

Abstract: ultrasonic generator 1 Mhz Typ Max Units ALE high period t1 70 ns Delay time, ALE to WR t2 40 ns WR low period t3 200 ns , PRELIMINARY DATA SHEET A.C. PERFORMANCE Conditions: Vdd = 5V, Temperature = 25°C Ì* t1 AS DS R/W CE , Units AS high period t1 90 ns Delay time, AS low to DS high t2 40 ns DS high period t3 210 ns , width is defined by the clock frequency, the CFS 3 bit word and the 7 bit Pulse Deletion Time word (PDT , , 16 or 32 (as set by CFS) PDT word 1111111 1111110 . etc. 0000000 Value of pdt 1 2 . etc
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three phase pulse generator electronic circuit A818 6805 motorola MICROCONTROLLER 400H C126

iAPX 286

Abstract: iAPX 88 all register Write Cycles IAPX 286 8208-16 8208-12 iAPX 86/186 8208 8208-6 CFS= 1 (fast cycle) 4-16 MHz 4-12 MHz CFS=0 (slow cycle) 2-8 MHz 2-6 MHz Directly Addresses and Drives up to 1 Megabyte without External , internal address multiplexer. In iAPX 286 mode (CFS =1), these addresses are latched internally. AL3 AL4 , Figure 2A. Slow-Cycle (CFS 0) Interfaces Supported by the 8208 6-101 This Material Copyrighted By Its , Asynchronous-Command Interface Figure 28. Fast-cycle (CFS = 1) Port Interfaces Supported by the 8208 Dynamic RAM
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iAPX 286 iAPX 88 all register 8088 ram 256K APX286 8208-DRAM 8052 AH Basic

ic 4082

Abstract: ic 4082 pin diagram 5 0 k H z , R T1 = 1 0 k i l , R T2 = 5 k i l , C t = 0 .0 0 1 1 5 |xF, T j = 2 5 ° C , unless o th , Offset Voltage F R E Q U E N C Y S H IFT S ECTIO N FSD Current Source CFS Charging Current FSD Voltage , C LL+ C v cc/Co 1 1 2 3 4 5 6 7 8 16 15 14 13 CLI CL + I FSD I CFS F F - -H E SS -E E L , + 15 3 3 - FSD 12 m c T 1 1 10 9 I RT2 I RT1 O 14 3 B CFS 13 3 Q CT 12 3 3 - RT2 11 3 3 -
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ic 4082 ic 4082 pin diagram RT1103 QQQ3370 LAS-4082 LAS-4182 G003374 4182L 4182P

difference between intel 8086 and intel 80186 pro

Abstract: difference between intel 80186 and intel 80286 pro PD8 PD 9 P D10 PD11 PD12 PD13 PD 14 PD15 TM1 PPR F FS I EXT PLS PD 8 PD 7 CIO CM RB1 RBO RFS CFS SB I SA PDO 0 Name ECC SÄ SB CFS RFS RBO RB1 CM CIO PCS EX T FFS PPR TM1 0 0 ECC = 0 SA = 0 SA = 1 SB = 0 SB = 1 CFS = 0 CFS = 1 RFS = 0 RFS = 1 Polarity/Function For non-ECC mode Port A is , FFS |EXT PLS PD 8 PD7 CIO |~5ÌT XB X A |R F S CFS SB SA PDO 1 Name ECC SA SËT CFS RFS XÄ XB CI1 CIO PLS EX T EX T FFS PPR RBO RB1 TM 2 ECC = 1 SA = 0 SA = 1 SB = 0 SB = 1 CFS = 0 CFS = 1 RFS = 0 RFS = 1
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difference between intel 8086 and intel 80186 pro difference between intel 80186 and intel 80286 pro intel 8282 8207 80286 Microprocessor interrupts 8207 intel

AHA4522a

Abstract: LCA-16 Figure 2. Configuration Cycle Followed by Block 1 C_FS, U_FS C_DATA, U_DATA PS4522 , Blocks C_FS, U_FS C_DATA, U_DATA Figure 4: header 1 block 1 header 2 block 2 Fixed Configuration Mode C_FS, U_FS C_DATA, U_DATA cycle 1 cycle 2 cycle 3 cycle 4 last block 1 block , configuration write is started when C_FS is asserted for one C_CLK cycle. The C_FS signal is a sync signal , timing requirements for C_FS. Full Duplex Connection Diagram E_CS_N GND CLKX U_CLK (U_WR_N
Comtech AHA
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AHA4522 AHA4522a LCA-16 Quadrature Decoder Interface ICs PS4540 24 pin outputs decoder ic aha4524

intel 8207

Abstract: ta 8207 k . Slow-Cycle (CFS = 0) Port Interfaces Supported by the 8207 Single-Port Operation The use of an address latch , "MULTI-BUS Option Fast-Cycle Asynchronous-Command Interface Figure 2B. Fast-Cycle (CFS= 1) Port Interfaces , 2003 T3 O t CD ^ CD tr o 3 H- CD ^ n o 3 CD n rr ^ o 3 t-1 H- tr ^ cn CD < H- n CD o o fO , Ignore* 1 0 0 Read Ignore 1 0 1 Read Inhibit 1 1 0 Write Inhibit 1 1 1 Ignore Ignore â'¢Illegal with CFS , Electronic-Library Service CopyRight 2003 intel- PD15 PD8 PD7 PDO 0 0 TM 1 PPR FFS EXT PL§ CIO CI1 RB1 RBO RFS CFS
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intel 8207 ta 8207 k cx59 8207-16 8207A 80186 program loading 2104S3-007 5TCLCL-T26 7TCLCL-T26

OSRAM cfl

Abstract: bridge rectifier using the diode 1N4007 Note RFUS See Note CHB1 100 nF, 200 V 6 1 J1 5 1 J2 4 CFS 10 nF 4 7 , , 2 Fig 2. 5 T1-2 BC847BPN 1 M 2 2 1 J1 = 2.1 mH J2 = 2.7 mH J3 = 3.1 mH , ); J1 = open; J2 = open; J3 = closed CDV dV/dt limiting capacitor CFS floating supply , distance between IC and Lamp filaments. Another solution is to mount the SMD components: CFS, CVDD, COSC , dV/dt limiting capacitor CFS floating supply buffer capacitor CVDD 3.1 mH 220 pF; 500
NXP Semiconductors
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OSRAM cfl bridge rectifier using the diode 1N4007 bridge rectifier 1N4007 SMD DIODE 1N4007 DATASHEET transistor Electronic ballast t5 13w TRANSISTOR SMD 13W UM10392 UBA2024T PLC-13W

AHA4524A-031

Abstract: AHA4524A-031PTC Figure 2. Configuration Cycle Followed by Block 1 C_FS, U_FS C_DATA, U_DATA PS4524 , Blocks C_FS, U_FS C_DATA, U_DATA Figure 4: header 1 block 1 header 2 block 2 Fixed Configuration Mode C_FS, U_FS C_DATA, U_DATA cycle 1 cycle 2 cycle 3 cycle 4 last block 1 block , similar. A data or configuration write is started when C_FS is asserted for one C_CLK cycle. The C_FS , . Figure 32 shows the input timing requirements for C_FS. Full Duplex Connection Diagram E_CS_N GND
Comtech AHA
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AHA4524A-031 AHA4524A-031PTC ANTPC03 PS4501 Demodulator 256 QAM AHA4501 Astro

IC 4033 pin configuration

Abstract: 5 to 32 decoder Followed by Block 1 C_FS, U_FS C_DATA, U_DATA PS4524_0706 cycle 1 cycle 2 cycle 3 last , aha corporation Figure 3: Configuration Header for Consecutive Blocks C_FS, U_FS C_DATA, U_DATA Figure 4: header 1 block 1 header 2 block 2 Fixed Configuration Mode C_FS, U_FS , configuration write is started when C_FS is asserted for one C_CLK cycle. The C_FS signal is a sync signal , timing requirements for C_FS. Full Duplex Connection Diagram E_CS_N GND CLKX U_CLK (U_WR_N
Comtech AHA
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IC 4033 pin configuration 5 to 32 decoder Decoder 5 to 32 single ic 32 line to 5 encoder IC 5 to 32 decoder circuit Decoder 5 to 32

MA828

Abstract: INTEL 27C16 EPROM sampling as used by the MA818 t1 t1 ALE AS t2 RD t2 t4 t4 t3 t3 t5 DS , . Units ALE high period t1 70 ns Delay time, ALE to WR t2 40 WR low period t3 , AS high period t1 90 ns ns Delay time, as low to DS high t2 40 ns 200 , frequency and a division ratio n, determined by the 3-bit CFS word set during initialisation. The values of n are selected as shown in Table 4. CFS word 101 100 011 010 001 000 Value of
Zarlink Semiconductor
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MA828 INTEL 27C16 EPROM intel 8085 microprocessor 27C16 8085 intel microprocessor pin diagram motorola 6805 DS3797

ICE1HS01G

Abstract: ice*1hs01g description 3 Functional description Everytime the capacitor CFS is charged by Ichg to VCH, the upper switch is turned off and CFS will be discharged through Idisc. The charge time determines the on , capacitor CFS is built inside the IC with high accuracy. The simplified oscillator circuit is shown in , 3C FS + T 2 -d I chg- IFB ICS CFS Q [2] The switching frequency can be , Ichg for IC oscillator capacitor CFS is the sum of the four parts including Ichg_min, IFB, ISS and
Infineon Technologies
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ICE1HS01G ice*1hs01g ICE1HS01 diagram power supply LG 32 lcd tv TL431
Abstract: ) 11 7 CFS 10 nF 8 14 6 5 4 1 1 J2 3 OUT 1 J1 3 2 FS 6 , © CLA 1.5 nF 1000 V 4 2 3 R6 R7 1 MΩ 1 MΩ 2 5 T1-2 BC847BPN 3 , T1-1 BC847BPN C12 1 220 pF GND OPTIONAL "LAMP DETECTION CIRCUIT" 019aab390 Fig 2 , limiting capacitor 220 pF; 500 V 220 pF; 500 V CFS floating supply buffer capacitor SMD , and lamp filaments. Another solution is to mount the SMD components: CFS, CVDD, COSC, ROSC, CSW and NXP Semiconductors
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3 phase waveform generator

Abstract: ac dc 38438 as used by the MA828 t1 ALE AS t1 t2 RD t4 t3 t5 t7 t2 WR t3 t4 DS t6 t8 t9 , time Address setup time Address hold time Data setup time Data hold time Symbol t1 t2 t3 t4 t8 t9 t10 , time Address setup time Address hold time Write data setup time Write data hold time Symbol t1 t2 t3 t4 , division ratio n, determined by the 3-bit CFS word set during initialisation. The values of n are selected as shown in Table 4. CFS word Value of n 101 32 100 16 011 8 010 4 001 2 000 1 Table 3 MA828
Zarlink Semiconductor
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ac dc 38438 Pure sinewave inverter circuit diagram MA828-1 braking in ac motors 8085 PWM 38438

pwm program in 8085 for adc

Abstract: MA818 with`double-edged' regular sampling as used by the MA818 t1 t1 ALE AS t2 RD t2 t4 t4 t3 , Symbol Min. Units ALE high period t1 70 ns Delay time, ALE to WR t2 40 WR , Symbol Min. Units AS high period t1 90 ns ns Delay time, as low to DS high t2 , frequency and a division ratio n, determined by the 3-bit CFS word set during initialisation. The values of n are selected as shown in Table 4. CFS word 101 100 011 010 001 000 Value of
Zarlink Semiconductor
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pwm program in 8085 for adc DP40 6805 motorola eprom 27C16 intel 8052 intel 8085 example of application

38438

Abstract: ac dc 38438 used by the MA828 t1 t1 ALE AS t2 RD t2 t4 t4 t3 t3 t5 DS WR , ALE high period t1 70 ns Delay time, ALE to WR t2 40 WR low period t3 Delay , high period t1 90 ns ns Delay time, as low to DS high t2 40 ns 200 ns , function of the externally applied clock frequency and a division ratio n, determined by the 3-bit CFS word set during initialisation. The values of n are selected as shown in Table 4. CFS word 101
Zarlink Semiconductor
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DS3896 dc 38438 inverter circuit diagram 8085 microprocessor microcontroller 8051 speed control of dc motor

ac dc 38438

Abstract: 38438 used by the MA828 t1 t1 ALE AS t2 RD t2 t4 t4 t3 t3 t5 DS WR , ALE high period t1 70 ns Delay time, ALE to WR t2 40 WR low period t3 Delay , high period t1 90 ns ns Delay time, as low to DS high t2 40 ns 200 ns , function of the externally applied clock frequency and a division ratio n, determined by the 3-bit CFS word set during initialisation. The values of n are selected as shown in Table 4. CFS word 101
Zarlink Semiconductor
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7 pin dil smps power control ic inverter smps pwm real time clock using 8085 microprocessor three phase rectifier pwm 3 phase ac sinewave phase inverter single ic PFS11

1H01-1

Abstract: ice*1hs01g . Everytime the capacitor CFS is charged by Ichg to VCH, the upper switch is turned off and CFS will be , programmed with only one external resistor RFMIN connected to FMIN pin. The trimmed capacitor CFS is built , ISS S R VCH CO1 [2] Q Ichg FB IFB Idisc ICS CFS The switching frequency can be obtained , current Ichg The charge current Ichg for IC oscillator capacitor CFS is the sum of the four parts , operate with frequency determined by Ichg_min and ICS. 5V 4.5V VFB (V) 0.5V t1 t2 t3 Time [5] V
Infineon Technologies
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ICE1HS01G-1 1H01-1 audio smps ICE1HS01G1 lcd tv LG ICE1HS01G power supply diagram
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