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Part Manufacturer Description Datasheet BUY
LT1103CY Linear Technology IC SWITCHING CONTROLLER, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices
LT1945IMS Linear Technology IC 0.4 A DUAL SWITCHING CONTROLLER, PDSO8, PLASTIC, MSOP-10, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices
LTC3830DWF Linear Technology IC SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, UUC, DIE, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices
LT3524S Linear Technology IC SWITCHING CONTROLLER, PDSO, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices
LTC3830DWF#PBF Linear Technology IC SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, UUC, DIE, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices
LT1945IMS#TR Linear Technology IC 0.4 A DUAL SWITCHING CONTROLLER, PDSO8, PLASTIC, MSOP-10, Switching Regulator or Controller visit Linear Technology - Now Part of Analog Devices

CDI Controller

Catalog Datasheet MFG & Type PDF Document Tags

motorola 68000 pin diagram

Abstract: motorola 68000 block diagram CD-I's specific needs. The MC68341 contains a 68020-based CPU32, a two channel DMA controller, two , MC68341V Product Brief Integrated CD-I Engine The MC68341 is a member of the M68300 family of integrated processors designed specifically for the compact disc-interactive (CD-I) market. It improves on , MC68341. SYSTEM INTEGRATION MODULE (SIM41) TIMER TWO-CHANNEL DMA CONTROLLER SYSTEM , Chip-Select, Wait State Generation, Bus Watchdog - Interrupt Controller - IEEE 1149.1 Boundary Scan (JTAG
Motorola
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MC68340 MC68000 motorola 68000 pin diagram motorola 68000 block diagram an1063 MC6805 motorola MICROPROCESSOR 68000 MC68341/D

MC68000

Abstract: Motorola MC6805 pin diagram CD-I's specific needs. The MC68341 contains a 68020-based CPU32, a two channel DMA controller, two , MC68341V Product Brief Integrated CD-I Engine The MC68341 is a member of the M68300 family of integrated processors designed specifically for the compact disc-interactive (CD-I) market. It improves on , MC68341. SYSTEM INTEGRATION MODULE (SIM41) TIMER TWO-CHANNEL DMA CONTROLLER SYSTEM , Chip-Select, Wait State Generation, Bus Watchdog - Interrupt Controller - IEEE 1149.1 Boundary Scan (JTAG
Motorola
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Motorola MC6805 pin diagram

AN1063

Abstract: MC68341 CD-I's specific needs. The MC68341 contains a 68020-based CPU32, a two channel DMA controller, two , MC68341V Product Brief Integrated CD-I Engine The MC68341 is a member of the M68300 family of integrated processors designed specifically for the compact disc-interactive (CD-I) market. It improves on , MC68341. SYSTEM INTEGRATION MODULE (SIM41) TIMER TWO-CHANNEL DMA CONTROLLER SYSTEM , Chip-Select, Wait State Generation, Bus Watchdog - Interrupt Controller - IEEE 1149.1 Boundary Scan (JTAG
Motorola
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pin configuration mc68000 cdi reference design MC6805 68020-BASED motorola mc6805 development board Motorola MC6805

motorola mc6805 manual

Abstract: motorola CDI designed specifically for the compact disc-interactive (CD-I) market. It improves on the feature set of the MC68340 for a more complete and cost effective integrated system solution to CD-I's specific needs. The MC68341 contains a 68020-based CPU32, a two channel DMA controller, two serial channels, a timer, and a , '" Chip-Select, Wait State Generation, Bus Watchdog â'" Interrupt Controller â'" IEEE 1149.1 Boundary Scan (JTAG , DMA controller, a serial module, a queued serial peripheral interface, and a timer. The IMB is the
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OCR Scan
motorola mc6805 manual motorola CDI motorola 68020 manual MICROPROCESSOR 68000 manual cdi diagram digital count up and countdown timer M68000

an1063

Abstract: MC6805 motorola Semiconductor, Inc. Integrated CD-I Engine The MC68341 is a member of the M68300 family of integrated processors designed specifically for the compact disc-interactive (CD-I) market. It improves on the feature set of the MC68340 for a more complete and cost effective integrated system solution to CD-I's specific needs. The MC68341 contains a 68020-based CPU32, a two channel DMA controller, two serial , MC68341. SYSTEM INTEGRATION MODULE (SIM41) TIMER TWO-CHANNEL DMA CONTROLLER SYSTEM
Freescale Semiconductor
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MC6805 motorola microprocessor interfaces cdi circuit diagram dram memory module 1993 cdi engine AN1063/D television internal parts block diagram

LCD 07 064 060

Abstract: cdi circuit LCD VDD-VEE 2 , 3 8 20 V H VIH CP , CDI , DI1 3 SDI M P/S , 0.8VDD V DISP OFF , LOAD L VIL CP , CDI , DI1 3 SDI M P/S , 0.2VDD V DISP OFF , LOAD CP fCP CP 3.3 MHz CP tWC CP , /Ta 25 ± 2, VSS 0V , VDD 2.7V 5.5V min typ max unit H IIH VIN VDDLOAD , CP , CDI , P/S , 1 A DI1 , DI2 , DI3 , SDI , M , DISP OFF L IIL VIN VSSLOAD , CP , CDI , P/S , -1 A DI1 , DI2 , VDD-VEE 18V , VDE-VO 0.25V 4 2 4 k O1 O80 IST CDI VDD , VDD-VEE 18V , CP 3.3MHz , 200 A
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LC7940YD LC7941YD QFP100D LCD 07 064 060 cdi circuit cdi unit LCD-801 16*1 lcd 5156k 7941YD LC7940YD7941YD LC7942YDQFP80

transistor c 3181

Abstract: transistor 3181 Description Features = 3052A 3132 SCSI (Small Computer System Interface) controller 5 Mbits/s maximum asynchronous transfer rate, unbalanced cable, 20 MHz clock LC8945 CD-ROM/CD-I Applications (monolithic , 100E 80E 80E 3153 3044B 3181 3151 3174 3174 3181 3151 3044B 3156 3151 CD-ROM/CD-I decoder CD-ROM/CD-I, 68000 MPU peripheral interface CD-I format level A, B, C stereo/mono playback CD-ROM XA interface CD-ROM/CD-I high-performance error correction LSI CD-ROM/CD-I error correction LSI CD-ROM XA interface CD-ROM
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OCR Scan
transistor c 3181 transistor 3181 mr 100 stepper cdi motor LSI for digital copier cd-rom stepper motor LC8951 LC8955 LC89510 LC8956 LC89583 LC8953

cdi unit

Abstract: cdi circuit diagram ···· ···· M ···· ···· FLM ···· ···· Controller LOAD CP SDI CDI , read 4-bit parallel or serial input, display data from a controller into an 80-bit latch, and then , DISPOFF P/S VSS VEE V4 V3 NC VDD V1 M DI1 DI2 DI3 SDI LOAD CDI CP O30 O26 O27 O28 , O75 O74 O73 1 2 3 4 5 6 O80 O79 O78 O77 CP CDI LOAD SDI DI3 DI2 DI1 M V1 VDD NC , (7bits) DI1 P/S 20 SER/PAR Control Chip Disable & Latch Control CDO CDI CP LOAD
SANYO Electric
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LC7940KD LC7941KDR LC7942KD QIP100D 6 pin cdi lc7942k ENA0573 QIP80D

LC7942KD

Abstract: LC7940KD FLM Controller LOAD CP SDI CDI LC7940KD/LC7941KDR LCD 1 1 , /S VSS VEE V4 V3 NC VDD V1 M DI1 DI2 DI3 SDI LOAD CDI CP O30 O26 O27 O28 O29 , 1 2 3 4 5 6 O80 O79 O78 O77 CP CDI LOAD SDI DI3 DI2 DI1 M V1 VDD NC V3 V4 VEE , SER/PAR Control Chip Disable & Latch Control CDO CDI CP LOAD No.A0573-4/13 , 89 92 V3 V1,VEE 88 93 V4 V3,V4 100 81 CP 99 82 CDI
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QIP100DR lcd 1000 LC7941KDRLCDLSI LCDLC7941KDRLC7940KDLSI N2206HKIM B8-8529 A0573-1/13

cdi circuit

Abstract: LC7940KD FLM Controller LOAD CP SDI CDI LC7940KD/LC7941KDR LCD 1 1 , /S VSS VEE V4 V3 NC VDD V1 M DI1 DI2 DI3 SDI LOAD CDI CP O30 O26 O27 O28 O29 , 1 2 3 4 5 6 O80 O79 O78 O77 CP CDI LOAD SDI DI3 DI2 DI1 M V1 VDD NC V3 V4 VEE , SER/PAR Control Chip Disable & Latch Control CDO CDI CP LOAD No.A0573-4/13 , ,V4 100 81 CP 99 82 CDI () H L 98 83 LOAD () 97
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14X20 45MAX A0573-2/13 A0573-11/13 A0573-12/13 A0573-13/13

240-PIXEL

Abstract: 6 pin cdi displays. They read 4­ bit parallel or serial input, display data from a controller into an 80­bit latch , VIL CP, CDI, Dl1 to DI3, M, SDl, P/S,DISPOFF and LOAD ­ ­ 0.2VDD V CP shift clock , max HIGH­level input current IIH VIN =VDD; LOAD, CP, CDI, P/S, DI1 to DI3, SDl, M, and , Conditions Unit min typ max IST CDI = VDD, VDD ­ VEE = 18 V, fCP = 3.3 MHz, no output load , 98 33 033 CDI 99 32 032 31 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
SANYO Electric
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240-PIXEL 128Display la5311 LC7942YD

transistor C 2240

Abstract: cdi unit parallel or serial input, display data from a controller into an 80­bit latch, and then generate LCD drive , , DISPOFF and LOAD 0.8VDD ­ ­ V LOW­level inpvt voltage VIL CP, CDI, Dl1 to DI3, M , HIGH­level input current IIH VIN =VDD; LOAD, CP, CDI, P/S, DI1 to DI3, SDl, M, and DISPOFF ­ ­ , typ max IST CDI = VDD, VDD ­ VEE = 18 V, fCP = 3.3 MHz, no output load ; VSS ­ ­ , O29 O30 V1 CP CDI LOAD SDI DI3 DI2 DI1 M Pad Layout (Top view) M DI1 DI2 DI3
SANYO Electric
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transistor C 2240 DIO64 c 2240 LC7940YC 7941YC LC7941YC LC7942YC QIC-100

n2206

Abstract: b8852 ···· ···· M ···· ···· FLM ···· ···· Controller LOAD CP SDI CDI , read 4-bit parallel or serial input, display data from a controller into an 80-bit latch, and then , DISPOFF P/S VSS VEE V4 V3 NC VDD V1 M DI1 DI2 DI3 SDI LOAD CDI CP O30 O26 O27 O28 , O75 O74 O73 1 2 3 4 5 6 O80 O79 O78 O77 CP CDI LOAD SDI DI3 DI2 DI1 M V1 VDD NC , (7bits) DI1 P/S 20 SER/PAR Control Chip Disable & Latch Control CDO CDI CP LOAD
SANYO Electric
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n2206 b8852 lc7940

mc6809 Application note

Abstract: an618 Acquisition System Application Figure 3. CDI ROM System Application MC6809 MPu Access Controller Video Sub System Video RAM DMA Controller Input Device MK48T18 RTC + 8K X 8 SRAM Audio Sub System ROM RAM CD-I Interface CD - DA Controller Interface Unit CD Player 2/3 , CDI ROM System The TIMEKEEPER products provide one of the best solutions to both these needs. They , Real TIME CLOCK is the Compact Disk Interactive system. In the CDI system the SRAM stores the system
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OCR Scan
MK48T08 mc6809 Application note an618 real time

N3215B

Abstract: SD2B LC8955 No. N 3 2 1 5 C No. N3215B LC8955 CMOS LSI CD-I ADPCM LSI LC8955 CD-I ADPCM LSI CD-I A, B, C / LSI ADPCM I / F CD-I LSI LC8951 2 LSI CD-I LC8955 , CD-I CD-DA AV 370-0596 11 22807 SY IM / 4111 JN / 5250 JNKI / D269 JNVL-0364 / 7219 JNKI No.3215-1/5 LC8955 CD-I & CD-ROM LSI LC8951 () CPU ADPCM DMA , LC8951 ADPCM-data Interfase 8Kbyte CPU DMA Controller CD-DA DATA Cording Information
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LC7883M SD2B N3215 QIP80A D269 ILC05215 3044C ILC05216 ILC05217

EN6158

Abstract: 240-PIXEL controller into an 80­bit latch, and then generate LCD drive signals corresponding to that data. unit , LOAD 0.8VDD ­ ­ V LOW­level inpvt voltage VIL CP, CDI, Dl1 to DI3, M, SDl, P/S , VIN =VDD; LOAD, CP, CDI, P/S, DI1 to DI3, SDl, M, and DISPOFF ­ ­ 1 µA LOW­level , LC7940YD, LC7941YD Ratings Parameter Symbol Conditions Unit min typ max IST CDI = , DI3 96 35 035 SDI 97 34 034 LOAD 98 33 033 CDI 99 32 032
SANYO Electric
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EN6158 DI01 LA5311M DIN 962

SDN0080G

Abstract: cdi dc/dc interfacing with a controller. · Can be cascaded to expand segment number. · Operating voltage range (for , bits) Chip Disable & Latch Control CDO CDI CP LOAD Fig.1 Functional Block Diagram , 52 51 CDI V1 V3 V4 VEE M LOAD VSS DISPOFF VDD R/L NC NC NC DI4 DI3 DI2 DI1 CP CDO , O1~O80 Output Please refer to Table 3 for output voltage level. Chip Disable pin. 81 CDI , reception from a controller. 92, 93, 94 NC Input V1 and VEE are selected levels. V3 and V4 are
Avant Electronics
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SDN0080G SDN8000G LQFP100 QFP100 cdi dc/dc cdi schematics dc cdi schematic diagram dc dc for CDI Circuit SEG339 SDN0080G-LQFPG SDN0080G-QFPG

space qualified synthesizer, 48 bits

Abstract: MC68000 - 68020- BASED CHANNEL PROCESSOR SERIAL I/O INTERMODULE BUS TWO-CHANNEL DMA CONTROLLER TIMER TIMER , Controller for High-Speed Memory Transfers â'" Single- or Dual-Address Transfers â'" 32-Bit Addresses and , controller, a serial module, and two timers. The processor communicates with these modules over the on-chip , between the internal CPU32 or DMA controller and memory, peripherals, or other processing elements in the , controller, used to quickly move large blocks of data between internal peripherals, external peripherals, or
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OCR Scan
MC68340V MC68010 space qualified synthesizer, 48 bits space qualified synthesizer mil MC68020 MC68302 M68000- SIM40 BR1114/D MC68340/D

6 pin cdi

Abstract: B8852 read 4-bit parallel or serial input, display data from a controller into an 80-bit latch, and then , DISPOFF P/S VSS VEE V4 V3 NC VDD V1 M DI1 DI2 DI3 SDI LOAD CDI CP O30 O26 O27 O28 , O75 O74 O73 1 2 3 4 5 6 O80 O79 O78 O77 CP CDI LOAD SDI DI3 DI2 DI1 M V1 VDD NC , (7bits) DI1 P/S 20 SER/PAR Control Chip Disable & Latch Control CDO CDI CP LOAD , CDI I Chip disable. 98 83 LOAD I Data is read in When LOW, and not read in When
SANYO Electric
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lc7940k

cdi circuit diagram

Abstract: cdi diagram | CD-I Error Correction /ADPCM Data Playback I LC8954 Overview The LC8954 is a new chip that adds a generalpurpose 68000 MPU interface circuit, DMA contoller interface circuit, and attenuator , ) for peripheral support of output from CD players in CD-I hardware. This helps the miniaturization and cost reduction for CD-I system. Features · · · · · · Includes all of the LC89560 functions Can directly , ). On-chip DMA controller interface. On-chip subcode interface circuit Sub-CPU can directly access
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OCR Scan
128-PIN 68000MPU QIP128E
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