CD54HC563/3A CD54HC CD54HCT - Datasheet Archive

 

June 1997 CD54HC563/3A COMPLETE DATA SHEET COMING SOON! Description Octal Transparent Latch, Three-State, Inverting Functional

 

S E M I C O N D U C T O R June 1997 CD54HC563/3A CD54HC563/3A COMPLETE DATA SHEET COMING SOON! Description Octal Transparent Latch, Three-State, Inverting Functional Diagram The CD54HC563/3A CD54HC563/3A is a high-speed Octal Transparent Latch manufactured with silicon gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices. D0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 The outputs are transparent to the inputs when the latch enable (LE) is high. When the latch enable (LE) goes low the data is latched. The output enable (OE) controls the threestate outputs. When the output enable (OE) is high the outputs will be in the high impedance state. The latch operation is independent of the state of the output enable. Q0 Q7 LE OE Absolute Maximum Ratings DC Supply Voltage, VCC Voltages Referenced to GND . . . . . . . . . . . . . . . . . -0.5V to +7.0V DC Input Voltage Range, All Inputs, VIN . . . . . . . -0.5V to VCC +0.5V DC Output Voltage Range, All Outputs, VOUT . . -0.5V to VCC +0.5V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, Per Output, IO, For -0.5V < VO < VCC + 0.5V Standard Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25mA Bus Driver Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±35mA DC VCC or GND Current, ICC Standard Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50mA Bus Driver Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±70mA Power Dissipation Per Package, PD TA = -55oC to +100oC (Package F) . . . . . . . . . . . . . . . . . . 500mW TA = +100oC to +125oC (Package F) . . . . . . . . Derate Linearly at 8mW/ oC to 300mW Operating Temperature Range, TA Package Type F . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) At Distance 1/16in. ± 1/32in. (1.59mm ± 0.79mm) From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm) With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended Operating Conditions Operating Temperature Range, TA . . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times, tR, tF at 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0ns to 1000ns at 4.5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0ns to 500ns at 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0ns to 400ns Supply Voltage Range, VCC TA = Full Package Temperature Range CD54HC CD54HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V CD54HCT CD54HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VIN, VOUT . . . . . . . . . . . . . . . 0V to VCC CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1994 1 File Number 3837