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Part Manufacturer Description Datasheet BUY
PIM400K6Z GE Critical Power PIM400 Series; ATCA Board Power Input Module, -36 to -75 Vdc; 400W/10A, I2C Digital Interface & Short pins (3.68mm) visit GE Critical Power
AXA016A0X3-SR12Z GE Critical Power 12V Austin SuperLynxTM 16A: Non-Isolated DC-DC Power Module, 10Vdc –14Vdc input; 0.75Vdc to 5.5Vdc output; 16A Output Current, 100Ω Resistor between Sense and Output Pins visit GE Critical Power
AXA016A0X3-SR12 GE Critical Power 12V Austin SuperLynxTM 16A: Non-Isolated DC-DC Power Module, 10Vdc –14Vdc input; 0.75Vdc to 5.5Vdc output; 16A Output Current, 100Ω Resistor between Sense and Output Pins visit GE Critical Power
EHHD024A0A41-18HZ GE Critical Power DC-DC Regulated Power Supply Module visit GE Critical Power
ESTW036A0F41Z GE Critical Power DC-DC Regulated Power Supply Module visit GE Critical Power
EHHD024A0A41-SZ GE Critical Power DC-DC Regulated Power Supply Module visit GE Critical Power

CD4050 ic 16 pin diagram

Catalog Datasheet MFG & Type PDF Document Tags

CD4049 equivalent

Abstract: CD4049 ic 16 pin diagram CONTROL OUTPUT LOW DRIVE RTN FIGURE 1A. PW-83075P6 BLOCK DIAGRAM · Trapizodal or Sinusoidal , LO FIGURE 1B. PW-84075P6 BLOCK DIAGRAM REGEN STATUS OV AMP REGEN LOW REGEN TRIP ADJ , LOW DRIVE RTN FIGURE 1C. PW-85075P6 BLOCK DIAGRAM ADVANCED TABLE 1. PW-8X075P6 ABSOLUTE , . FUNCTIONAL AND PIN DESCRIPTIONS: (FOR PW-83075P6, PW-84075P6 AND PW-85075P6 UNLESS NOTED) SC FAULT The SC , drain to low within 6 µs. REGEN STATUS (APPLIES TO PW-85075P6 ONLY) The REGEN STATUS pin is
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PW-83075 PW-85075 CD4049 equivalent CD4049 ic 16 pin diagram cd4049 IRML2402 cd4050 cd4049 pin out PW-84075 1-800-DDC-5757 A5976

CD4050 equivalent

Abstract: resolver sensor POWER TRANSISTORS ON PW-8X075P6 1.6 3.0 24 IC = 100A TJ = 125°C 2.5 E (ON) 20 V CE(sat) - , FIGURE 10B. HALL SENSOR SPACING 0.100 (TYP) (2.54) 0.120 (3.04) 16 EQ. PIN 0.100 CENTERS (2.54 , DRIVE VBUS- FIGURE 1A. PW-83075P6 BLOCK DIAGRAM · Trapezoidal or Sinusoidal Compatible · DSP , 's. © 2001 Data Device Corporation RSENSE- FIGURE 1B. PW-84075P6 BLOCK DIAGRAM REGEN STATUS VBUS+ OV , DIAGRAM TABLE 1. PW-8X075P6 ABSOLUTE MAXIMUM RATINGS PARAMETER Drive Supply Voltage Logic Power-In
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CD4050 equivalent resolver sensor amplifier using lm741 LS132

CD4049 ic 16 pin diagram

Abstract: CD4050 ic 16 pin diagram , or logic-level conversion applications. In these applications the CD4049A and CD4050A are pin , well as in new designs. Terminal No. 16 is not connected internally on the CD4049A or CD4050A , supplied in 16-lead hermetic dual-in-line ceramic packages (D and F suffixes), 16-lead dual-in-line plastic package (E suffix), 16-lead ceramic flat packages (K suffix), and in chip form (H suffix). Features: â , hlgh-to-low logic-level converter A G.Ã' S G =A s r\ 8 â'" > A - H = B C I'C C - "> -i I-C D J-5 -!?
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CD4069 CD4050 ic 16 pin diagram IC CD4049 schematic diagram inverter 72 volt input TEA1043 CD4050 pin diagram CD4049A-CD4050A- CD4009A CD4010A MCS-20S24 92CS-204

jd 1803

Abstract: CD4050 ic 16 pin diagram VCC _'- VSS J- NC = I 5 NC - 16 CD4050B FUNCTIONAL DIAGRAM Features: â  High sink current , CD4049UB and CD4050B are pin compatible with the CD4009UB and CD4010B respectively, and can be substituted for these devices in existing as well as in new designs. Terminal No. 16 is not connected internallyon , is recommended. The CD4049UB and CD4050B types are supplied In 16-lead hermetic dual-in-line ceramic packages (D and F suffixes), 16-lead dual-in-line plastic packages(Esuffix), 16-lead ceramic flat packages
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RCA-CD4049UB CD401 CD4069UB jd 1803 CD4049 ic 8 pin diagram CD4049 PIN DIAGRAM pin diagram of CD4050B CD40S0B CD4049UB-I CD4050B-N CS-20M

CD4049 ic 16 pin diagram

Abstract: CD4050 ic 16 pin diagram supply operation (interrupt power mode), tie Power Mode (Pin 17) to E.O.C. (Pin 16). When EOC goes low , the Connection Diagram. Use the Input Pin Connections table for the desired input voltage range. Apply , hybrid IC incorporates active laser trimming of highly stable thin-film resistors to provide module performance with IC price, size and reliability. The device is ideal for portable and remote applications , RESISTOR NETWORK SUCCESSIVE APPROXIMATION REGISTER » u) SERIAL OUT -16) E.O.C. - 2~ì) START
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ADC-HC12B IM6100 ADC-HC12BMC ADC-HC12BMM-QL specifications of CD4050 ic 16 pin diagram CD4049 ic not gate 16 pin diagram TRIMMING POTENTIOMETER 10k ttl to cmos converter 02048-1194/TEL 339-3000ATLX 174388/FAX

TCI 550 antenna

Abstract: 3 phase induction motor fpga POWER TRANSISTORS ON PW-8X075P6 1.6 3.0 24 IC = 100A TJ = 125°C 2.5 E (ON) 20 V CE(sat) - , 0.100 (TYP) (2.54) 0.120 (3.04) 16 EQ. PIN 0.100 CENTERS (2.54 CENTERS) 2.645 (67.183) TOP , DRIVE VBUS- FIGURE 1A. PW-83075P6 BLOCK DIAGRAM · Trapezoidal or Sinusoidal Compatible · DSP , Device Corporation RSENSE- FIGURE 1B. PW-84075P6 BLOCK DIAGRAM REGEN STATUS OV ADJ OV ADJ HIGH OV , -85075P6 BLOCK DIAGRAM TABLE 1. PW-8X075P6 ABSOLUTE MAXIMUM RATINGS PARAMETER Drive Supply Voltage Logic
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TCI 550 antenna 3 phase induction motor fpga

CD4049 ic 8 pin diagram

Abstract: CD4049 ic 16 pin diagram supply operation (interrupt power mode), tie Power Mode (Pin 17) to E.O.C. (Pin 16). When EOC goes low , . Connect the converter as shown in the Connection Diagram. Use the Input Pin Connections table for the , CMOS technology. This hybrid IC incorporates active laser trimming of highly stable thin-film resistors to provide module performance with IC price, size and reliability. The device is ideal for portable , (Pin 23) and Digital Ground (Pin 22) are not connected internally and must be tied together externally
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intersil im6100 cmos ic cd4049 ADC-HC12BMM 339-3000/TLX

CD4049 PIN DIAGRAM

Abstract: CD4049 ic not gate 16 pin diagram (Pin 21). For single supply operation (interrupt power mode), tie Power Mode (Pin 17) to E.O.C. (Pin 16 , , 12-bit, low-power, analog-to-digital converter utilizing CMOS technology. This hybrid IC incorporates active laser trimming of highly stable thin-film resistors to provide module performance with IC price , - SUCCESSrVE APPROXIMATION REGISTER "èâ'"óéèòócbàèàèèéè 14) SERIAL OUT 16) E OC BIT 1 BIT 1 2 3 , signal noise. Analog Common (Pin 23) and Digital Ground (Pin 22) are not connected internally and must be
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RCA 1802 DATEL INTERSIL CD4049 PIN DIAGRAM Circuit 00012 4292 A15V DS-0161A

84256c

Abstract: DEM-ADS1210 ADS1212 are 18-pin devices and the ADS1211 and ADS1213 are 24-pin devices, care must be taken to orient the ADS1210 and ADS1212 devices correctly. Place pin 9 of the ADS1210 or ADS1212 in the lower left-hand corner or pin 12 (DGND) of the DUT socket. The only necessary hardware connections to the , IBM-PC is made with a 25-pin ribbon cable to an unused parallel port. If the computer does not have two , Positive Negative Positive Negative Positive Negative Positive Negative INPUT PIN JUMPER
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ADS1211P CSC10A01103G 1280B-1 84256c DEM-ADS1210 16 pin CD4050 pin configuration what is IC 74LS373 IC 74ls373 DEM-ADS1210/11 ADS121X ADS1213P 84256C-10LP-SK CD4050BC

IC CD4050

Abstract: PW-82351 DISABLE / ENABLE UMC OV FLAG OUT IA OUT IC OUT ICONTROL VPS+ VPSVLPS J2-14 J2-16 J2-10 + C10 J1 , DESCRIPTION J1 PIN J1-1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 PIN FUNCTION OV ADJ N/C HALL FLAG SC FLAG , . (see FIGURE 6, page 9) J2 PIN J2-1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J2 FUNCTION N/C HA HC , A R R PHASE CURRENT TRANSLATOR IC OUT IA OUT ICOMP / IB OUT ICONTROL I E R DRIVE C HIGH , FIGURE 1. PW-82351P6 BLOCK DIAGRAM © 1998, 1999 Data Device Corporation 1 TABLE 1. PW
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PW-82351 IC CD4050 1 Phase PWM Motor drive ic UC1625 application 3-Phase PWM Motor drive ic IC lm741 B-06/99-500

CD4049 PIN DIAGRAM

Abstract: CD4049 equivalent - VBUSOUTPUT VBUS+ REGEN BUSREGEN LOW 7 March 3, 2000 Data Device Corporation PRELIMINARY 16 EQ. PIN , OUTPUT LOW DRIVE VBUS- FIGURE 1A. PW-83075P6 BLOCK DIAGRAM · Trapezoidal or Sinusoidal , RSENSE- FIGURE 1B. PW-84075P6 BLOCK DIAGRAM REGEN STATUS VBUS+ OV ADJ REGEN BUSSLEEP MODE POWER , OUTPUT LOW DRIVE VBUS- FIGURE 1C. PW-85075P6 BLOCK DIAGRAM PRELIMINARY TABLE 1. PW , overvoltage condition has occurred. FUNCTIONAL AND PIN DESCRIPTIONS: (FOR PW-83075P6, PW-84075P6 AND PW
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60v 50a dc motor controller circuit HC 148 TRANSISTOR radar position control servo motor EL2009

CD4049 PIN DIAGRAM

Abstract: CD4049 ic 16 pin diagram 11 c â¡ 18 DATA 11 â  1 " 12 c â¡ 17 VDD CLEAR 13 c â¡ 16 FL OFF HOOK 14 c â¡ 15 POR Figure 1 Pin Diagram VOLTAGE HYSTERESIS CIRCUIT INPUTS mru (TONE I INPUTS I F * CLOCK SQUARE WAVE , SUSTAINED PRODUCTS M-967 DTMF Receiver The Teltone® M-967 tone and rotary dial decoder IC is , clock input (895 kHz = 3.58 MHz/4). Features â'¢ Decodes all 16 DTMF signals â'¢ Contains timing and , Van â  VS5(+) 'I 18 _15_ 7 a _10. 11 U-967 (28-PIN) RECEIVER 21 2 _13_ 4
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CD4049 pin configuration 16 pin CD4049 pin configuration 567 tone bd 426 transistor fp 1016 rotary decoder 447KHZ 28-PIN

F 9988 PE

Abstract: w e r M o d e (Pin 17) to E .O .C . (P in 16). W h e n EO C g o e s low , th e c o n v e rte r is , shown in the Connection Diagram. Use the Input Pin Connections table for the desired input voltage , , analog-todigital converter utilizing CMOS technology. This hybrid IC incorporates active laser trimming of highly stable thin-film resistors to provide module performance with IC price, size and reliability , 01 DIGITAL , COM V, INPUT/OUTPUT CONNECTIONS PIN FUNCTION PIN FUNCTION 1
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F 9988 PE CDP1802

TELTONE m-927

Abstract: pulse counter. The M-927 is contained in a 40-pin package and requires no external components except a , operation per 10,000 digits dialed â'¢ Meets CCITT recommendations for tone receivers â'¢ Decodes all 16 , Figure 1 Block Diagram Tallone C o rpo ra tion , 22121-20th Avenue SE, Bothell, Washington 98021-4408 , SUPPLY VOLTAGE + 12V h5V r vss M-927 ALL OUTPUTS VDD O CD4050 or CD4049 (CMOS , *800*426-3926 or 206-487-1515 Fax: 206-487-2288 7-30 Table 2 Pin Functions Pin Numb
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TELTONE m-927

Q1 BC 558 transistor

Abstract: PW-85075P6 ) 0.100 (TYP) (2.54) 0.120 (3.04) 16 EQ. PIN 0.100 CENTERS (2.54 CENTERS) 2.645 (67.183) 0.120 , - FIGURE 1A. PW-83010P6/83030P6/83075P6 BLOCK DIAGRAM SLEEP_MODE POWER SUPPLY POWER SUPPLY VCC VCC RTN , BLOCK DIAGRAM REGEN STATUS OV_ADJ OV_ADJ_HIGH OV_ADJ_LOW REGEN_CLAMP 5K REGEN_CLAMP + OV AMP , DRIVE VBUS- FIGURE 1C. PW-85010P6/85030P6/85075P6 BLOCK DIAGRAM Data Device Corporation , RESET VDD IC IC.PEAK VOH IOH IRSENSE IRSENSE.PEAK VIRSENSE VIRSENSE_ABS IIRSENSE IIRSENSE_ABS VOH IOH
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Q1 BC 558 transistor hca 9001 PW-8X010P6 PW-8X030P6 IPC-A-610 PW-8X010P6/8X030P6/8X075P6 D-02/03-0

cmos function generator using cd4049

Abstract: CD4049 ic 8 pin diagram ic ty p e . 2 EQMñEQ= CONNECTIONS AND CALIBRATION ADC-HC TIMING DIAGRAM - 50 ,isec MIN FOR , is hybrid IC in c o rp o ra te s a ctive la se r trim m in g o f h ig h ly s ta b le th in -film re s is to rs to p ro vid e m o d u le p e rfo rm a n c e w ith IC price, size and re lia bility. T h e d e v ic e is ide a l fo r p o rta b le and re m o te a p p lica tio n s su ch a s se ism o lo g y, o , . Pin# . W e ig h t
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cmos function generator using cd4049
Abstract: DIAGRAM SLEEP_MODE POWER SUPPLY POWER SUPPLY I S O L A T I O N VCC VCC RTN , -84010P6/84030P6/84075P6 BLOCK DIAGRAM REGEN_CLAMP + 5Kâ"¦ REGEN STATUS OV AMP OV_ADJ OV_ADJ_HIGH , -85010P6/85030P6/85075P6 BLOCK DIAGRAM Data Device Corporation www.ddc-web.com 2 PW-8X010P6/8X030P6/8X075P6 , 5.5 5.5 VDC PW-84XXX 5.5 5.5 5.5 VDC A IC All 75 75 75 IC.PEAK , Transistor Collector-Emitter Voltage VCE PW-85XXX 600 600 600 VDC IC PW-85XXX 40 Data Device
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F-01/04-0
Abstract: 5 ° C to +150 °C Package Type, C e ra m ic . 20 Pin DIP FOOTNOTES: * * * 18 Pin DIP * * * * 16 Pin DIP 'Specification same as first column. 1 , 16-PIN DIP CERAMIC PACKAGE 20-PIN DIP CERAMIC PACKAGE 0 .909 (23,1) 1.010 MAX {'¿ b , advantages over similar mono­ lithic multiplying DACâ'™s while retaining the industry 7500-Series pin com , -bit model. INPUT/OUTPUT CONNECTIONS D C A0 A -H 1 B PIN FUNCTION D C A2 , 1 D A -H 1 B 2 PIN -
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7500-S DAC-HA10BC-1 DAC-HA10BR-1 DAC-HA10BM-1 DAC-HA12BC-1 DAC-HA12BR-1
Abstract: DIAGRAM SLEEP_MODE POWER SUPPLY POWER SUPPLY I S O L A T I O N VCC VCC RTN , -84010P6/84030P6/84075P6 BLOCK DIAGRAM REGEN_CLAMP + 5Kâ"¦ REGEN STATUS OV AMP OV_ADJ OV_ADJ_HIGH , -85010P6/85030P6/85075P6 BLOCK DIAGRAM Data Device Corporation www.ddc-web.com 2 PW-8X010P6/8X030P6/8X075P6 , -85XXX IC Overvoltage Transistor Continuous Current IC.PEAK VDC 600 600 600 PW-85XXX VCE , 5.5 All VOH SC_FAULT Output Voltage A 75 110 75 110 IC 75 Output Current Data Device
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G-03/05-0

16 pin CD4049 pin configuration

Abstract: 4028BD 1 u ntil FCA and/or FCB are p ulled to lo g ic 0. Note: Pin numbers for 28-pin receivers are , g ic 0, BD goes lo the lo gic 1 s ta te w ith in 16 ms a fte r a tone pair is detected. B 0 then re , TT6174 Tone Receiver Features · Decodes all 16 D TM F digits · Provides fully time-guarded rotary , INPUTS I I 16 _27_ Vss ( + ) j L OU TPU TS 26 _ 1S_ 7 6 10_ TT6174 (28-P IN , _13_ T ES T PIN S I Vdd · _ 4 5_ 12 - 447 KHz - 881 H z FR E E -R U N N IN G T IM
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4028BD 40-PIN
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