NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: EA 4016 ELECTRONIC ASSEMBUr BEZEL EA 055 1.1 (0.04) I - 60 (2.36) - ocT o ro 8.2 (0.32) I L ocT CD r 4 J0.16) _6.7 (0.26) T Panel cut-out 57x27 (2.24x1.06) PIN , EA 4016 4 1/2 DIGIT MINI DVM resolutions * LOW POWER * DIGITAL HOLD * SINGLE RAIL VERSION A , ORDERINFORMATION: DVM-MODULE DPM 160 WITH BEZEL EA 055 EA 4016 DVM-MODULE DPM 160-S 160-S WITH BEZEL EA 4016 , Z (N ,- Q ÜJ LU O < Q_ Ü_I CT Cd Q CC Q Q O 0.5 (0.02) 2.54 (0.1) Note that 'Hi' means DGND ... | OCR Scan |
4 pages, |
DPM 160 CD 4016 PIN DIAGRAM datasheet abstract |
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| Abstract: eliminates the need for external bus buffers. The |a.PD4016 PD4016 is packaged in a 600-mil-wide standard 24-pin , mil) â-¡ Low power dissipation in standby mode â-¡ Available in a standard 24-pin dual-in-line package , HPD4016C-5 HPD4016C-5 120ns 120ns 60mA 15mA Pin Configuration 1 24 â-¡ vcc A, L 2 23 â-¡ A. A,C 3 22 â-¡ A, A,C 4 21 , i/o, c 10 15 â-¡ I/O, i/o, n 11 14 â-¡ l/°5 GND C 12 13 I] I/O, Pin identification Description , - 55°C to +125°C Voltage on any Pin with Respect to Ground -1.5V to +7V DC Output Current, l0 20mA ... | OCR Scan |
4 pages, |
D401 PD4016C 4016 RAM HPD4016C-5 D4016 D4016C RAM pd4016 CD 4016 PIN DIAGRAM D4016-2 RAM nec d4016 D4016 RAM D4016C PD4016 D4016 abstract |
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| Abstract: designed to transmit or multiplex analog or digital signals. It is pin-for-pin compatible with CD 4016, MC 14016, CD 4066 and MC 14066 but has much lower ON resistance than the 4016 type devices. ON resistance , bilateral switches in the TL 4066B 4066B is controlled by its own control input pin. The p-channel and n-channel , connected to the input pin when the switch is ON and to VSS when the switch is OFF. The TL4066B TL4066B is available in 14-lead ceramic and plastic DIP, SOIC, and in die form. PIN CONFIGURATION FEATURES Replaces ... | OCR Scan |
5 pages, |
TL4066B CD4066 Types MC 4066 CD4066 PIN configuration 4066B cd4066 MC14066 CI 4016 40668 CD4066 PIN DIAGRAM CD 4016 PIN DIAGRAM CD4066 PIN configuration diagram 4066B abstract |
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| Abstract: the general purpose and 4016 bus pin assignments are shown in table 2-11. P2 pin assignments are , figures 2-1 and 2-2. 2-8 TABLE 2-11. GENERAL PURPOSE AND 4016 P2 BUS PIN ASSIGNMENTS AND COMPARISON PIN 4016 P2 GENERAL PURPOSE P2 PIN 4016 P2 GENERAL PURPOSE P2 PIN 4016 P2 GENERAL PURPOSE P2 1 ADR10 ADR10 ADR 10 , General Purpose P2 Bus Write Cycle.2-14 3-1. Am96/1128 Am96/1128 Block Diagram.3-2 4-1. Am96/1128 Am96/1128 Component Location Diagram.4-2 4-2. Am96/1128 Am96/1128 Schematic Sheet 1.4-3 4-3. ... | OCR Scan |
55 pages, |
Z8000 CD 4016 PIN DIAGRAM AP-28A AD17 AD10 4016B Am96/1000 Am96/1000 abstract |
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| Abstract: Mod/Demod 1200 BPS H CD-4049 Hex Inverter I CD-4016 Quad B1 - Lateral Switch J CD-4013 Dual D , power operation while providing single 5 volt operation. Both devices come in a 28 pin OIL pin package , rating at any pin may be reached before the absolute maximum current ol the input is reached. Caution , level shifter is applied to Pin 3 of the XR-2123 XR-2123 or XR-2123A XR-2123A (RXS). The baud carrier recovery is , carrier. This signal is then level-shifted and applied tr Pin 26, SYN. Figure 2 shows the signals after the ... | OCR Scan |
12 pages, |
XR-14412 xr 2206 am modulation XR-2208 app note LM 4741 F-7404 XR-2123ACP XR-2211 application pin diagram of XR 2206 transistor tt 2206 XR-2208 XR-4741 xr2206 fsk modem CD4013 internal diagram XR-2123A XR-2123 XR-2123A abstract |
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| Abstract: C4.724: 115,00 [4,528] - 93.57 [3.684] (I.A.) - 102.00 [4.016] , backlight 13.7 8.8 no backlight 9.7 4.8 -II- 1,60 [0,063] /BLOCK DIAGRAM \240 x 64, 1/64 DUTY 4-02.50 , DOCUMENT PART NUMBER REV. PIN CONFIGURATION pin 1 symbol level function 1 vss - ground 2 vdd 5v power , mw luminous l lf=6DmA 120 140 175 cd/m2 color - white - - - nm »ONLY APPLIES TO MODULES WITH ... | OCR Scan |
3 pages, |
HA 4016 X24064GXX/E X24064GXX/E abstract |
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| Abstract: 0.020 co.ooi: 102.00 [4.016] ON C5 •c 10 in m o i/5 , UNCONTROLLED DOCUMENT PIN CONFIGURATION FFC CABLE PIN NO. SYMBOL LEVEL FUNCTION 1 FP - FRAME PULSE 2 LP - , LOWER HALF OF THE SCREEN / PIN CONFIGURATION \ /CCFL CONNECTOR MITSUMlN PIN NO. SYMBOL LEVEL FUNCTION , DATE /BLOCK DIAGRAM \ FP-LP-SCP-DISP -VDD -VSS -VEE -UDO~UD3 -LD0~LD3 - VFL â- VFLG â- LP- LP.SCP ... | OCR Scan |
4 pages, |
MD10 M61M73-04 abe 433 126H S640480GWN S640480GWN abstract |
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| Abstract: CMOS DUAL D CD-4016 70404016 ANALOG SWITCH CD-4021 70404021 CMOS PARALLEL 70404051 , CONTROLLED DUAL POT 14-PIN DUAL DIGITAL POT 70400009 HALF BRIDGE SBS-14 SBS-14 MBS-4992 MBS-4992 SBS-14 SBS-14 , 70401436 BRIDGE AMP TDA-2040 TDA-2040 TDA-2040 TDA-2040 70402040 POWER AMP CD-4511 CD-4511 70404511 , 16-PIN SIP PACK * Original in-house part obsolete; no longer available. * When used as input , ARRAY CA-3280E CA-3280E 70403280 CA-3280 CA-3280 I.C. CD-74HC04 70410004 HEX INVT. BUFFER CD ... | Original |
24 pages, |
Motorola 70483180 TLO72 TLO74 70473100 RCA SK CROSS-REFERENCE SJE-5331 SJ-8227 MJ 15030 70474140 70487478 70474200 SJ-6357 70483100 70484140 datasheet abstract |
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| Abstract: ) 10 mA typ. Erase (avg.) 10 mA typ. Standby 100 juA max Packages TH58512FT TH58512FT : PIN ASSIGNMENT (TOP , c 18 31 WPC 19 30 NC c 20 29 NC c 21 28 NC c 22 27 NC c 23 26 NC c 24 25 PIN NAMES NC NC , subject to change without notice. 2000-02-24 1/33 TOSHIBA TH58512FTI TH58512FTI BLOCK DIAGRAM Vcc I/08 0< CE O , ) SYMBOL PARAMETER MIN TYP. MAX UNIT Nvb Number of Valid Blocks 4016 - 4096 Blocks (1) The TH58512 TH58512 , Current of R/B Pin Vql = 0.4 V - 8 - mA 2000-02-24 3/33 TOSHIBA TH58512FTI TH58512FTI AC CHARACTERISTICS AND ... | OCR Scan |
33 pages, |
TH58512FTI TH58512FT 512-MBIT TH58512 TH58512FTI abstract |
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| Abstract: • 24-Pin 600-Mii (15,2 mm) Package Configuration • Pin Compatible with TMS2516 TMS2516, TMS4016 TMS4016, MB8416 MB8416 , compatible with the '4016 and the '2516. Few modifications, if any, are needed for other 16K t Low cost J , PIN NOMENCLATURE AO-A10 AO-A10 Address DQ1-DQ8 Data In/Data Out E Chip Enable/Power Down G Output Enable , 24-pin dual-in-line ceramic sidebraze package (JD suffix) and in a 32-pad leadless ceramic chip carrier , flexibility simplifying data bus design. CD 3 o write enable (W) â- § The read or write mode is_selected ... | OCR Scan |
9 pages, |
TMS4016 TMS2516 MB8416 HM6116 CD 4016 PIN DIAGRAM tc5517 SMJ5517 2048-WORD SMJ5517 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| configuration? Xilinx Answer #7193 : Foundation Schematic - Macro created with incorrect pins from VHDL pin for terminal Q15. Xilinx Answer #6592 : F1.5i Foundation:Btrieve incompatibilty with Macola from the CD? Xilinx Answer #6211 : F1.5is2 - macroed.exe Exception:access violation (0xc0000005 .5, Schematic Editor: Issues involving complex buses; removal of Bus Pin Connection function Xilinx Answer Book: Answers Book must be installed to be used (cannot run from CD) Xilinx Answer #4502 www.datasheetarchive.com/files/xilinx/docs/rp00004/rp00433.htm |
Xilinx | 29/02/2000 | 57.81 Kb | HTM | rp00433.htm |
| ~ ~ Pick Area 10222 ~ ~ Pin Number 10223 ~ ~ Pinout Text: 10224 ~ ~ Predifined by COMDESC text . 10450 ~ ~ Circuit( 10451 ~ ~ Diagram 10452 ~ ~ PCB Layout 10453 ~ ~ Page( 10454 ~ ~ EDWin XP Libs (*.EPX)|*.EPX 1199 ~ ~ Pin assigment invalid 11100 ~ Pinout Text for Tutto Entries invisible Entries (Pins) ~ Number of Entries (Pins) 11163 ~ Entry Placement Grid (Pitch Simulation Code ~ Select Simulation Code 11168 ~ ~ Orientation of Pins 11169 ~ Aggiungi Entry Names as Pin www.datasheetarchive.com/files/kaleidoscope/cad/visionics_edwinxp140/country/italian/e2klocal.txt |
Kaleidoscope | 10/05/2004 | 456.61 Kb | TXT | e2klocal.txt |
| ~ ~ * SUBCIRCUIT DEFINITION * 99125 ~ ~ *Missing* 99126 ~ ~ *Msng* 99127 ~ ~ *Node 99128 ~ ~ , Pin 99129 ~ ~ Can't create P/S pin in Part: 99315 ~ ~ Can't create Pad Stack for Vias 99316 ~ ~ Can't create alignment 99322 ~ ~ Can't create prototype of board frame 99323 ~ ~ Can't create signal pin in Part : 99371 ~ ~ Can't read pin in Part: 99372 ~ ~ Can't rename Page: 99373 ~ ~ Can't renumber entries ~ ~ Fir 99691 ~ ~ First pin down orientation 99692 ~ ~ First pin left orientation 99693 ~ ~ First www.datasheetarchive.com/files/kaleidoscope/cad/visionics_edwinxp140/country/english/e2klocal.txt |
Kaleidoscope | 03/06/2005 | 375.42 Kb | TXT | e2klocal.txt |
| ~ ~ * SUBCIRCUIT DEFINITION * 99125 ~ ~ *Missing* 99126 ~ ~ *Msng* 99127 ~ ~ *Node 99128 ~ ~ , Pin 99129 ~ ~ Can't create P/S pin in Part: 99315 ~ ~ Can't create Pad Stack for Vias 99316 ~ ~ Can't create alignment 99322 ~ ~ Can't create prototype of board frame 99323 ~ ~ Can't create signal pin in Part : 99371 ~ ~ Can't read pin in Part: 99372 ~ ~ Can't rename Page: 99373 ~ ~ Can't renumber entries ~ ~ Fir 99691 ~ ~ First pin down orientation 99692 ~ ~ First pin left orientation 99693 ~ ~ First www.datasheetarchive.com/files/kaleidoscope/cad/visionics_edwinxp140/country/chinese/e2klocal.txt |
Kaleidoscope | 10/05/2004 | 373.4 Kb | TXT | e2klocal.txt |
| ~ ~ * SUBCIRCUIT DEFINITION * 99125 ~ ~ *Missing* 99126 ~ ~ *Msng* 99127 ~ ~ *Node 99128 ~ ~ , Pin 99129 ~ ~ Can't create P/S pin in Part: 99315 ~ ~ Can't create Pad Stack for Vias 99316 ~ ~ Can't create alignment 99322 ~ ~ Can't create prototype of board frame 99323 ~ ~ Can't create signal pin in Part : 99371 ~ ~ Can't read pin in Part: 99372 ~ ~ Can't rename Page: 99373 ~ ~ Can't renumber entries ~ ~ Fir 99691 ~ ~ First pin down orientation 99692 ~ ~ First pin left orientation 99693 ~ ~ First www.datasheetarchive.com/files/kaleidoscope/cad/visionics_edwinxp140/country/polish/e2klocal.txt |
Kaleidoscope | 10/05/2004 | 373.4 Kb | TXT | e2klocal.txt |
| ~ ~ * SUBCIRCUIT DEFINITION * 99125 ~ ~ *Missing* 99126 ~ ~ *Msng* 99127 ~ ~ *Node 99128 ~ ~ , Pin 99129 ~ ~ Can't create P/S pin in Part: 99315 ~ ~ Can't create Pad Stack for Vias 99316 ~ ~ Can't create alignment 99322 ~ ~ Can't create prototype of board frame 99323 ~ ~ Can't create signal pin in Part : 99371 ~ ~ Can't read pin in Part: 99372 ~ ~ Can't rename Page: 99373 ~ ~ Can't renumber entries ~ ~ Fir 99691 ~ ~ First pin down orientation 99692 ~ ~ First pin left orientation 99693 ~ ~ First www.datasheetarchive.com/files/kaleidoscope/cad/visionics_edwinxp140/country/german/e2klocal.txt |
Kaleidoscope | 10/05/2004 | 373.4 Kb | TXT | e2klocal.txt |
| Datasheets Datasheets | Contents | 1.5KE100A 5KE100A 5KE100A 5KE100A - TRANSILS | Contents | 1.5KE100CA 5KE100CA 5KE100CA 5KE100CA - TRANSILS | Contents | 1.5KE10A 5KE10A 5KE10A 5KE10A - TRANSILS | Contents | 1.5KE10CA 5KE10CA 5KE10CA 5KE10CA - TRANSILS | Contents | 1.5KE120A 5KE120A 5KE120A 5KE120A - TRANSILS | Contents | 1.5KE120CA 5KE120CA 5KE120CA 5KE120CA - TRANSILS | Contents | 1.5KE12A 5KE12A 5KE12A 5KE12A - TRANSILS | Contents | 1.5KE12CA 5KE12CA 5KE12CA 5KE12CA - TRANSILS | Contents | 1.5KE150A 5KE150A 5KE150A 5KE150A - TRANSILS | Contents | 1.5KE150CA 5KE150CA 5KE150CA 5KE150CA - TRANSILS | Contents | 1.5KE15A 5KE15A 5KE15A 5KE15A - TRANSILS | Contents www.datasheetarchive.com/files/stmicroelectronics/stonline/books/pdf/alpha/ds/index.htm |
STMicroelectronics | 27/03/1998 | 1704.83 Kb | HTM | index.htm |
| | S30XXXH S30XXXH S30XXXH S30XXXH - SCR | Contents | S4014XH S4014XH S4014XH S4014XH - SCR | Contents | S4016XH - SCR | Contents PROTECTION | Contents | SMTHDT58 SMTHDT58 SMTHDT58 SMTHDT58 - TRISIL FOR SLIC PROTECTION SCHEMATIC DIAGRAM | Contents 16 PINS | Contents | ST6200L ST6200L ST6200L ST6200L - LOW VOLTAGE 8-BIT ROM MICROCONTROLLER (MCU) FAMILY WITH A/D CONVERTER AND 16 PINS | Contents | ST6201C ST6201C ST6201C ST6201C - 8-BIT MICROCONTROLLER ( MCU ) FAMILY WITH OTP, ROM, FASTROM, EPROM, A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 16 PINS | Contents | ST6201L ST6201L ST6201L ST6201L www.datasheetarchive.com/files/stmicroelectronics/stonline/books/pdf/alpha/ds/s.htm |
STMicroelectronics | 27/03/1998 | 387.92 Kb | HTM | s.htm |
| 834-5IN 834-5IN 834-5IN 834-5IN TS834-IDN TS834-IDN TS834-IDN TS834-IDN 6412 TRIPLE VOLTAGE AND CURRENT SUPERVISOR TSM111CD TSM111CN TSM111CN TSM111CN TSM111CN 5360 SILICON NPN 232CDR 232CDR 232CDR 232CDR ST232CD ST232CN ST232CN ST232CN ST232CN ST232CTR ST232CTR ST232CTR ST232CTR ST232CT ST232CT ST232CT ST232CT ST232CWR ST232CWR ST232CWR ST232CWR ST232CW ST232CW ST232CW ST232CW 6421 HIGH VOLTAGE LINEAR REGULATOR POWER I POSITIVE VOLTAGE REGULATORS L7805CD2T L7805CP L7805CP L7805CP L7805CP L7805CT L7805CT L7805CT L7805CT L7805CV L7805CV L7805CV L7805CV L7805T L7805T L7805T L7805T L7806CD2T L7806CP L7806CP L7806CP L7806CP L7806CT L7806CT L7806CT L7806CT L7806CV L7806CV L7806CV L7806CV L7806T L7806T L7806T L7806T L7808CD2T L7808CP L7808CP L7808CP L7808CP L7808CT L7808CT L7808CT L7808CT L7808CV L7808CV L7808CV L7808CV L7808T L7808T L7808T L7808T L7809CD2T L7809CP L7809CP L7809CP L7809CP L7809CT L7809CT L7809CT L7809CT L7809CV L7809CV L7809CV L7809CV L7809T L7809T L7809T L7809T L7812CD2T L7812CP L7812CP L7812CP L7812CP L7812CT L7812CT L7812CT L7812CT L7812CV L7812CV L7812CV L7812CV L7812T L7812T L7812T L7812T L7815CD2T L7815CP L7815CP L7815CP L7815CP L7815CT L7815CT L7815CT L7815CT L7815CV L7815CV L7815CV L7815CV L7815T L7815T L7815T L7815T L7818CD2T L7818CP L7818CP L7818CP L7818CP L7818CT L7818CT L7818CT L7818CT L7818CV L7818CV L7818CV L7818CV www.datasheetarchive.com/files/stmicroelectronics/stonline/db/psearch-v3.txt |
STMicroelectronics | 30/03/1999 | 189.32 Kb | TXT | psearch-v3.txt |
| or stalls while simulating Xilinx Answer #121 : XC3000/XC4000 XC3000/XC4000 XC3000/XC4000 XC3000/XC4000: Pin sense of internal tristate _technology, NULL modelwill be inserted Xilinx Answer #143 : BOUNDARY SCAN/JTAG: XC4000 XC4000 XC4000 XC4000 /INIT pin state during Delay Xilinx Answer #175 : XC4000H XC4000H XC4000H XC4000H: Why are there two tristate pins (TP and TS ) on the 4000H 4000H 4000H 4000H IOBs /XC5K device? Xilinx Answer #195 : FPGA CONFIGURATION : Which pins are driven during clear incorrect pinout for 73108 EPLD pin 160 Xilinx Answer #260 : XBLOX 5.x: Implementing DATA_REG in IOB www.datasheetarchive.com/files/xilinx/docs/wcd00000/wcd00072-v1.htm |
Xilinx | 16/02/1999 | 433.95 Kb | HTM | wcd00072-v1.htm |