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ISL24016IRTZ-T13 Intersil Corporation High Voltage 7-Channel Voltage Level Translator and 2 RRIO Amplifiers; TQFN32; Temp Range: -40° to 85°C visit Intersil Buy
ISL24016IRTZ Intersil Corporation High Voltage 7-Channel Voltage Level Translator and 2 RRIO Amplifiers; TQFN32; Temp Range: -40° to 85°C visit Intersil Buy
GC4016-PB-ASY Texas Instruments SPECIALTY TELECOM CIRCUIT, PBGA160, 15 X 15 MM, PLASTIC, BGA-160 visit Texas Instruments
BQ4016MC-70 Texas Instruments 1MX8 NON-VOLATILE SRAM MODULE, 70ns, DMA36, MODULE, DIP-36 visit Texas Instruments
CD40161BNSRG4 Texas Instruments 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16, GREEN, PLASTIC, SOP-16 visit Texas Instruments
CD4016BM Texas Instruments CMOS Quad Bilateral Switch 14-SOIC -55 to 125 visit Texas Instruments Buy

CD 4016 PIN DIAGRAM

Catalog Datasheet MFG & Type PDF Document Tags

CD 4016 PIN DIAGRAM

Abstract: DPM 160 /8541721 EA 4016 ELECTRONIC ASSEMBUr BEZEL EA 055 1.1 (0.04) I - 60 (2.36) - ocT o ro 8.2 (0.32) I L ocT CD r 4 J0.16) _6.7 (0.26) T Panel cut-out 57x27 (2.24x1.06) PIN , EA 4016 4 1/2 DIGIT MINI DVM resolutions * LOW POWER * DIGITAL HOLD * SINGLE RAIL VERSION A , ORDERINFORMATION: DVM-MODULE DPM 160 WITH BEZEL EA 055 EA 4016 DVM-MODULE DPM 160-S WITH BEZEL EA 4016 , Ll Z Z (N ,â'" Q ÃJ LU O < Q_ Ã_I CT Cd Q CC Q Q O 0.5 (0.02) 2.54 (0.1) Note that 'Hi'
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CD 4016 PIN DIAGRAM DPM 160 4016 PIN DIAGRAM ea 4016 DVM panel DPM 60 4016-S VOLTAGE10 D-82166

pin diagram of ic 4016

Abstract: IC 4016 PIN DIAGRAM . CD54HC4016/3A CD54HCT 4016/3 A "Fswi) Package Specifications See Section 11, Fig. 10 FUNCTIONAL DIAGRAM (Limits with black dots (·) are tested 100%) - Complete Specification CD 54H CT4016 LIM ITS +25° , Current Quiescent Device Current lo ~ 0 mA Additional Quiescent Device Current per Input Pin: 1 unit load , DQSbGGT T H A S _ CD54HC4016/3A CD54HCT 4016/3A INPUT E H A RR IS S E M I C O N D S E C T O R , Test-Circuit Connections Static CD54HC/HCT 4016 OPEN 1-4,8-11 OPEN - (Use Statio II for /3A burn-in and
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pin diagram of ic 4016 IC 4016 PIN DIAGRAM CD 4016 ic diagram hct 4016 CD54HC4016 CD54HCT4016 54HCT CD54HC/HCT4016

D4016 RAM

Abstract: D4016C for extended periods may affect device reliability. |P D 4016 Block Diagram NEC 7-18 , . The |a.PD4016 is packaged in a 600-mil-wide standard 24-pin dual-in-line package which is plug-compatible with 16K EPROMS. |jiPD4016 2,048 X 8-BIT STATIC NMOS RAM Revision 3 Pin Configuration , Plug-compatible with 16K 5V EPROMS (600 mil) Low power dissipation in standby mode Available in a standard 24-pin , Supply Active Standby Pin identification Sym bol 1- 8, Description Address Inputs Data Input
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D4016 RAM D4016C nec d4016 D4016 D4016-2 RAM 4016 static ram

CD4066 PIN configuration diagram

Abstract: CD 4016 PIN DIAGRAM switch designed to transmit or multiplex analog or digital signals. It is pin-for-pin compatible with CD 4016, MC 14016, CD 4066 and MC 14066 but has much lower ON resistance than the 4016 type devices. ON , bilateral switches in the TL 4066B is controlled by its own control input pin. The p-channel and n-channel , connected to the input pin when the switch is ON and to VSS when the switch is OFF. The TL4066B is available in 14-lead ceramic and plastic DIP, SOIC, and in die form. PIN CONFIGURATION FEATURES Replaces
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MC14066 CD4066 PIN configuration diagram cd4066 CD4066 PIN DIAGRAM 40668 CI 4016 CD4066

abe 433

Abstract: LD0 1.5 v , LEO -TDD â'"â JLâ'" 0.020 co.ooi: 102.00 [4.016] ON C5 â'¢c 10 in m o i/5 , BY: DATE: 12.OS .04 PAGE: 1 OF 4 SCALE: N/A UNCONTROLLED DOCUMENT PIN CONFIGURATION FFC CABLE PIN NO. SYMBOL LEVEL FUNCTION 1 FP - FRAME PULSE 2 LP - LATCH PULSE IN ONE LINE i SOP - SHIFT CLOCK , UPPER HALF OF THE SCREEN 12~15 LD0~3 H/L DATA INPUT FOR LOWER HALF OF THE SCREEN / PIN CONFIGURATION
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M61M73-04 abe 433 LD0 1.5 v 126H MD10 PVC-22KT-L/22KT-LD1 S640480GWN M63-MB3-4 M60-04--30-114P M6U-04-30-134P DJ130

fc4k

Abstract: 16-Bit Microcomputers Jumpers.2-8 2-11. General Purpose and 4016 Bus Pin Assignments and Comparisons , the general purpose and 4016 bus pin assignments are shown in table 2-11. P2 pin assignments are , figures 2-1 and 2-2. 2-8 TABLE 2-11. GENERAL PURPOSE AND 4016 P2 BUS PIN ASSIGNMENTS AND COMPARISON PIN 4016 P2 GENERAL PURPOSE P2 PIN 4016 P2 GENERAL PURPOSE P2 PIN 4016 P2 GENERAL PURPOSE P2 1 ADR10 ADR 10 , Purpose P2 Bus Write Cycle.2-14 3-1. Am96/1128 Block Diagram.3-2 4-1. Am96/1128
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4016B AP-28A fc4k 16-Bit Microcomputers refresh logic u107 96/4016B IO-87 MK/12 AMC-722

HA 4016

Abstract: power supply circuit tv ,00 C4.724: 115,00 [4,528] - 93.57 [3.684] (I.A.) - 102.00 [4.016] , b with backlight 13.7 8.8 no backlight 9.7 4.8 â'"IIâ'" 1,60 [0,063] /BLOCK DIAGRAM \240 x 64, 1 , SCALE: N/A UNCONTROLLED DOCUMENT PART NUMBER REV. PIN CONFIGURATION pin 1 symbol level function 1 , - mA power cunsumptiqn pd - - 204 - mw luminous l lf=6DmA 120 140 175 cd/m2 color - white -
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HA 4016 power supply circuit tv lcd 11904 X24064GXX/E 240XT

SBC-901

Abstract: Am8251 Advanced Micro Computers Distributed by Advanced Micro Devices ÃFI Am96/4016 AmZ8000 Evaluation , AmZ8000 Family Interface Manual AmZ8000 Data Book AmZ8001/2 Processor Instruction Set Am96/4016 , . Service Parts and Schematics.C-l Figures 1-1 Board Layout.1-2 1-2 Block Diagram , Addresses.5-10 vi CHAPTER 1 INTRODUCTION 1-1. DESCRIPTION The Am96/4016 Evaluation Board is a , carries control I/O for an on-board programmable counter/ timer channel. 2-1 PARALLEL I/O P3 50â'"pin 1
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SBC-901 Am8251 SBC-902 Am8251-Am9551 logic diagram of ic 7432 ALL TYPE IC DATA AND manual substitution BOOK Z8000 Z8002 Z8001/2 96/4016-ASM F4-13

tc5517

Abstract: TMS4016 SRAM â'¢ 24-Pin 600-Mii (15,2 mm) Package Configuration â'¢ Pin Compatible with TMS2516, TMS4016, MB8416 , SRAMs, and EPROMs. This makes the SMJ5517 plug-in compatible with the '4016 and the '2516. Few , 3 (A >- O E a» S â'¢o c , retains data indefinitely. The SMJ5517 is offered in a 24-pin dual-in-line ceramic sidebraze package (JD , high-impedance state. Output enable provides greater output control flexibility simplifying data bus design. CD
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HM6116 tc5517 TMS4016 SRAM A2187 eprom 2516 74ALSTTL 2048-WORD 600-M TC5517 54S/74S 54LS/74LS

cd 4017 timer

Abstract: back-up Real Time Emulator: BM47214A 5- 40-2 2000 - 10-19 TOSHIBA Pin Assignm ents (Top View , R40 (AINO) R41 (Al N1) R42 (AIN2) cd cd cd O L L JO -L Uo o - i ( / >D Z v > mM « - o I | c cX X H y y ^ KOO P23 P22 P21 P20 N.C. VSS P1 3 P1 2 P11 P10 Block Diagram 2 - 2 2 - i r > v o O r - CM (Y> O | Q 2 2 cd cd vo vo hca ca | - - - - cd \^ < < < < < cn ^ i ' * cd « ñ T ir> ir> ir> ir> cd cd cd cd o « -< n cn cd
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cd 4017 timer TMP47C440B TMP47C440BN TMP47C440BF TLCS-47 P-SDIP42-600-1 FP44-1414-0
Abstract: conventional minimold. The ^¡PC2747TB, ^¡PC2748TB have compatible pin connections and performance to , . FEATURES â'¢ â'¢ â'¢ High-density surface mounting Supply voltage Noise figure â'¢ 6-pin , . (PDC800M, GSM) ORDERING INFORMATION Part Num ber /¿PC2747TB-E3 Package 6-pin super minimold M , , ¿¿PC2748TB NEC PIN CONNECTIONS Pin No. Pin Name 1 INPUT 2 GND 3 GND 4 O , arking 6-pin minimold 1.8 /¿PC2747TB C1S 6-pin super minimold /¿PC2748T 6-pin minimold -
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UPC2747TB PC2747T IR35-00-3 VP15-00-3 WS60-00-1 C10535E

UL2734

Abstract: UL20121 equivalents Black & Pin contact Copper alloy Selective gold plating Socket contact Copper alloy Selective gold , connector SW : Receptacle connector (double layer) SE : Receptacle connector (Lock Pin) (8) Variation Blank , -50P Unit: mm HRS No. No. of Pin Part No. Applicable cable A B C CL230â'"0008â'"0 20 DX30-20P AWG # 30 11.43 , . No. of Pin Part No. Applicable cable A B C CL230-0015-6 20 DX31-20P AWG # 30 11.43 19.18 17.2 CL230 , ® Unit: mm HRS No. No. of Pin Part No. A B C D CL230â'"0036â'"6 20 DX-20-CV 6.7 6.7 22.3 30.0
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UL2734 UL20121 DC-50-CV sumitomo ribbon cable connectors idc 20 pin data ribbon connector LA 4645 HHP-502 CL550-0082-2 DX31-PSG-GPA CL902-2024-6 DX31A-PG-PB CL902-2025-9
Abstract: plane, which is connected to the VSS pin of the upper device in the chain. Figure 2 shows the top , connection and are terminated to either the VSS pin of the upper device or the VDD pin of the lower device , of Codes for 10,000 Samples, VIN4 â'" VIN3 of Device 0 6000 5019 5000 4016 4000 3000 , System Demonstration Platform (SDP-B) evaluation board. The two boards have 120-pin mating connectors , Software disc in the CD drive of the PC. Using "My Computer," locate the drive that contains the Analog Devices
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CN-0235 AD7280A AD8280 M5404 M1400

70413080

Abstract: 70473180 -22402E 70422402 SYNC TIMER GEN. CD-4001DE 70404001 CMOS QUAD NOR 70404013 CMOS DUAL D CD-4016 , POT 14-PIN DUAL DIGITAL POT 70400009 HALF BRIDGE SBS-14 MBS-4992 SBS-14 POT , -1436P1 70401436 BRIDGE AMP TDA-2040 TDA-2040 70402040 POWER AMP CD-4511 CD-4511 70404511 , 16-PIN SIP PACK * Original in-house part obsolete; no longer available. * When used as , -3280E 70403280 CA-3280 I.C. CD-74HC04 70410004 HEX INVT. BUFFER CD-74HC27 70430027 3 INPUT
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70413080 70473180 SAC-187 Motorola 70483180 70483100 70484200 2N3391 SPS-953 MPS-8097 2N6520 MPS-A18 2N6539

fsk modulation and demodulation using Xr2206

Abstract: lm 2206 for frequency modulation -2123 PSK Mod/Demod 1200 BPS H CD-4049 Hex Inverter I CD-4016 Quad B1 - Lateral Switch J CD-4013 Dual D , for power operation while providing single 5 volt operation. Both devices come in a 28 pin OIL pin , gate inputs, the maximum voltage rating at any pin may be reached before the absolute maximum current , Pin 3 of the XR-2123 or XR-2123A (RXS). The baud carrier recovery is similar. After the AGC, the , signal is then level-shifted and applied tr Pin 26, SYN. Figure 2 shows the signals after the XR
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fsk modulation and demodulation using Xr2206 lm 2206 for frequency modulation Cd4013 XR-4741 F-7404 TDA 4608 CD4011 T1-T2220 Q1-2N4403 Q3-2N4401 2N4401 2N4861
Abstract: ard voltage â'" â'" 4016 4011 S u b g ro u p 3 C a p a cita n ce S u b g ro u p 1 T he , â'" 6-147 â'" 1051 2006 1071 â'" 4011 4016 â'" â'" 4011 HEWL ET T- PACKARD , 700 590 8.0 3.0 8.0 A t fp- = 2 >mA 635 m cd 1.& 1.5 70 60 630 8.0 , from the C IE chromaticity diagram and represents the single wavelength which defines the color of the , ,620 (0.300) 0.25410.05 _ (0.010 ± 0.002) PIN , NUMBER 3610 (0 150) 10.160 (0.4001 MAX -
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4447S 1N6Q93 JAN1N5765 JAN1N6093 JANTX1N576S JANTX1N6Q93

scf 4242

Abstract: 74HC183 external clock input. Figure 1. AKD4312B block diagram '98/3 1-278 1-279 , : R14 : The volume of AOUTO The volume of AOUT1 Grounding and Power Supply Decoupling pin and DVDD To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD pin, respectively. AVDD pin is supplied from analog supply in system and DVDDpin is supplied from AVDD pin via 10 , pin and AVSS pin set the analog output range. VREF pin is normally connected to AVDD pin with a 0.1 uF
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YM3623B 74HC183 scf 4242 74HC390T fe 8622 AK4312B AKD5390/89 AKD5339/69 AKD5340 AKD5343/4/5 AKD5330

ic cd 4017

Abstract: cd 4017 IC Emulator: BM47214A TMP47C440B 5- 40-2 2000 - 10-19 TOSHIBA Pin Assignm ents (Top View) (1 , R40 (AINO) R41 (Al N1) R42 (AIN2) cd cd cd O - i ( / >D Z v > mM « - L L J O - LU o o o I | c cX X H y y ^ KOO P23 P22 P21 P20 N.C. VSS P1 3 P1 2 P11 P10 Block Diagram 2 - 2 2 - i r > v o 2 2 - - O r cd cd CM (Y> O | Q vo vo hca ca | -
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ic cd 4017 cd 4017 IC BLOCK DIAGRAM of IC 4017 WITH 16 PINS TMP47P440VN TMP47P440VF 000707EBA1 47C440B 204B-6F CSB400B

R5F2111

Abstract: PLQP0032GB-A CPU core and is packaged in a 32-pin plastic molded LQFP. This MCU operates using sophisticated , ) Package 32-pin plastic mold LQFP Rev.1.60 Jan 27, 2006 REJ03B0034-0160 page 2 of 26 R8C/11 Group 1. Overview 1.3 Block Diagram Figure 1.1 shows this MCU block diagram. 8 8 I/O , on MCU type. 2. RAM size depends on MCU type. Figure 1.1 Block Diagram Rev.1.60 Jan 27, 2006 , .1.60 Jan 27, 2006 REJ03B0034-0160 page 4 of 26 R8C/11 Group 1. Overview 1.5 Pin Assignments
Renesas Technology
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R5F2111 PLQP0032GB-A R5F21112DFP R5F21112FP R5F21113DFP R5F21113FP

PLQP0032GB-A

Abstract: R5F21112DFP ) Figure 5.4 Vcc=5V timing diagram Rev.1.60 Jan 27, 2006 REJ03B0034-0160 page 21 of 26 th(C-D , ) Figure 5.5 Vcc=3V timing diagram Rev.1.60 Jan 27, 2006 REJ03B0034-0160 page 25 of 26 th(C-D , CPU core and is packaged in a 32-pin plastic molded LQFP. This MCU operates using sophisticated , ) Package 32-pin plastic mold LQFP Rev.1.60 Jan 27, 2006 REJ03B0034-0160 page 2 of 26 R8C/11 Group 1. Overview 1.3 Block Diagram Figure 1.1 shows this MCU block diagram. 8 8 I/O
Renesas Technology
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R5F21114DFP R5F21114FP 16-BIT
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