SPRU018D TMS320 SPRU013 SPRU014 SPRU127 SPRU056 SPRU024 SPRU011 SPRU052 SPRA012 - Datasheet Archive

 

Assembly Language T ools User's Guide 1995 Microprocessor Development Systems Printed in U.S.A., March 1995 SDS SPRU018D

 

TMS320C1x/C2x/C2xx/C5x Assembly Language T ools User's Guide 1995 Microprocessor Development Systems Printed in U.S.A., March 1995 SDS SPRU018D SPRU018D TMS320C1x/C2x/C2xx/C5x Assembly Language T ools 1995 User's Guide TMS320C1x/C2x/C2xx/C5x Assembly Language Tools User's Guide Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales offices. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright © 1995, Texas Instruments Incorporated How to Use This Manual Preface Read This First What Is This Book About? The TMS320C1x/C2x/C2xx/C5x Assembly Language Tools User's Guide tells you how to use these assembly language tools: - Assembler Archiver Linker Absolute lister Cross-reference lister Hex conversion utility Before you can use this book, you should read the TMS320C1x/C2x/ C2xx/ C5x Code Generation Tools Getting Started to install the assembly language tools. How to Use This Manual The goal of this book is to help you learn how to use the Texas Instruments assembly language tools specifically designed for the TMS320 TMS320 fixed-point DSPs. This book is divided into four distinct parts: - Part I: Introductory Information gives you an overview of the assembly language development tools and also discusses common object file format (COFF) which helps you to use the TMS320C1x/C2x/C2xx/C5x tools more efficiently. Read Chapter 2 before using the assembler and linker. Part II: Assembler Description contains detailed information about using the assembler. This section explains how to invoke the assembler and discusses source statement format, valid constants and expressions, assembler output, and assembler directives. It also summarizes the TMS320C1x, TMS320C2x, TMS320C2xx, and TMS320C5x instruction sets alphabetically and describes macro elements. Read This First iii How to Use This Manual / Notational Conventions - Part III: Additional Assembly Language Tools describes in detail each of the tools provided with the assembler to help you create assembly language source files. For example, Chapter 8 explains how to invoke the linker, how the linker operates, and how to use linker directives. Chapter 11 explains how to use the hex conversion utility. Part IV: Reference Material provides supplementary information. This section contains technical data about the internal format and structure of COFF object files. It discusses symbolic debugging directives that the TMS320C2x/C5x C compiler uses. Finally, it includes sample linker command files, assembler and linker error messages, and a glossary. Notational Conventions This document uses the following conventions. - - Program listings, program examples, and interactive displays are shown in a special font. Examples use a bold version of the special font for emphasis. Here is a sample program listing: 11 12 13 14 0005 0005 0005 0006 0001 0003 0006 .field .field .field .even 1, 2 3, 4 6, 3 In syntax descriptions, the instruction, command, or directive is in a bold face font and parameters are in an italics. Portions of a syntax that are in bold face should be entered as shown; portions of a syntax that are in italics describe the type of information that should be entered. Syntax that will be entered on a command line is centered in a bounded box. Syntax that will be used in a text file is left-justified in an unbounded box. Here is an example of command line syntax: dspabs filename dspabs is a command. The command invokes the absolute lister and has one parameter, indicated by filename. When you invoke the absolute lister, you supply the name of the file that the absolute lister uses as input. - Square brackets ( [ and ] ) identify an optional parameter. If you use an optional parameter, you specify the information within the brackets; you don't enter the brackets themselves. Here's an example of an instruction that has an optional parameter: dsphex iv [­options] filename Notational Conventions The dsphex command has two parameters. The first parameter, ­options, is optional. Since options is plural, you may select several options. The second parameter, filename, is required. Square brackets are also used as part of the pathname specification for VMS pathnames; in this case, the brackets are actually part of the pathname (they are not optional). - In assembler syntax statements, column one is reserved for the first character of a label or symbol. If the label or symbol is optional, it is usually not shown. If it is a required parameter, then it will be shown starting against the left margin of the shaded box, as in the example below. No instruction, command, directive, or parameter, other than a symbol or label, should begin in column one. symbol .usect "section name", size in bytes The symbol is required for the .usect directive and must begin in column one. The section name must be enclosed in quotes, and the section size in bytes must be separated from the section name by a comma. - Some directives can have a varying number of parameters. For example, the .byte directive can have up to 100 parameters. The syntax for this directive is: .byte value1 [, . , valuen ] Note that .byte does not begin in column one. This syntax shows that .byte must have at least one value parameter, but you have the option of supplying additional value parameters, separated by commas. - Braces ( { and } ) indicate a list. The symbol | (read as or) separates items within the list. Here's an example of a list: { * | *+ | *­ } This provides three choices: *, *+, or *­. Unless the list is enclosed in square brackets, you must choose one item from the list. Read This First v Related Documentation From Texas Instruments Related Documentation From Texas Instruments The following books describe the TMS320C1x, 'C2x, 'C2xx, and 'C5x devices and related support tools. To obtain a copy of any of these TI documents, call the Texas Instruments Literature Response Center at (800) 477­8924. When ordering, please identify the book by its title and literature number. TMS320C1x User's Guide (literature number SPRU013 SPRU013) discusses the hardware aspects of the 'C1x generation of CMOS fixed-point digital signal processors. It describes pin assignments, architecture, instruction set, and software and hardware applications. This book also features a section with analog interface peripherals and applications for the 'C1x DSPs, and includes a consolidated data sheet with electrical specifications and package information for all 'C1x devices. TMS320C2x User's Guide (literature number SPRU014 SPRU014) discusses the hardware aspects of the 'C2x fixed-point digital signal processors. It describes pin assignments, architecture, instruction set, and software and hardware applications. It also includes electrical specifications and package mechanical data for all 'C2x devices. The book features a section with a 'C1x-to-'C2x DSP system migration. TMS320C2xx User's Guide (literature number SPRU127 SPRU127) discusses the hardware aspects of the 'C2xx fixed-point digital signal processors. It describes pin assignments, architecture, instruction set, and software and hardware applications. It also includes electrical specifications and package mechanical data for all 'C2xx devices. The book features a section comparing instructions from 'C2x to 'C2xx. TMS320C5x User's Guide (literature number SPRU056 SPRU056) describes the TMS320C5x 16-bit, fixed-point, general-purpose digital signal processors. Covered are its architecture, internal register structure, instruction set, pipeline, specifications, DMA, and I/O ports. Software applications are covered in a dedicated chapter. TMS320C2x/C2xx/C5x Optimizing C Compiler User's Guide (literature number SPRU024 SPRU024) describes the 'C2x/'C2xx/C5x C compiler. This C compiler accepts ANSI standard C source code and produces TMS320 TMS320 assembly language source code for the 'C2x, 'C2xx, and 'C5x generations of devices. TMS320 TMS320 Family Development Support Reference Guide (literature number SPRU011 SPRU011) describes the '320 family of digital signal processors and covers the various products that support this product line. This includes code-generation tools (compilers, assemblers, linkers, etc.) and system integration and debug tools (simulators, emulators, evaluation modules, etc.). Also covered are available documentation, seminars, the university program, and factory repair and exchange. vi Related Documentation From Texas Instruments TMS320 TMS320 Third-Party Support Reference Guide (literature number SPRU052 SPRU052) alphabetically lists over 100 third parties that provided various products that serve the family of '320 digital signal processors. A myriad of products and applications are offered-software and hardware development tools, speech recognition, image processing, noise cancellation, modems, etc. Digital Signal Processing Applications with the TMS320 TMS320 Family, Volumes 1, 2, and 3 (literature numbers SPRA012 SPRA012, SPRA016 SPRA016, SPRA017 SPRA017) Volumes 1 and 2 cover applications using the 'C10 and 'C20 families of fixed-point processors. Volume 3 documents applications using both fixed-point processors as well as the 'C30 floating-point processor. TMS320C2x C Source Debugger User's Guide (literature number SPRU070 SPRU070) tells how to invoke the debugger with the TMS320C2x simulator version of the C source debugger interface. This book discusses various aspects of the debugger interface, including window management, command entry, code execution, data management, and breakpoints, and includes a tutorial that introduces basic debugger functionality. TMS320C5x C Source Debugger User's Guide (literature number SPRU055 SPRU055) tells you how to invoke the 'C5x emulator, EVM, and simulator versions of the C source debugger interface. This book discusses various aspects of the debugger interface, including window management, command entry, code execution, data management, and breakpoints, and includes a tutorial that introduces basic debugger functionality. Read This First vii If You Need Assistance. / Trademarks If You Need Assistance. . . If you want to. . . Do this. . . Request more information about Texas Instruments Digital Signal Processing (DSP) products Call the DSP hotline: (713) 274­2320 FAX: (713) 274­2324 Order Texas Instruments documentation Call the TI Literature Response Ctr: (800) 477­8924 Ask questions about product operation or report suspected problems Call the DSP hotline: (713) 274­2320 FAX: (713) 274­2324 Report mistakes or make comments about this, or any other TI documentation Send your comments to comments@books.sc.ti.com Please mention the full title of the book and the date of publication (from the spine and/or front cover) in your correspondence. Texas Instruments Incorporated Technical Publications Mgr, MS 702 P.O. Box 1443 Houston, Texas 77251­1443 Trademarks IBM, PC, PC-DOS and OS/2 are trademarks of International Business Machines Corp. MS, MS-DOS, and MS-Windows are registered trademarks of Microsoft Corp. SPARC is a trademark of SPARC International, Inc. SunView, SunWindows, and Sun Workstation are trademarks of Sun Microsystems, Inc. UNIX is a registered trademark of Unix System Laboratories, Inc. XDS is a trademark of Texas Instruments Incorporated. viii Running Title-Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Provides an overview of the assembly language development tools. 1.1 1.2 2 Introduction to Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Discusses the basic COFF concept of sections and how they can help you use the assembler and linker more efficiently. Common object file format, or COFF, is the object file format used by the TMS320 TMS320 fixed-point tools. Read Chapter 2 before using the assembler and linker. 2.1 2.2 2.3 2.4 2.5 2.6 2.7 3 Tools Overview and Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.2.1 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.2.2 Initialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.2.3 Named Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.2.4 Section Program Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.2.5 Absolute Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.2.6 An Example That Uses Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2.3.1 Default Memory Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.2 Placing Sections in the Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14 Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18 Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20 Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21 Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22 2.7.1 External Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22 2.7.2 The Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23 Assembler Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Explains how to invoke the assembler and discusses source statement format, valid constants and expressions, and assembler output. 3.1 3.2 3.3 3.4 Assembler Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Invoking the Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 Upward Compatibility Within the TMS320C1x/C2x/C2xx/C5x Processors . . . . . . . . . . 3-6 3.4.1 Porting Inconsistencies (­p Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 3.4.2 Porting Code Written for 'C2x or 'C5x to the 'C2xx (­pp Option) . . . . . . . . . . . 3-8 3.4.3 Programming the TMS320 TMS320 Pipeline (­w Option) . . . . . . . . . . . . . . . . . . . . . . . . 3-10 ix Contents 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 4 3-12 3-12 3-13 3-15 3-15 3-16 3-16 3-16 3-17 3-17 3-17 3-17 3-18 3-18 3-18 3-19 3-20 3-20 3-20 3-21 3-21 3-23 3-24 3-25 3-26 3-26 3-27 3-27 3-27 3-30 3-33 3-34 Assembler Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Describes the directives according to function, and presents the directives in alphabetical order. 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 x Naming Alternate Directories for Assembler Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.1 ­i Assembler Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.2 A_DIR Environment Variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Source Statement Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.1 Label Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.2 Mnemonic Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.3 Operand Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.4 Comment Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.1 Binary Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.2 Octal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.3 Decimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.4 Hexadecimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.5 Character Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7.6 Assembly-Time Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Character Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.1 Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.2 Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.3 Defining Symbolic Constants (­d Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.4 Predefined Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.5 Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9.6 Local Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.1 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.2 Expression Overflow and Underflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.3 Well-Defined Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.4 Conditional Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.5 Relocatable Symbols and Legal Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . Source Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cross-Reference Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enhanced Instruction Forms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 Directives That Define Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6 Directives That Initialize Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8 Directives That Align the Section Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 Directives That Format the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12 Directives That Reference Other Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14 Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15 Assembly-Time Symbol Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16 Miscellaneous Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-18 Directives Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20 Contents 5 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Summarizes the TMS320C1x, TMS320C2x, TMS320C2xx, and TMS320C5x instruction sets alphabetically. This chapter also discusses enhanced instructions. 5.1 5.2 5.3 6 Macro Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Describes macro directives, substitution symbols used as macro parameters, and how to create macros. 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 7 Using Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 Defining Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 Macro Parameters/Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 6.3.1 Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 6.3.2 Directives That Define Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 6.3.3 Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7 6.3.4 Recursive Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 6.3.5 Forced Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 6.3.6 Accessing Individual Characters of Subscripted Substitution Symbols . . . . . 6-10 6.3.7 Substitution Symbols as Local Variables in Macros . . . . . . . . . . . . . . . . . . . . . . 6-12 Macro Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13 Using Conditional Assembly in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14 Using Labels in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16 Producing Messages in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17 Formatting the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-18 Using Recursive and Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19 Macro Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 Archiver Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 Contains instructions for invoking the archiver, creating new archive libraries, and modifying existing libraries. 7.1 7.2 7.3 7.4 8 Using the Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Enhanced Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5 Instruction Set Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Archiver Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Invoking the Archiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Archiver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2 7-3 7-4 7-6 Linker Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 Explains how to invoke the linker, provides details about linker operation, discusses linker directives, and presents a detailed linking example. 8.1 8.2 8.3 Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Invoking the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.3.1 Relocation Capabilities (­a and ­r Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.3.2 Disable Merge of Symbolic Debugging Information (­b Option) . . . . . . . . . . . . Contents 8-2 8-3 8-5 8-6 8-7 xi Contents 8.4 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 8.13 xii 8.3.3 C Language Options (­c and ­cr Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8 8.3.4 Define an Entry Point (­e global symbol Option) . . . . . . . . . . . . . . . . . . . . . . . . . 8-8 8.3.5 Set Default Value (­f cc Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8 8.3.6 Make All Global Symbols Static (­h Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9 8.3.7 Define Heap Size (­heap constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9 8.3.8 Alter the Library Search Algorithm (­i dir Option/C_DIR) . . . . . . . . . . . . . . . . . 8-10 8.3.9 Create a Map File (­m filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 8.3.10 Name an Output Module (­o filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 8.3.11 Specify a Quiet Run (­q Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 8.3.12 Strip Symbolic Information (­s Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13 8.3.13 Define Stack Size (­stack constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13 8.3.14 Introduce an Unresolved Symbol (­u symbol Option) . . . . . . . . . . . . . . . . . . . . 8-13 8.3.15 Generate Version 0 COFF format (­v0 Option) . . . . . . . . . . . . . . . . . . . . . . . . . 8-14 8.3.16 Warning Switch (­w Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-14 8.3.17 Exhaustively Read Libraries (­x Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15 Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16 Object Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19 The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21 8.6.1 Default Memory Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21 8.6.2 MEMORY Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21 The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24 8.7.1 Default Sections Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24 8.7.2 SECTIONS Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24 8.7.3 Specifying the Address of Output Sections (Allocation) . . . . . . . . . . . . . . . . . . 8-27 8.7.4 Specifying Input Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-30 Specifying a Section's Runtime Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-33 8.8.1 Specifying Load and Run Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-33 8.8.2 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-34 8.8.3 Referring to the Load Address by Using the .label Directive . . . . . . . . . . . . . . 8-34 Using UNION and GROUP Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37 8.9.1 Overlaying Sections With the UNION Statement . . . . . . . . . . . . . . . . . . . . . . . . 8-37 8.9.2 Grouping Output Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39 Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-40 8.10.1 Using the MEMORY Directive to Define Overlay Pages . . . . . . . . . . . . . . . . . . 8-40 8.10.2 Using Overlay Pages With the SECTIONS Directive . . . . . . . . . . . . . . . . . . . . 8-42 8.10.3 Page Definition Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-43 Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45 8.11.1 Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45 8.11.2 General Rules for Forming Output Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-47 Special Section Types (DSECT, COPY, and NOLOAD) . . . . . . . . . . . . . . . . . . . . . . . . . 8-49 Assigning Symbols at Link Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-50 8.13.1 Syntax of Assignment Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-50 8.13.2 Assigning the SPC to a Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-50 8.13.3 Assignment Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-51 8.13.4 Symbols Defined by the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-53 Contents 8.14 8.15 8.16 8.17 9 Creating and Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.14.1 Initialized and Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.14.2 Creating Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.14.3 Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.14.4 Explicit Initialization of Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . Partial (Incremental) Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Linking C Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.16.1 Runtime Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.16.2 Object Libraries and Runtime Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.16.3 Setting the Size of the Heap and Stack Sections . . . . . . . . . . . . . . . . . . . . . . . . 8.16.4 Autoinitialization (ROM and RAM Models) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.16.5 The ­c and ­cr Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Linker Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-54 8-54 8-54 8-56 8-57 8-58 8-60 8-60 8-60 8-61 8-61 8-63 8-64 Absolute Lister Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1 Explains how to invoke the absolute lister to obtain a listing of the absolute addresses of an object file. 9.1 9.2 9.3 Producing an Absolute Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 Invoking the Absolute Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3 Absolute Lister Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5 10 Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1 Explains how to invoke the cross-reference lister to obtain a listing of symbols, their definitions, and their references in the linked source files. 10.1 10.2 10.3 Producing a Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2 Invoking the Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3 Cross-Reference Listing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4 11 Hex Conversion Utility Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1 Explains how to invoke the hex utility to convert a COFF object file into one of several standard hexadecimal formats suitable for loading into an EPROM programmer. 11.1 11.2 11.3 11.4 11.5 Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 Invoking the Hex Conversion Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3 Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5 Understanding Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7 11.4.1 Target Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8 11.4.2 Data Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8 11.4.3 Memory Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8 11.4.4 ROM Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9 11.4.5 A Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12 11.4.6 Specifying Word Order for Output Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12 The ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-14 11.5.1 When to Use the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-16 11.5.2 An Example of the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-17 11.5.3 Creating a Map File of the ROMS directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-19 Contents xiii Contents 11.6 11.7 11.8 The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Filenames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Image Mode and the ­fill Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.8.1 The ­image Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.8.2 Specifying a Fill Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.8.3 Steps to Follow in Image Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9 Building a Table for an On-Chip Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.1 Description of the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.2 The Boot Table Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.3 How to Build the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.4 Booting From a Device Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.5 Setting the Entry Point for the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.6 Using the 'C26 Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.9.7 Using the 'C5x Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.10 Controlling the ROM Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.10.1 Controlling the Starting Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.10.2 Controlling the Address Increment Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.10.3 The ­byte Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.10.4 Dealing With Address Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.11 Description of the Object Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.11.1 ASCII-Hex Object Format (­a Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.11.2 Intel MCS-86 MCS-86 Object Format (­i Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.11.3 Motorola Exorciser Object Format (­m Option) . . . . . . . . . . . . . . . . . . . . . . . . 11.11.4 Texas Instruments SDSMAC Object Format (­t Option) . . . . . . . . . . . . . . . . . 11.11.5 Extended Tektronix Object Format (­x Option) . . . . . . . . . . . . . . . . . . . . . . . . 11.12 Hex Conversion Utility Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 Contains supplemental technical data about the internal format and structure of COFF object files. A.1 A.2 A.3 A.4 A.5 A.6 A.7 xiv 11-20 11-22 11-24 11-24 11-25 11-25 11-26 11-26 11-26 11-27 11-28 11-29 11-30 11-32 11-34 11-34 11-36 11-36 11-37 11-38 11-39 11-40 11-41 11-42 11-43 11-44 COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 File Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4 Optional File Header Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6 Section Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7 Structuring Relocation Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-9 Line Number Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11 Symbol Table Structure and Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-13 A.7.1 Special Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15 A.7.2 Symbol Name Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17 A.7.3 String Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17 A.7.4 Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18 A.7.5 Symbol Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19 A.7.6 Section Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20 A.7.7 Type Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20 A.7.8 Auxiliary Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-22 Contents B Symbolic Debugging Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 Discusses symbolic debugging directives that the TMS320C2x/C5x C compiler uses. C Example Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1 Provides examples of linker command files for the TMS320C10 TMS320C10, TMS320C25 TMS320C25, TMS320C50 TMS320C50, and TMS320C51 TMS320C51. C.1 C.2 C.3 C.4 D Linker Command Files for the TMS320C10 TMS320C10 Linker Command Files for the TMS320C25 TMS320C25 Linker Command Files for the TMS320C50 TMS320C50 Linker Command Files for the TMS320C51 TMS320C51 . . . . C-2 C-3 C-5 C-7 Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1 Illustrates command file development for a variety of memory systems and situations. D.1 D.2 D.3 D.4 Example 1: Building a Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . D-2 Example 2: Avoiding Holes With Multiple Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-7 Example 3: Generating a Boot Table for a 'C50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-9 Example 4: Generating a Boot Table for a 'C26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-18 E Assembler Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-1 Lists the error messages that the assembler issues, and gives a description of the condition which caused each error. F Linker Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-1 Lists the syntax and command, allocation, and I/O error messages that the linker issues, and gives a description of the condition which caused each error. G Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G-1 Defines terms and acronyms used in this book. Contents xv Running Title-Attribute Reference Figures 1­1 2­1 2­2 2­3 2­4 2­5 2­6 3­1 4­1 4­2 4­3 4­4 4­5 4­6 4­7 4­8 4­9 4­10 7­1 8­1 8­2 8­3 8­4 8­5 8­6 8­7 8­8 9­1 10­1 11­1 11­2 11­3 11­4 11­5 11­6 11­7 xvi TMS320C1x/C2x/C2xx/C5x Assembly Language Development Flow . . . . . . . . . . . . . . . . 1-2 Partitioning Memory Into Logical Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Object Code Generated by the Listing in Example 2­1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 Default Allocation for the Object Code in Figure 2­2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 Combining Input Sections From Two Files (Default Allocation) . . . . . . . . . . . . . . . . . . . . . 2-13 Memory Map Defined by Example 2­2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16 Allocating the Sections With the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17 Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 The .space and .bes Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8 The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 Initialization Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10 The .align Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 The .even Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 The .align Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21 Allocating .bss Blocks Within a Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-26 The .even Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-38 The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-42 The .usect Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-78 Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3 Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Defined in Example 8­4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-23 Section Allocation Defined by Example 8­5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27 Runtime Execution of Example 8­7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-36 Memory Allocation Defined by Example 8­8 and Example 8­9 . . . . . . . . . . . . . . . . . . . . . 8-38 Overlay Pages Defined by Example 8­12 and Example 8­13 . . . . . . . . . . . . . . . . . . . . . . 8-41 RAM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-62 ROM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-62 Absolute Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 Cross-Reference Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2 Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 Hex Conversion Utility Process Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7 Data and Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9 Data, Memory, and ROM Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-11 'C2x/C2xx/C5x Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12 Varying the Word Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13 The infile.out File From Example 11­1 Partitioned Into Four Output Files . . . . . . . . . . . 11-18 Figures 11­8 11­9 11­10 11­11 11­12 11­13 11­14 A­1 A­2 A­3 A­4 A­5 A­6 A­7 A­8 A­9 D­2 D­3 D­4 Sample Command File for Booting From a 'C5x EPROM . . . . . . . . . . . . . . . . . . . . . . . . . 11-33 Hex Command File for Avoiding a Hole at the Beginning of a Section . . . . . . . . . . . . . . 11-37 ASCII-Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-39 Intel Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-40 Motorola-S Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-41 TI-Tagged Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-42 Extended Tektronix Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-43 COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 COFF Object File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3 Section Header Pointers for the .text Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8 Line Number Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11 Line Number Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12 Symbol Table Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-13 Symbols for Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16 Symbols for Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16 String Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17 Data From Output File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-5 EPROM System for a 'C50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-9 Sample EPROM System for a 'C26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-18 Contents xvii Running Title-Attribute Reference Tables 1­1 3­1 3­2 3­3 4­1 4­2 5­1 5­2 6­1 6­2 6­3 6­4 6­5 6­6 8­1 8­2 10­1 11­1 11­2 11­3 A­1 A­2 A­3 A­4 A­5 A­6 A­7 A­8 A­9 A­10 A­11 A­12 A­13 A­14 A­15 A­16 xviii Fixed-Point Debugging Support on Various Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Operators Used in Expressions (Precedence) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26 Expressions With Absolute and Relocatable Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28 Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33 Assembler Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 Memory-Mapped Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-58 Symbols and Acronyms Used in the Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . 5-3 Summary of Enhanced Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5 Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8 Creating Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 Manipulating Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 Conditional Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 Producing Assembly-Time Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22 Formatting the Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22 Linker Options Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5 Operators in Assignment Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-52 Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5 Basic Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4 Boot-Loader Utility Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-27 Options for Specifying Hex Conversion Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-38 File Header Contents for COFF Version 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4 File Header Contents for COFF Version 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5 File Header Flags (Bytes 18 and 19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5 Optional File Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6 Section Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7 Section Header Flags (Bytes 36 and 37) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7 Relocation Entry Contents for COFF Version 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-9 Relocation Entry Contents for COFF Version 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-9 Relocation Types (Bytes 8 and 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10 Line Number Entry Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11 Symbol Table Entry Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14 Special Symbols in the Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15 Symbol Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18 Special Symbols and Their Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19 Symbol Values and Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19 Section Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20 Tables A­17 A­18 A­19 A­20 A­21 A­22 A­23 A­24 A­25 A­26 A­27 A­28 Basic Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Derived Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Auxiliary Symbol Table Entries Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Filename Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Section Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tag Name Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . End-of-Structure Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Function Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Array Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . End-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . Beginning-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . Structure, Union, and Enumeration Names Format for Auxiliary Table Entries . . . . . . . . Contents A-21 A-21 A-22 A-23 A-23 A-23 A-24 A-24 A-25 A-25 A-26 A-26 xix Running Title-Attribute Reference Examples 2­1 2­2 2­3 3­1 3­2 3­3 3­4 3­5 3­6 4­1 6­1 6­2 6­3 6­4 6­5 6­6 6­7 6­8 6­9 6­10 6­11 6­12 6­13 6­14 6­15 6­16 8­1 8­2 8­3 8­4 8­5 8­6 8­7 8­8 8­9 8­10 xx Using Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 TMS320C25 TMS320C25 MEMORY and SECTIONS Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15 Code That Generates Relocation Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18 ­p Option and ­v50 Option Effect on Ported Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Basic TMS320C25 TMS320C25 and TMS320C50 TMS320C50 Assembly Construct . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Porting TMS320C25 TMS320C25 and TMS320C50 TMS320C50 to TMS320C2xx . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9 ­w Option Effect on Ported Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 An Assembler Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32 An Assembler Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33 Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7 Macro Definition, Call, and Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 Calling a Macro With Varying Numbers of Arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 Using the .asg Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 Using the .eval Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7 Using Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8 Recursive Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 Using the Forced Substitution Operator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10 Using Subscripted Substitution Symbols to Redefine an Instruction . . . . . . . . . . . . . . . . . 6-11 Using Subscripted Substitution Symbols to Find Substrings . . . . . . . . . . . . . . . . . . . . . . . . 6-11 The .loop/.break/.endloop Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15 Nested Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15 Built-In Substitution Symbol Functions Used in a Conditional Assembly Code Block . . 6-15 Unique Labels in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16 Producing Messages in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17 Using Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19 Using Recursive Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20 Linker Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16 Command File With Linker Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 Linker Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18 The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-22 The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-26 The Most Common Method of Specifying Section Contents . . . . . . . . . . . . . . . . . . . . . . . . 8-31 Copying a Section From ROM to RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-35 The UNION Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37 Separate Load Addresses for UNION Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37 Allocate Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39 Examples 8­11 8­12 8­13 8­14 8­15 11­1 11­2 11­3 C­1 C­2 C­3 C­4 C­5 C­6 C­7 C­8 C­9 C­10 C­11 D­1 D­1 D­2 D­3 D­4 D­5 D­6 D­7 D­8 D­9 D­10 D­11 D­12 D­13 D­14 D­15 D­16 D­17 D­18 D­19 D­21 D­22 Specify One Run Address and Separate Load Addresses . . . . . . . . . . . . . . . . . . . . . . . . . 8-39 Memory Directive With Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-40 SECTIONS Directive Definition for Overlays in Figure 8­6 . . . . . . . . . . . . . . . . . . . . . . . . . 8-42 Linker Command File, demo.cmd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-65 Output Map File, demo.map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-66 A ROMS Directive Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-17 Map File Output From Example 11­1 Showing Memory Ranges . . . . . . . . . . . . . . . . . . . 11-19 Sample Command File for Booting From a 'C26 Serial Port . . . . . . . . . . . . . . . . . . . . . . . 11-31 TMS320C10 TMS320C10 in Microcomputer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2 TMS320C10 TMS320C10 in Microprocessor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2 TMS320C25 TMS320C25 in Microprocessor Mode, Block B0 as Data Memory . . . . . . . . . . . . . . . . . . . C-3 TMS320C25 TMS320C25 in Microcomputer Mode, Block B0 as Data Memory . . . . . . . . . . . . . . . . . . . . C-3 TMS320C25 TMS320C25 in Microprocessor Mode, Block B0 as Program Memory . . . . . . . . . . . . . . . . C-4 TMS320C25 TMS320C25 in Microcomputer Mode, Block B0 as Program Memory . . . . . . . . . . . . . . . . C-4 TMS320C50 TMS320C50 in Microcomputer Mode, Block B0 as Data Memory . . . . . . . . . . . . . . . . . . . . C-5 TMS320C50 TMS320C50 in Microprocessor Mode, Block B0 as Data Memory . . . . . . . . . . . . . . . . . . . C-5 TMS320C50 TMS320C50 in Microcomputer Mode, Block B0 as Program Memory . . . . . . . . . . . . . . . . C-6 TMS320C51 TMS320C51 in Microcomputer Mode, Block B0 as Data Memory . . . . . . . . . . . . . . . . . . . . C-7 TMS320C51 TMS320C51 in Microcomputer Mode, Block B0 as Program Memory . . . . . . . . . . . . . . . . C-7 A Two 8-Bit EPROM System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-2 Assembly Code for Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1 A Linker Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-3 A Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-4 Map File Resulting From Hex Command File in Example D­3 . . . . . . . . . . . . . . . . . . . . . . . D-6 Linker Command File: Method One for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-7 Hex Command File: Method One for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-8 Linker Command File: Method Two for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-8 Hex Command File: Method Two for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-8 C Code for a 'C50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-9 Linker Command File to Form a Single Boot Section for a 'C50 . . . . . . . . . . . . . . . . . . . . D-11 Section Allocation Portion of Map File Resulting From the Command File in Example D­10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-12 Linker Command for Setting the Boot Routine Selection Word for a 'C50 . . . . . . . . . . . . D-14 Hex Command File for Converting a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-16 Map File Resulting From the Command File in Example D­13 . . . . . . . . . . . . . . . . . . . . . D-17 Hex Conversion Utility Output File Resulting From the Command File in Example D­13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-17 C Code for a 'C26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-18 Linker Command File for 'C26 With Parent and Child CPUs . . . . . . . . . . . . . . . . . . . . . . . D-19 Section Allocation Portion of Map File Resulting From the Command File in Example D­17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-20 Hex Command File for 'C26 With Parent and Child CPUs . . . . . . . . . . . . . . . . . . . . . . . . . D-22 Map File (c26boot.mxp) Resulting From the Command File in Example D­19 . . . . . . . . D-23 Output File (c26boot.hex) Resulting From the Command File in Example D­19 . . . . . . D-24 Contents xxi Notes, Cautions, and Warnings Notes Default Section Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 The .asect Directive Is Obsolete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 Examples in This Section Are for the TMS320C25 TMS320C25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 ­ w Does Not Provide Warnings for All Pipeline Conflicts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 Register Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23 The .byte, .word, .int, .long, .string, .float, and .field Directives in a .struct/.endstruct Sequence 4-10 The .asect Directive Is Obsolete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-22 Use .endm to End a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-36 Creating a Listing File (­l option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-51 Directives That Can Appear in a .struct/.endstruct Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-72 Naming Library Members . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4 Compatibility With Previous Versions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24 Binding and Alignment or Named Memory Are Incompatible . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-29 The .asect Directive Is Obsolete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-34 Union and Overlay Page Are Not the Same . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-38 The PAGE Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48 Filling Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-57 The TI-Tagged Format Is 16 Bits Wide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10 When the ­order Option Applies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13 Sections Generated by the C Compiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-20 Using the ­boot Option and the SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-21 Defining the Ranges of Target Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-24 Valid Entry Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-29 xxii Running Title-Attribute Reference Chapter 1 Introduction The TMS320C1x/C2x/C2xx/C5x fixed-point DSPs are supported by the following assembly language tools: - Assembler Archiver Linker Absolute lister Cross-reference lister Hex conversion utility This chapter shows how these tools fit into the general software tools development flow and gives a brief description of each tool. For convenience, it also summarizes the C compiler and debugging tools; however, the compiler and debugger are not shipped with the assembly language tools. For detailed information on the compiler and debugger and for complete descriptions of the TMS320C1x/C2x/C2xx/C5x devices, refer to books listed in Related Documentation From Texas Instruments on page vi. The assembly language tools create and use object files in common object file format (COFF) to facilitate modular programming. Object files contain separate blocks (called sections) of code and data that you can load into TMS320 TMS320 memory spaces. You can program the TMS320 TMS320 devices more efficiently if you have a basic understanding of COFF. Chapter 2, Introduction to Common Object File Format, discusses this object format in detail. Topic Page 1.1 Tools Overview and Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Chapter Title-Attribute Reference 1-1 Tools Overview and Development Flow 1.1 Tools Overview and Development Flow Figure 1­1 shows the assembly language development flow. The shaded portion highlights the most common development path; the other portions are optional. Figure 1­1. TMS320C1x/C2x/C2xx/C5x Assembly Language Development Flow TMS320C2x/C2xx/C5xx only C Source Files Macro Source Files C Compiler Archiver Assembler Source Assembler Source Macro Library Assembler Archiver Library of Object Files 1-2 Library-Build Utility RuntimeSupport Library Linker Debugging Tools Executable COFF File Hex Conversion Utility EPROM Programmer COFF Object Files Absolute Lister Cross-Reference Lister TMS320C1x TMS320C2x TMS320C2xx TMS320C5x Tools Descriptions 1.2 Tools Descriptions - - - - - The TMS320C2x/C2xx/C5x C compiler translates C source code into TMS320C2x/C2xx/C5x assembly language source code. The C compiler is not shipped with the assembly language tools package. The assembler translates assembly language source files into machine language COFF object files. Source files can contain instructions, assembler directives, and macro directives. You can use assembler directives to control various aspects of the assembly process, such as the source listing format, data alignment, and section content. The archiver allows you to collect a group of files into a single archive file. For example, you can collect several macros into a macro library. The assembler will search the library and use the members that are called as macros by the source file. You can also use the archiver to collect a group of object files into an object library. The linker will include in the library the members that resolve external references during the link. The linker combines object files into a single executable COFF object module. As it creates the executable module, it performs relocation and resolves external references. The linker accepts relocatable COFF object files (created by the assembler) as input. It also accepts archiver library members and output modules created by a previous linker run. Linker directives allow you to combine object file sections, bind sections or symbols to addresses or within memory ranges, and define or redefine global symbols. The absolute lister generates a file that can be reassembled to produce a listing of the absolute addresses of an object file. The cross-reference lister uses object files to produce a cross-reference listing showing symbols, their definition, and their references in the linked source files. The TMS320C1x/C2x/C2xx/C5x debugging tools accept COFF files as input, but most EPROM programmers do not. The hex conversion utility converts a COFF object file into TI-Tagged, Intel, Motorola, or Tektronix object format. The converted file can be downloaded to an EPROM programmer. Table 1­1 lists debugging tools that you can use on various systems to refine and correct your code before you download it. Introduction 1-3 Tools Descriptions Table 1­1. Fixed-Point Debugging Support on Various Systems Debugging Tools Note: 1-4 'C5x PC PC PC PC SPARC SPARC PC PC PC SPARC SPARC PC PC PC SPARC Emulator 'C2xx SPARC Evaluation Module 'C2x SPARC Simulator 'C1x SPARC PC PC PC running under MS-DOS or OS/2. SPARC running under UNIX. Running Title-Attribute Reference Chapter 2 Introduction to Common Object File Format The assembler and linker create object files that can be executed by a TMS320C1x/C2x/C2xx/C5x The format of these object files is called common object file format, or COFF. COFF makes modular programming easier because it encourages you to think in terms of blocks of code and data when you write an assembly language program. These blocks are known as sections. Both the assembler and the linker provide directives that allow you to create and manipulate sections. This chapter provides an overview of COFF sections and includes the following topics: Topic Page 2.1 Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.3 How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2.4 Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18 2.5 Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20 2.6 Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21 2.7 Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22 For additional information, see Appendix A, which details COFF object file structure. Chapter Title-Attribute Reference 2-1 Sections 2.1 Sections The smallest unit of an object file is called a section. A section is a block of code or data that will ultimately occupy contiguous space in the memory map. Each section of an object file is separate and distinct. COFF object files always contain three default sections: .text section .data section .bss section usually contains executable code. usually contains initialized data. usually reserves space for uninitialized variables. In addition, the assembler and linker allow you to create, name, and link named sections that are used like the .data, .text, and .bss sections. There are two basic types of sections: Initialized sections contain data or code. The .text and .data sections are initialized; named sections created with the .sect assembler directive are also initialized. Uninitialized sections reserve space in the memory map for uninitialized data. The .bss section is uninitialized; named sections created with the .usect assembler directive are also uninitialized. Several assembler directives allow you to associate various portions of code and data with the appropriate sections. The assembler builds these sections during the assembly process, creating an object file organized as shown in Figure 2­1. One of the linker's functions is to relocate sections into the target memory map; this function is called allocation. Because most systems contain several types of memory, using sections can help you use target memory more efficiently. All sections are independently relocatable; you can place any section into any allocated block of target memory. For example, you can define a section that contains an initialization routine and then allocate the routine into a portion of the memory map that contains EPROM. Figure 2­1 shows the relationship between sections in an object file and a hypothetical target memory. 2-2 Sections Figure 2­1. Partitioning Memory Into Logical Blocks Initialized Program Memory Object File Uninitialized Data Memory on-chip ROM .data on-chip RAM on-chip ROM .text .bss Introduction to Common Object File Format 2-3 How the Assembler Handles Sections 2.2 How the Assembler Handles Sections The assembler identifies the portions of an assembly language program that belong in a section. The assembler has six directives that support this function: - .bss .usect .text .data .sect .asect The .bss and .usect directives create uninitialized sections; the .text, .data, .sect, and .asect directives create initialized sections. Note: Default Section Directive If you don't use any of the sections directives, the assembler assembles everything into the .text section. 2.2.1 Uninitialized Sections Uninitialized sections reserve space in TMS320 TMS320 memory; they are usually allocated into RAM. These sections have no actual contents in the object file; they simply reserve memory. A program can use this space at runtime for creating and storing variables. Uninitialized data areas are built by using the .bss and .usect assembler directives. The .bss directive reserves space in the .bss section. The .usect directive reserves space in a specific uninitialized named section. Each time you invoke the .bss directive, the assembler reserves more space in the .bss section. Each time you invoke the .usect directive, the assembler reserves more space in the specified named section. The syntax for these directives is: .bss symbol, size in words [blocking flag] symbol .usect "section name", size in words, [blocking flag] symbol size in words 2-4 points to the first byte reserved by this invocation of the .bss or .usect directive. The symbol corresponds to the name of the variable that you're reserving space for. It can be referenced by any other section and can also be declared as a global symbol (with the .global assembler directive). is an absolute expression. The .bss directive reserves size words in the .bss section; the .usect directive reserves size words in section name. How the Assembler Handles Sections blocking flag is an optional parameter. If you specify a value greater than 0 for this parameter, the assembler associates size words contiguously; the allocated space will not cross a page boundary, unless size is greater than a page, in which case the object will start on a page boundary. section name tells the assembler which named section to reserve space in. For more information about named sections, refer to subsection 2.2.3. The .text, .data, .sect, and .asect directives tell the assembler to stop assembling into the current section and begin assembling into the indicated section. The .bss and .usect directives, however, do not end the current section and begin a new one; they simply "escape" from the current section temporarily. The .bss and .usect directives can appear anywhere in an initialized section without affecting its contents. 2.2.2 Initialized Sections Initialized sections contain executable code or initialized data. The contents of these sections are stored in the object file and placed in TMS320 TMS320 memory when the program is loaded. Each initialized section is separately relocatable and may reference symbols that are defined in other sections. The linker automatically resolves these section-relative references. Four directives tell the assembler to place code or data into a section. The syntaxes for these directives are: .text .data .sect "section name" .asect "section name" , address When the assembler encounters one of these directives, it stops assembling into the current section (acting as an implied "end current section" command). It then assembles subsequent code into the designated section until it encounters another .text, .data, .sect, or .asect directive. Sections are built through an iterative process. For example, when the assembler first encounters a .data directive, the .data section is empty. The statements following this first .data directive are assembled into the .data section (until the assembler encounters a .text, .sect, or .asect directive). If the assembler encounters subsequent .data directives, it adds the statements following these .data directives to the statements already in the .data section. This creates a single .data section that can be allocated contiguously into memory. Introduction to Common Object File Format 2-5 How the Assembler Handles Sections 2.2.3 Named Sections Named sections are sections that you create. You can use them like the default .text, .data, and .bss sections, but they are assembled separately. For example, repeated use of the .text directive builds up a single .text section in the object file. When linked, this .text section is allocated into memory as a single unit. Suppose there is a portion of executable code (perhaps an initialization routine) that you don't want allocated with .text. If you assemble this segment of code into a named section, it will be assembled separately from .text, and you will be able to allocate it into memory separately. You can also assemble initialized data that is separate from the .data section, and you can reserve space for uninitialized variables that is separate from the .bss section. Three directives let you create named sections: - The .usect directive creates sections that are used like the .bss section. These sections reserve space in RAM for variables. The .sect and .asect directives create sections, like the default .text and .data sections, that can contain code or data. The .sect directive creates named sections with relocatable addresses; the .asect directive creates named sections with absolute addresses. The syntaxes for these directives are: symbol .usect "section name", size in words, [blocking flag] .sect "section name" .asect "section name" , address The section name parameter is the name of the section. Section names are significant to 8 characters. You can create up to 32,767 separate named sections. Each time you invoke one of these directives with a new name, you create a new named section. Each time you invoke one of these directives with a name that was already used, the assembler assembles code or data (or reserves space) into the section with that name. You cannot use the same names with different directives. That is, you cannot create a section with the .usect directive and then try to use the same section with .sect. The .asect address identifies the section's absolute starting address in target memory. This address is required the first time that you assemble into a specific absolute section. If you use .asect to continue assembling into an absolute section that already contains code, you cannot use the address parameter. 2-6 How the Assembler Handles Sections 2.2.4 Section Program Counters The assembler maintains a separate program counter for each section. These program counters are known as section program counters, or SPCs. An SPC represents the current address within a section of code or data. Initially, the assembler sets each SPC to 0. As the assembler fills a section with code or data, it increments the appropriate SPC. If you resume assembling into a section, the assembler remembers the appropriate SPC's previous value and continues incrementing the SPC at that point. The assembler treats each section as if it began at address 0. The linker relocates each section according to its final location in the memory map. 2.2.5 Absolute Sections The .asect directive defines a named section whose addresses are absolute with respect to a specified address. Absolute sections are useful for loading code from off-chip memory into faster on-chip memory. Note: The .asect Directive Is Obsolete The .asect directive is obsolete because the linker's SECTIONS directive now allows separate load and run addresses for any section; however, the .asect directive is fully functional to allow compatibility with previous versions of the assembler. For more information, refer to Section 8.7, page 8-24. 2.2.6 An Example That Uses Sections Directives Figure 2­1 shows how you can build COFF sections incrementally, using the sections directives to swap back and forth between the different sections. You can use sections directives to begin assembling into a section for the first time, or to continue assembling into a section that already contains code. In the latter case, the assembler simply appends the new code to the code that is already in the section. The format in Example 2­1 is a listing file. Example 2­1 shows how the SPCs are modified during assembly. A line in a listing file has four fields: Field 1 Field 2 Field 3 Field 4 contains the source code line counter. contains the section program counter. contains the object code. contains the original source statement. Introduction to Common Object File Format 2-7 How the Assembler Handles Sections Example 2­1.Using Sections Directives 1 2 3 4 5 0000 6 0000 0011 0001 0022 0002 0033 7 8 9 10 0000 11 0001 12 13 14 15 0003 0123 16 17 18 19 0000 20 0000 200f 21 0001 d003 0002 0001 22 0003 f280 0004 0001' 23 0005 6000­ 24 25 26 27 28 0004 29 0004 00aa 0005 00bb 30 31 32 33 0000 34 0001 35 36 37 38 0006 39 0006 ccff * * assemble an initialized table into .data * * .data coeff .word 011h, 022h, 033h * * reserve space in .bss for two variables * * .bss var1, 1 .bss buffer, 10 * * still in data * * ptr .word 0123h * * assemble code into .text section * * .text add: LAC 0Fh aloop: SBLK 1 BLEZ SACL var1, 0 * * assemble another initialized table into * * the .data section * * .data ivals .word 0AAh, 0BBh * * define the named section ``newvars'' * * var2 .usect "newvars", 1 inbuf .usect "newvars", 7 * * assemble more code into .text * * .text ADD #0FFh Field 1 Field 2 Field 3 2-8 aloop Field 4 How the Assembler Handles Sections As Figure 2­2 shows, the file in Example 2­1 creates four sections: .text .data .bss newvars contains 7 words of object code. contains 5 words of object code. reserves 11 words in memory. is a named section created with the .usect directive; it reserves 8 words in memory. The second column shows the object code that is assembled into these sections; the third column shows the source statements that generated the object code. Figure 2­2. Object Code Generated by the Listing in Example 2­1 Line Numbers Object Code Section 20 21 21 22 22 23 39 200F D003 0001 F280 0001 6000 CCFF .text 6 6 6 29 29 0011 0022 0033 00AA 00BB .data 10 11 No data- 11 words reserved .bss 33 34 No data- 8 words reserved newvars Introduction to Common Object File Format 2-9 How the Linker Handles Sections 2.3 How the Linker Handles Sections The linker has two main functions in regard to sections. First, the linker uses the sections in COFF object files as building blocks; it combines input sections (when more than one file is being linked) to create output sections in an executable COFF output module. Second, the linker chooses memory addresses for the output sections. Two linker directives support these functions: - The MEMORY directive allows you to define the memory map of a target system. You can name portions of memory and specify their starting addresses and their lengths. The SECTIONS directive tells the linker how to combine input sections and where to place the output sections in memory. It is not always necessary to use linker directives. If you don't use them, the linker uses the target processor's default allocation algorithm described in subsection 2.3.1. When you do use linker directives, you must specify them in a linker command file. Refer to the following sections for more information about linker command files and linker directives: Section Page 8.4 Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16 8.6 The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21 8.7 The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24 8.11 Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45 Note that the linker refers to program memory as PAGE 0 and to data memory as PAGE 1; these pages are separate from and should not be confused with the data page memory format of the TMS320C1x/C2x/C2xx/C5x devices. Note: Examples in This Section Are for the TMS320C25 TMS320C25 Section allocation is based on the configuration of target memory. The examples in this section illustrate this concept using the TMS320C25 TMS320C25 as the target processor. Each processor has its own programmable memory configuration. 2-10 How the Linker Handles Sections 2.3.1 Default Memory Allocation You can link files without specifying a MEMORY or SECTIONS directive. The linker uses a default model to combine sections (if necessary) and allocate them into memory. When using the default model, the linker: 1) Reads the object file to determine the correct target processor. 2) Assuming the target processor is the TMS320C25 TMS320C25, the following memory locations are available: - Program memory External locations 1000h­0FEFFh Data memory On-chip locations 300h­3FFh (on-chip block B1) External locations 400h­0FFFFh 3) Allocates .text into program memory, beginning at address 1000h. 4) Allocates .data into program memory, immediately following .text. 5) Allocates any initialized named sections into program memory, immediately following .data. Named sections are allocated in the order that the linker encounters them in the input files. 6) Allocates .bss into data memory, beginning at address 300h. 7) Allocates any uninitialized named sections into data memory, immediately following .bss. Named sections are allocated in the order that the linker encounters them in the input files. Figure 2­3 shows how a single file would be allocated into memory using default allocation for the TMS320C25 TMS320C25. Note that the linker does not actually place object code into memory; it assigns addresses to sections so that a loader can place the code in memory. For information about the default allocation for the TMS320C1x, TMS320C2x, TMS320C2xx, and TMS320C5x, refer to Section 8.11, page 8-45. Introduction to Common Object File Format 2-11 How the Linker Handles Sections Figure 2­3. Default Allocation for the Object Code in Figure 2­2 ÉÉÉÉÉ ÉÉÉÉÉ 00000h unconfigured 01000h .text (7 words) Object Code .text 200F D003 0001 F280 0001 6000 CCFF Data Memory 00000h ÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉ Program Memory unconfigured 00300h .bss (11 words) .data 01007h .data (5 words) 0100Ch 0011 0022 0033 00AA 00BB 0030Bh newvars (8 words) .bss No data- 11 words reserved unused 00313h newvars No data- 8 words reserved unused ÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉ ÉÉÉÉÉ 0FEFFh unconfigured 0FFFFh 0FFFFh As Figure 2­3 shows, the linker: 1) Allocates the .text section first, beginning at address 1000h in program memory. The .text section contains 7 words of object code. 2) Allocates the .data section next, beginning at address 1007h in program memory The .data section contains 5 words of object code. 3) Allocates the .bss section, beginning at address 300h in data memory. The .bss section reserves 11 words in memory. 4) Allocates the uninitialized named section newvars at address 30Bh in data memory. The newvars section reserves 8 words in memory. Note that the space in address range 0100Ch­0FFFFh in program memory and 0313h­0FFFFh in data memory is not used. 2-12 How the Linker Handles Sections Figure 2­4 shows a simpl