C0283QGLD-T S6E63D6 DB17-0 CA210

Document No.: Preliminary Product Specification Module name: C0283QGLD-T Issue date: 2007/12/18 Version: 1.7 Customer Approved by

C0283QGLD-T C0283QGLD-T Document No.: Preliminary Product Specification Module name: C0283QGLD-T C0283QGLD-T Issue date: 2007/12/18 Version: 1.7 Customer Approved by Customer Approved by CMEL PD Division ENG Division QA Dept Note: 1. The information contained herein may be change without prior notice. It is therefore advisable to contact Chi MEI ELCorp before designed your product based on this specification. 1 C0283QGLD-T C0283QGLD-T Document No.: Reversion History Version Date Page Description Ver.1.0 Ver.1.1 Ver.1.2 2007/11/5 2007/11/5 2007/11/7 Ver.1.3 Ver.1.4 Ver.1.5 Ver.1.6 2007/11/9 2007/11/22 2007/11/28 2007/12/06 Ver1.7 2007/12/18 All 13 9 11 13 17~19 20 22 14 14 21 14 Preliminary specification was first issued CIE(Red_y) 0.34->0.33, CIE(Red_y) 0.28->0.29 Add Image Data format (CPU Interface) Add RS expression Add Image Data format (RGB Interface) Add Capacitance Information Mod External Drawing Mod Packing Drawing Mod Electro-Optical Characteristic, Vgh/Vgl Mod Electro-Optical Characteristic Mod Reliability Test Mod Electro-Optical Characteristic, Vgh/Vgl 2 C0283QGLD-T C0283QGLD-T Document No.: 1. Purpose: This documentation defines general product specification for OLED module supplied by CMEL. The information described in this technical specification is tentative. Please Contact CMEL's representative while your product is modified. 2. General Description: Driving Mode: Active Matrix. Color Mode: Full Color (262K color) Driver IC: S6E63D6 S6E63D6, COG Assembly Interface: 1. MPU i80-system 18-/16-/9-/8-bit bus interface 2. MPU i68-system 18-/16-/9-/8-bit bus interface 3. Serial data transfer interface 4. RGB 18-/16-/6-bit bus interface (DOTCLK, VSYNC, HSYNC, DE, DB17-0 DB17-0) Application: Cell phone etc. RoHS Compatible 3. Mechanical Data: No. Items Specification Unit 1 Diagonal Size 2.83" Inch 2 Resolution 3 Pixel Pitch 240 x RGB x 320 0.060 × 0.180 mm 4 Active Area 43.2 x 57.6 mm 5 Outline Area 49.1 x 67.3 mm 6 Thickness 1.75 (Typ) ; 1.95 (Max) mm 7 Weight 16 g 3 C0283QGLD-T C0283QGLD-T Document No.: 4. Absolute Maximum ratings: (VSS=0V) Item Symbol Unit Value Power supply voltage 1 VDD3 V -0.3 ~ + 5.0 Power supply voltage 2 VCI V -0.3 ~ + 5.0 Input Voltage range Vin V -0.3 ~ VDD+0.5 Operating temperature Topr C -20 ~ + 60 Storage temperature Tstg C Note -40~ + 85 Notes: (1) Absolute maximum rating is the limit value. When the IC is exposed operation environment beyond this range, the IC do not assure operations and may be damaged permanently, not be able to be recovered. (2) Absolute maximum rating is guaranteed only when our company's package used. 4 C0283QGLD-T C0283QGLD-T Document No.: 5. Electrical Characteristic: 5.1 DC Characteristic 5 C0283QGLD-T C0283QGLD-T Document No.: 6 C0283QGLD-T C0283QGLD-T Document No.: 5.2 AC Characteristic 5.2.1 CPU interface M68 7 C0283QGLD-T C0283QGLD-T Document No.: 5.2.2 CPU interface M80 8 C0283QGLD-T C0283QGLD-T Document No.: Image Data format for 18bit CPU interface (262k color) Image Data format for 16bit CPU interface (65k color) Image Data format for 9bit CPU interface (262k color) Image Data format for 8bit CPU interface (65K color) Case 1: Case 2: Image Data format for 8bit CPU interface (262K color) 9 C0283QGLD-T C0283QGLD-T Document No.: 5.2.3 SPI Interface 10 C0283QGLD-T C0283QGLD-T Document No.: (Note) RS="0" : Index data RS="1" : Instruction data 11 C0283QGLD-T C0283QGLD-T Document No.: 5.2.4 RGB Interface 12 C0283QGLD-T C0283QGLD-T Document No.: Image Data format for 18bit RGB interface (262k color) Image Data format for 16bit RGB interface (65k color) Image Data format for 6bit RGB interface (262k color) 13 C0283QGLD-T C0283QGLD-T Document No.: 6. Electro-Optical Characteristic: Items Symbol Min Typ. Max Unit Remark 2 Operating Luminance L 170 200 230 Cd/m (1)(5) Power Consumption Pon - 350 400 mW 30% pixels on (1) Max. Current Icc - - 162 mA (1) Response Time Tres - - 50 us (2) CIEx (White) Wx 0.26 0.31 0.36 - (5) CIEy(White) Wy 0.28 0.33 0.38 - (5) CIEx(Red) Rx 0.62 0.66 0.70 - (5) CIEy(Red) Ry 0.29 0.33 0.37 - (5) CIEx(Green) Gx 0.25 0.29 0.33 - (5) CIEy(Green) Gy 0.62 0.66 0.70 - (5) CIEx(Blue) Bx 0.11 0.15 0.19 - (5) CIEy(Blue) By 0.12 0.16 0.20 - (5) Viewing Angle VA 160 170 - Degree (3) Contrast CR 5000:1 10000:1 - LTop 20000 - - Operation Lifetime Note: Measuring surrounding: Dark room Surrounding temperature: 25oC IOVCC = 1.65V ~ 3.3V 1. Test condition: a. AR_VDD= 4.6V+/- 0.03V, AR_VSS= -4.4V+/- 0.03V b. IC Initial Register Setting: R03h: 0x0030 R10h: 0x0000 R18h: 0x0028 RF8h: 0x000F RF9h: 0x000F R05h: 0x0001 Gamma Register Setting: R70h: 0x2580 R71h: 0x2780 R72h: 0x3380 R73h: 0x1D18 R74h: 0x1F11 R75h: 0x2419 R76h: 0x1A14 R77h: 0x211A R78h: 0x2013 // 16bit mode // IC standby off // Frame Rate = 80 Hz // VGH=+5V // VGL=-5V // display on 14 (4) Hrs (1)(6) C0283QGLD-T C0283QGLD-T Document No.: 2.Response Time test condition Tf Tr 100% 90% 10% Time 3.Viewing angle test condition: Vss(GND) Viewing Angle= CR>10 =270° 4.Contrast Luminance with all pixels white CR = Luminance with all pixels black 5.Optical tester: CA210 CA210 6. Brightness of 30% power consumption. Operating Life Time is defined when the luminance has decayed to less than 50% of the initial measured luminance before life test. 15 C0283QGLD-T C0283QGLD-T Document No.: 7. System Diagram: 16 C0283QGLD-T C0283QGLD-T Document No.: 8. Pin Assignment: PIN 1 Symbol I/O Description AR_VDD I Positive voltage for OLED(+4.6V) 2 AR_VSS I Nagative voltage for OLED(-4.4V) 3 VCI I Power supply for analog circuit(2.5v~3.3v) 4 VCI1 O A reference voltage for 1st booster(connect a 1u/10v capacitance to gnd) 5 GND I Ground 6 C12M I 7 C12P I 8 C11M I 9 C11P I 10 VLOUT1 O 11 C31P I 12 C31M I 13 C32P I 14 C32M I 15 VLOUT3 O 3rd booster output pin. (1u/16V) 16 VLOUT2 O 2nd booster output pin. (1u/16V) 17 C21P I 18 C21M I 19 VGS I A reference level for the grayscale voltage generation circuit. (connect to gnd) 20 IOVCC I I/O power supply 21 SPB I 22 ID_MIB I 23 DB17 I/O 24 DB16 I/O 25 DB15 I/O 26 DB14 I/O 27 DB13 28 DB12 I/O 18-bit interface : DB 17-0 18-bit interface : DB 17-0 I/O 29 DB11 I/O 30 DB10 31 DB9 I/O Fix unused pin to the VSS level I/O 32 DB8 I/O 33 DB7 I/O External capacitance connect pin between C12M and C12P (1u/10V) External capacitance connect pin between C11M and C11P 1st booster output pin. (1u/10V) External capacitance connect pin between C31M and C31P (1u/10V) External capacitance connect pin between C32M and C32P (1u/10V) External capacitance connect pin between C21M and C21P. (1u/10V) Select the CPU interface mode. (0=parallel interface 1=serial interface) Select the CPU type (0=intel 80x-system 1=motorola 68x-system) BI-directional data bus. When CPU I/F, 18-bit interface : DB 17-0 16-bit interface : DB 17-10 , DB 8-1 9-bit interface : DB 8-0 8-bit interface : DB 8-1 When RGB I/F 16-bit interface : DB 17-10, DB 8-1 6-bit interface : DB 8-3 17 Remarks C0283QGLD-T C0283QGLD-T Document No.: 34 DB6 I/O 35 DB5 I/O 36 DB4 I/O 37 DB3 I/O 38 DB2 I/O 39 DB1 I/O 40 DB0 I/O 41 VSYNC I 42 HSYNC I 43 DOTCLK I Frame-synchronizing signal. (VSPL=0 Low active, VSPL=1 High active) FIX this pin at VSS level if the pin is not used Line-synchronizing signal. (HSPL=0 Low active, HSPL=1 High active) FIX this pin at VSS level if the pin is not used Input pin for clock signal of external interface : dot clock. DPL=0 Display data is fetched at DOTCLK's rising edge DPL=1 Display data is fetched at DOTCLK's falling edge Fix this pin at VSS level if the pin is not used. Data enablesignal pin for RGB interface. EPL 0 0 Valid Updated 1 Invalid Held 0 Invalid Held 1 I GRAM address 1 ENABLE GRAM write 0 44 ENABLE 1 Valid Updated For a serial peripheral interface(SPI), input data is fetched at the rising edge of the SCL signal, Fix SDI pin at VSS level if the pin is not used. For a serial peripheral interface (SPI), serves as the serial data olutput pin(SDO), Successive bits are output at the falling edge of the SCL signal. Chip select signal input pin. 0= driver IC is selected and can be accessed. 1= driver IC is not selected and cannot be accessed. Pin function CPU type Pin description Read/Write operation selection RW 68-system pin 0=write 1=read Write strobe signal.(Input pin) WRB 80_system Data is fetched at the rising edge. SCL SPI The synchronous clock signal Register select pin. 0=Index/status, 1=instruction parameter, GRAM data Must be fixed at VDD3 level when not used. Pin Function CPU type Pin description E 68-system Read/Writeoperation enable pin Read strobe signal. RDB 80_system Read out data at the low level When SPI mode is selected , fix this pin at VDD3 level 45 SDI I 46 SDO I 47 CSB I 448 RW_WRB I 49 RS I 50 E_RDB I 51 RESETB I Reset pin initializes the IC when low. Should be reset after power-on. 52 MVDD O Internal power for RAM. Connect a capacitance(1u/10v) to gnd. 53 VREG1OUT O A reference level for the grayscale voltage. Connect a capacitance(1u/10v) to gnd. 54 I Power supply for analog circuit(2.5v~3.3v) VCI 18 C0283QGLD-T C0283QGLD-T Document No.: The positive voltage used in the gate driver. Connect a capacitance(1u/10v) to gnd. The negative voltage used in the gate driver. Connect a capacitance(1u/10v) to gnd. 55 VGH O 56 VGL O 57 GND 58 X- For touch screen 59 Y- For touch screen 60 X+ For touch screen 61 Y+ For touch screen Ground 19 20 14 AR_VSS 15 VCI 16 VCI1 17 GND 18 C12M 19 C12P 20 C11M 21 C11P 22 VLOUT1 23 C31P 24 25 C31M C32P 26 AR_VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 No De f in e No IOVCC SPB ID_MIB DB17 DB16 DB15 DB14 VGS C32M VLOUT3 VLOUT2 C21P C21M De f in e 27 28 29 30 31 32 33 34 35 36 37 38 39 No DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 De f in e 40 41 42 43 44 45 46 47 48 49 50 51 52 No DB0 VSYNC HSYNC DOTCLK ENABLE SDI SDO CSB RW_WRB RS E_RDB RESETB MVDD De f in e 53 54 55 56 57 58 59 60 61 No De f in e VGH VGL GND XYX+ Y+ VREG1OUT VCI C0283QGLD-T C0283QGLD-T Document No.: 9. External Dimension: C0283QGLD-T C0283QGLD-T Document No.: 10. Reliability Test: No. Items Specification 1 High Temp. Storage 85°C, 240hrs 2 Low Temp. Storage -40°C, 240hrs 3 High Temp. Operation 60°C, 240hrs 4 Low Temp. Operation -20°C, 240hrs 5 High Temp / Humidity Storage 85°C, 85%RH, 240hrs 6 High Temp / Humidity Operation 60°C, 90%RH, 240hrs Thermal shock -40°C ~85°C (-40°C /30min; transit/3min; 85°C /30min; transit /3min) 1cycle: 66min, 100 cycles Vibration Frequency: 5~50HZ, 0.5G Scan rate : 1 oct/min Time : 2 hrs/axis Test axis : X, Y, Z 7 8 9 Drop 10 ESD Height: 76cm Sequence : 1 angle3 edges and 6 faces Cycles: 1 Air discharge model, ±8kV, 10 times Evaluation Criteria No damage to glass or encapsulation No drastic change to display Defects / Mura follow product specification Luminance: Within +/-50% of initial value Current consumption: within +/-50% of initial value 21 C0283QGLD-T C0283QGLD-T Document No.: 11. Package: