NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Issued March 1988 008-509 Data Pack J Data Sheet Bucket brigade delay lines RS stock numbers 631-288 to 301 The RS bucket brigade delay line system comprises two delay lines and a , stock no. 631-288) The MN3004 MN3004 is a 512 stage, low noise, bucket brigade delay line providing a signal , MN3011 MN3011 is a 3328 stage bucket brigade delay line with 6 tap outputs. A signal of different delay is , clock generator that is ideally suited for driving the MN3004 MN3004 or MN3011 MN3011 bucket brigade delay lines. ... | Original |
12 pages, |
MN3101 MN3004 MN3011 Bucket Brigade datasheet abstract |
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| Abstract: Issued March 1988 8509 m Data Library Bucket brigade delay lines Stock numbers 631-288 to 301 The RS bucket brigade delay line system comprises two delay lines and a matching clock driver. , right (c) 8509 MN3004 MN3004 (631-288) The MN3004 MN3004 is a 512 stage, low noise, bucket brigade delay line , bucket brigade delay line with 6 tap outputs. A signal of different delay is available from each output , generator that is ideally suited for driving the MN3004 MN3004 or MN3011 MN3011 bucket brigade delay lines. Oscillation ... | OCR Scan |
12 pages, |
reverb BBD delay line mn3101 cross N3004 MN3101 MN3004 mn 3101 MN3011 MN3005 MN3007 Bucket Brigade datasheet abstract |
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| Abstract: Issued March 1988 J8509 J8509 Bucket brigade delay lines Stock numbers 631-288 to 301 The RS bucket brigade delay line system comprises two delay lines and a matching clock driver. Introduction to the , (631-288) Features The MN3004 MN3004 is a 512 stage, low noise, bucket brigade l Variable delay of audio signal , (631-294) Features The MN3011 MN3011 is a 3328 stage bucket brigade delay line l 3328-stage audio signal delay , bucket brigade delay lines. Oscillation frequency is adjusted by the addition of an external RC circuit. ... | Original |
12 pages, |
J8509 J8509 abstract |
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| Abstract: Active Feedback Circuit Eliminates CCD Driver Delay Mismatch by Mike Wong Senior Design Engineer Intersil Corporation In a charge-coupled device, packets of charges are shifted across the array. The transistor array (a.k.a. bucket brigade shift register) is driven by a dual phase clock signal. Dual phase clock signals consist of two synchronized clock signals that are 180 degrees out of phase. High peak output current CCD drivers can be applied to buffer the logic level clock signals and turn them into ... | Original |
3 pages, |
EL7212 EL5220 CCD output buffer Bucket Brigade EL7212 abstract |
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| Abstract: Signetics Integrated Circuits - General TDA1022 TDA1022 - Bucket Brigade Delay Line GENERAL DESCRIPTION The TDA1022 TDA1022 is a MOS monolithic integrated circuit, generally intended to delay analogue signals (e.g. delay time = 512/2 fy). It can be used with clock frequencies in the range 5 kHz to 500 kHz. The device contains 512 stages, so the input signal can be delayed from 51,2 ms to 0,512 ms. Applications in which the device can be used: - variation of fixed delays of analogue signals, vox control, equalizing speech ... | OCR Scan |
7 pages, |
Bucket Brigade A1022 TDA1022 TDA1022 abstract |
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| Abstract: to fabricate a chain of MOS transistors and storage capacitors into a bucket brigade charge-transfer , portion of 0-|A> data is input to section A, to be held and propagated down the bucket brigade at the ... | OCR Scan |
6 pages, |
EG&G FREQUENCY PRODUCTS reverberation amplifier SC1024 SAD 1024 reticon analog delay line SC-1024A Bucket Brigade RETICON BBD SAD 1024 SAD 512 8 pin sad 1024a SAD-1024 SAD1024 equivalent SAD-1024 abstract |
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| Abstract: TDA1022 TDA1022 BUCKET BRIGADE DELAY LINE FOR ANALOGUE SIGNALS The TDA1022 TDA1022 is a MOS monolithic integrated circuit, generally intended to delay analogue signals (e.g. delay time = 512/2 fy). It can be used with clock frequencies in the range 5 kHz to 500 kHz. The device contains 312 stages, so the input signal can he delayed from 51,2 ms to 0, 512 ms. Applications in which the device can be used: - variation of fixed delays of analogue signals, vox control, equalizing speech delay in public address systems ... | OCR Scan |
10 pages, |
HEF4011 Bucket Brigade HEF4013 TDA1022 TDA1022 abstract |
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| Abstract: TDA1022 TDA1022 BUCKET BRIGADE DELAY LINE FOR ANALOGUE SIGNALS The TDA1022 TDA1022 isa.MOS monolithic integrated circuit, generally intended to delay analogue signals (e.g. delay time = 512/2 fy). It can be used with clock frequencies in the range 5 kHz to 500 kHz. The device contains 512 stages, so the input signal caii be delayed from 51,2 ms to 0, 512 ms. Applications in which the device can be used: - variation of fixed delays of analogue signals, vox control, equalizing speech delay in public address systems ... | OCR Scan |
10 pages, |
Bucket Brigade TDA1022 TDA1022 abstract |
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| Abstract: 2H1B 1 1 1 U4 U5 U7 MN3005 MN3005 MN3101 MN3101 4007A 72-3038 72-3040 72-0032 Bucket Brigade ... | Original |
3 pages, |
1 watt diode 100K402141 501523 DIODE 1N4001 SMT J201 J201-A MN-3005 R27 transistor R52 transistor mn3005 transistor H1A transistor a 501523 1N4148R J201A 047MD7 HDR321101 047MD7 abstract |
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| Abstract: Digital control 4428 IC 2983 Bucket brigade delay lines 8509 Clock IC 4298 Compander 4585 , Bucket brigade delay lines Real time clock IC Compander IC RS571 RS571 C-MOS 4 decade counter driver IC 7217 ... | Original |
22 pages, |
fluke DSP-100 PIC based fire alarm system intel P80C31 optoisolator high voltage N80C196KC16 FR-U120 FR-U120S SL443A TDA2086 smp260wtc ZN416E 1NA114AP altera EPM7032LC44-15 manual datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| B/S Bits Per Second BA-II Business Analyst Calculator (LCD) BAA Business Area Analysis BABS Blind Approach Beacon System BAR PII Bar (chip) Profit In Inventory BASIC Basic Avionics Subsystem Integration Concept " Beginners All-purpose Symbolic Instruction Code BB Beginning Balance " Blue Book BBD Bucket Brigade Device BBF Balance Brought Forward BBRT Broadband Remote Terminal BBS Bought-In-Bulk Stock BC www.datasheetarchive.com/files/texas-instruments/sc/docs/military/milprdov/b.txt |
Texas Instruments | 07/11/1996 | 5.07 Kb | TXT | b.txt |
| std_logic); end component; - - 'Bucket Brigade' FIFO - component bbfifo_16x8 Port www.datasheetarchive.com/download/50185293-995924ZC/xapp213.zip (uart_tx.vhd) |
Xilinx | 17/12/2002 | 236.83 Kb | ZIP | xapp213.zip |
| ; - - 'Bucket Brigade' FIFO - component bbfifo_16x8 Port ( data_in : in std_logic_vector(7 www.datasheetarchive.com/download/50185293-995924ZC/xapp213.zip (uart_rx.vhd) |
Xilinx | 17/12/2002 | 236.83 Kb | ZIP | xapp213.zip |
| - 'Bucket Brigade' FIFO - 16 deep - 8-bit data - - Version : 1.00 - Version Date : 14th October 2002 - - Start of design entry : 14th October 2002 - - Ken Chapman - Xilinx Ltd - Benchmark House - 203 Brooklands Road - Weybridge - Surrey KT13 ORH - United Kingdom - - chapman@xilinx.com - - - - NOTICE: - - Copyright Xilinx, Inc. 2002. This code may be contain portions patented by other - third parites. By providing this core as one possible implementation of a standard, - Xilinx is www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (bbfifo_16x8.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| _logic_vector(17 downto 0); clk : in std_logic); end component; - - 'Bucket Brigade www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (byte_reader.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| - 'Bucket Brigade' FIFO - 16 deep - 8-bit data - - Version : 1.00 - Version Date : 14th October 2002 - - Start of design entry : 14th October 2002 - - Ken Chapman - Xilinx Ltd - Benchmark House - 203 Brooklands Road - Weybridge - Surrey KT13 ORH - United Kingdom - - chapman@xilinx.com - - - - NOTICE: - - Copyright Xilinx, Inc. 2002. This code may be contain portions patented by other - third parites. By providing this core as one possible implementation of a standard, - Xilinx is www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (bbfifo_16x8.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| _logic_vector(17 downto 0); clk : in std_logic); end component; - - 'Bucket Brigade www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (byte_reader.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| - 'Bucket Brigade' FIFO - 16 deep - 8-bit data - - Version : 1.00 - Version Date : 14th October 2002 - - Start of design entry : 14th October 2002 - - Ken Chapman - Xilinx Ltd - Benchmark House - 203 Brooklands Road - Weybridge - Surrey KT13 ORH - United Kingdom - - chapman@xilinx.com - - - - NOTICE: - - Copyright Xilinx, Inc. 2002. This code may be contain portions patented by other - third parites. By providing this core as one possible implementation of a standard, - Xilinx is www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (bbfifo_16x8.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| _logic_vector(17 downto 0); clk : in std_logic); end component; - - 'Bucket Brigade www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (byte_reader.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |
| - 'Bucket Brigade' FIFO - 16 deep - 8-bit data - - Version : 1.00 - Version Date : 14th October 2002 - - Start of design entry : 14th October 2002 - - Ken Chapman - Xilinx Ltd - Benchmark House - 203 Brooklands Road - Weybridge - Surrey KT13 ORH - United Kingdom - - chapman@xilinx.com - - - - NOTICE: - - Copyright Xilinx, Inc. 2002. This code may be contain portions patented by other - third parites. By providing this core as one possible implementation of a standard, - Xilinx is www.datasheetarchive.com/download/89039033-996036ZC/xapp694.zip (bbfifo_16x8.vhd) |
Xilinx | 26/05/2004 | 490.77 Kb | ZIP | xapp694.zip |