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Part : BU61800GWL-E2 Supplier : ROHM Manufacturer : Chip1Stop Stock : 100 Best Price : $5.77 Price Each : $7.09
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Bu-61864

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Bus Command/Byte Enable PAR C/BE[3]# - C/BE[0]# 33 MHz, 32-Bit PCI Target Interface BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG FRAME#, IRDY#, IDSEL, RST# BU-61864 Enhanced Mini-ACE A15-A0 D15-D0 Control BU-61864 Enhanced Mini-ACE 1553 BUS B RTAD4-0, RTADP, EXT_TRIG , , EXT_TRIG/SSFLAG PCI Clock CLK PCI Interrupt Request INTA# PCI Configuration Registers BU-61864 Data Device
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BU-65565 HUMISEAL 1A33 BU-65565M2 Enhanced Mini-ACE MIL-STD-1553 connector STANAG 3838 MIL-STD-1553 VITA-20 BU-65565MX BU-65565CX BU-65565FX
Abstract: ! BU-61864 · +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty , Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864 · Idle · 25% Transmitter , should be located as close as possible to Pins 20 and 72, and a 0.1 uF at pin 37. For BU-61864 and BU , interface, memory management logic; and a minimum of 4K words of RAM. In addition, the BU-61864 and BU Data Device
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bu 61865 WC-150 BU-61865 WC150 BU-61743 61864 BU-6174X/6184X/6186X MIL-STD-1553A/B BU-61684 BU-6174 BU-6184 BU-6186
Abstract: ! BU-61864 · +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty , Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864 · Idle · 25% Transmitter , should be located as close as possible to Pins 20 and 72, and a 0.1 uF at pin 37. For BU-61864 and BU , interface, memory management logic; and a minimum of 4K words of RAM. In addition, the BU-61864 and BU Data Device
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61865 MIL-STD-883 1-800-DDC-5757 A5976
Abstract: Duty Cycle ! BU-61864XX-XX0 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · 3.3V Logic ! BU-61864X3-XX2 +5V (RAM, Ch. A, Ch. B) · , -61865X3-XX2 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864XX-XX0 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864X3-XX2 , minimum of 4K words of RAM. In addition, the BU-61864 and BU-61865 BC/RT/MT terminals include 64K words of Data Device
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Pulse Transformer - PPT BU 61843 BU-61843 bu-61845xx-xx0 BU61843 MIL-STD-1553 TRANSFORMERS BTTC U-61684 B-05/00-500
Abstract: www.ddc-web.com BU-61864 BU-61864 32-bit, 33MHz PCIbus PCI Bridge 2 1 to 4 MIL-STD-1553 Buses BU-61864 BU-61864 BU-65569T G-04/06-0 FIGURE 1. BU-65569TX BLOCK DIAGRAM TABLE 1. BU , design of the BU65569TX leverages the BU-61864 Enhanced Mini-ACE. Each channel may be independently , incorporates a PCI bridge, along with between one and four of DDC's BU-61864 Enhanced Mini-ACE hybrids. Each , MiniACE (Plus) terminals. The BU-61864 Enhanced Mini-ACE provides complete multiprotocol support of Data Device
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BU-65569T2 BU-65569 BU-65569T1 BU-65569T4 CH3R 64K-W BU-65569T/BX BU65569BX IPC-A-610
Abstract: Command/Byte Enable C/BE[3]# - C/BE[0]# BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG 66 MHz, 32-Bit PCI Target Interface 1553 BUS B BU-61864 Enhanced Mini-ACE RTAD4 , Bus A15-A0 PCI Control D15-D0 Control CLK BU-61864 Enhanced Mini-ACE 1553 BUS C RTAD4-0, RTADP, EXT_TRIG/SSFLAG PCI Clock 1553 BUS D BU-61864 Enhanced Mini-ACE RTAD4-0, RTADP, EXT_TRIG Data Device
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BU-69090 MT 6605 BU694 cpu mvme 2700 BU-65566 MIL-STD1553 VITA-20-2001 95/98/2000/XP D-04/05-0
Abstract: Command/Byte Enable C/BE[3]# - C/BE[0]# BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG 66 MHz, 32-Bit PCI Target Interface 1553 BUS B BU-61864 Enhanced Mini-ACE RTAD4 , Bus A15-A0 PCI Control D15-D0 Control CLK BU-61864 Enhanced Mini-ACE 1553 BUS C RTAD4-0, RTADP, EXT_TRIG/SSFLAG PCI Clock 1553 BUS D BU-61864 Enhanced Mini-ACE RTAD4-0, RTADP, EXT_TRIG Data Device
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B-07/04-0
Abstract: Target Interface BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG FRAME#, IRDY#, IDSEL, RST# BU-61864 Enhanced Mini-ACE A15-A0 D15-D0 Control BU-61864 Enhanced Mini-ACE , Interrupt Request INTA# PCI Configuration Registers BU-61864 Enhanced Mini-ACE 1553 BUS D RTAD4 Data Device
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65566 RT Linux BU-65566GX BU-65566MX F-04/06-0
Abstract: Command/Byte Enable C/BE[3]# - C/BE[0]# BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG 66 MHz, 32-Bit PCI Target Interface 1553 BUS B BU-61864 Enhanced Mini-ACE RTAD4 , Bus A15-A0 PCI Control D15-D0 Control CLK BU-61864 Enhanced Mini-ACE 1553 BUS C RTAD4-0, RTADP, EXT_TRIG/SSFLAG PCI Clock 1553 BUS D BU-61864 Enhanced Mini-ACE RTAD4-0, RTADP, EXT_TRIG Data Device
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motorola mvme 2700 BU-69090S BU-69090S5 Enhanced Mini-ACE Users Guide BU-65566M C-02/05-0
Abstract: BU-61864 Enhanced Mini-ACE 1553 BUS A RTAD4-0, RTADP, EXT_TRIG/SSFLAG FRAME#, IRDY#, IDSEL, RST# BU-61864 Enhanced Mini-ACE A15-A0 D15-D0 Control BU-61864 Enhanced Mini-ACE 1553 BUS B , Request INTA# PCI Configuration Registers BU-61864 Enhanced Mini-ACE 1553 BUS D RTAD4 , BU-65565 leverages the BU-61864 Enhanced Mini-ACE. Each channel may be independently programmed for Data Device
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BU-65553 1A33 BU-65565BX C-11/05-0
Abstract: % Duty Transmitter Cycle 50% Duty Transmitter Cycle 75% Duty Transmitter Cycle BU-61864X3/4-XX0 0 , /Monitor 25% Duty Transmitter Cycle 50% Duty Transmitter Cycle 75% Duty Transmitter Cycle BU-61864X3/4 , -61743 and BU-61843) 4 = 3.3 and 5 Volt (Applicaable only for BU-61864) 5 = 5 Volt Product Type: BU-6174 = RT Data Device
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bu 81x STANAG-3838
Abstract: respective owners. Data Device Corporation www.ddc-web.com BU-61864 BU-61864 32-bit, 33MHz PCIbus PCI Bridge 2 BU-61864 1 to 4 MIL-STD-1553 Dual Redundant Buses BU-61864 BU-65569i D , four dual redundant 1553 channels. The design of the BU-65569iX leverages the BU-61864 Enhanced , incorporates a PCI bridge, along with between one and four of DDC's BU-61864 Enhanced Mini-ACE hybrids. Each , Mini-ACE (Plus) terminals. The BU-61864 Enhanced Mini-ACE provides complete multiprotocol support of Data Device
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D-06/05-0
Abstract: www.ddc-web.com BU-61864 32-bit, 33MHz PCIbus BU-61864 PCI Bridge BU-61864 1 to 4 MIL-STD-1553 Dual Redundant Buses 2 BU-65569i F-011/05-0 BU-61864 FIGURE 1. BU-65569iX BLOCK DIAGRAM , the BU-65569iX leverages the BU-61864 Enhanced Mini-ACE. Each channel may be independently programmed , DDC's BU-61864 Enhanced Mini-ACE hybrids. Each Enhanced Mini-ACE comprises a complete, independent , compatibility with DDC's older generation ACE and Mini-ACE (Plus) terminals. The BU-61864 Enhanced Mini-ACE Data Device
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Image CIS MIL-STD-1553 ACE manual MILSTD-1553 F-11/05-0
Abstract: ! BU-61864XX-XX0 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · 3.3V Logic ! BU-61864X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25 , -61865X3-XX2 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864XX-XX0 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle ! BU-61864X3-XX2 , logic; and a minimum of 4K words of RAM. In addition, the BU-61864 and BU-61865 BC/RT/MT terminals Data Device
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6186X BU-61840 P372 C-10/01-250
Abstract: Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864XX-XX0 +5V (RAM, Ch. A , Cycle · 3.3V Logic · BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle , % Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864XX-XX0 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864/0X3-XX2 · Idle · 25 , 0.1 uF to input signal "+5V/+3.3V Logic". For the BU61864 and BU-61865, and BU-61860 versions, there Data Device
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BU-61845 BU-61745 for 64K RAM MIL-STD-1553 terminals BU-61740 BU-6174X D-883 L-03/04-0
Abstract: Duty Cycle â'¢ 50% Transmitter Duty Cycle â'¢ 100% Transmitter Duty Cycle â'¢ BU-61864XX-XX0 +5V , % Transmitter Duty Cycle â'¢ 3.3V Logic â'¢ BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) â'¢ Idle â'¢ 25 , '¢ 100% Transmitter Duty Cycle â'¢ BU-61864XX-XX0 â'¢ Idle â'¢ 25% Transmitter Duty Cycle â'¢ 50% Transmitter Duty Cycle â'¢ 100% Transmitter Duty Cycle â'¢ BU-61864/0X3-XX2 â'¢ Idle â'¢ 25% Transmitter , BU61864 and BU-61865, and BU-61860 versions, there should also be a 0.1 ÂuF capacitor for the input Data Device
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MILSTD-883 U-3/08-0
Abstract: Buffering Selective Message Monitor Supports PCI Interrupts VxWorks Software Driver BU-61864 · · · · BU-61864 32-bit, 33 MHz PCIbus PCI Bridge BU-61864 1 to 4 MIL-STD-1553 Buses BU-61864 , the BU-65565TX leverages the BU-61864 Enhanced Mini-ACE. Each channel may be independently programmed Data Device
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BU-65565TX-300 65565T
Abstract: VxWorks Software Driver · · · · BU-61864 BU-61864 32-bit, 33 MHz PCIbus PCI Bridge BU-61864 1 to 4 MIL-STD-1553 Buses BU-61864 Figure 1. Block Diagram 1 PARAMETER Table , a convection-cooled or conduction-cooled card. The design of the BU-65565 leverages the BU-61864 Data Device
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BU-65565CX-300 BU-65565MX-900
Abstract: % Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864XX-XX0 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · 3.3V Logic · BU-61864/0X3 , 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864XX-XX0 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864/0X3-XX2 · Idle · 25 , words of RAM. In addition, the BU-61864 and BU-61865 BC/RT/MT terminals include 64K words of internal Data Device
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F-10/02-300
Abstract: % Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864XX-XX0 +5V (RAM , Duty Cycle · 3.3V Logic · BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle , · BU-61864XX-XX0 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864/0X3-XX2 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100 , ". For the BU61864 and BU-61865, and BU-61860 versions, there should also be a 0.1 uF capacitor for the Data Device
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H-06/03-0
Abstract: Duty Cycle · 3.3V Logic · BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle , Duty Cycle · BU-61864/0X3-XX2 · Idle · 25% Transmitter Duty Cycle · 50% Transmitter Duty Cycle · 100 , ". For the BU61864 and BU-61865, and BU-61860 versions, there should also be a 0.1 uF capacitor for the , words of RAM. In addition, the BU-61864 and BU-61865 BC/RT/MT terminals include 64K words of internal Data Device
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bu61740b BU-61860E3-300 J-07/03-0
Abstract: Duty Cycle · 3.3V Logic · BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25% Transmitter Duty Cycle , Duty Cycle · 50% Transmitter Duty Cycle · 100% Transmitter Duty Cycle · BU-61864/0X3-XX2 · Idle · 25 , ". For the BU61864 and BU-61865, and BU-61860 versions, there should also be a 0.1 uF capacitor for the , words of RAM. In addition, the BU-61864 and BU-61865 BC/RT/MT terminals include 64K words of internal Data Device
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N-03/06-0
Abstract: Cycle · 100% Transmitter Duty Cycle · 3.3V Logic · BU-61864/0X3-XX2 +5V (RAM, Ch. A, Ch. B) · Idle · 25 , Duty Cycle · 100% Transmitter Duty Cycle · BU-61864/0X3-XX2 · Idle · 25% Transmitter Duty Cycle · 50 , "+5V Vcc CH B", and a 0.1 uF to input signal "+5V/+3.3V Logic". For the BU61864 and BU-61865, and BU , , host interface, memory management logic, and either 4K or 64K words of RAM. In addition, the BU-61864 Data Device
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G1-01/02-0
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