BR24C01A-W/AF-W/AFJ-W/AFV-W BR24C02-W/F-W/FJ-W/FV-W BR24C04-W/F-W/FJ-W/FV-WV-W - Datasheet Archive

 

BR24C02-W/F-W/FJ-W/FV-W BR24C04-W/F-W/FJ-W/FV-WV-W Features Pin Configurations · 1k bit serial EEPROM organized as 128

 

BR24C01A-W/AF-W/AFJ-W/AFV-W BR24C01A-W/AF-W/AFJ-W/AFV-W BR24C02-W/F-W/FJ-W/FV-W BR24C02-W/F-W/FJ-W/FV-W BR24C04-W/F-W/FJ-W/FV-WV-W BR24C04-W/F-W/FJ-W/FV-WV-W Features Pin Configurations · 1k bit serial EEPROM organized as 128 × 8bit (BR24C01A BR24C01A) 2k bit serial EEPROM organized as 256 × 8bit (BR24C02 BR24C02) 4k bit serial EEPROM organized as 512 × 8bit (BR24C04 BR24C04) · 2 wire bus serial interface *1 A0 1 7 WP A2 3 6 SCL GND 4 · Wide operating voltage range Read : 2.7~5.5V Write : 2.7~5.5V 8 Vcc A1 2 5 SDA DIP8/SOP8/SOP-J8/SSOP-B8 *1: NC (BR24C04 BR24C04) · Low current consumption Active : 2mA MAX (Vcc=3~5V) Standby : 2µA MAX (Vcc=3~5V) Pin Functions · Clock frequency : 100kHz MAX(3V), 400kHz MAX(5V) Functions · Write cycle time : 10ms MAX (Vcc=3V, 5V) Pin Names · Address auto-increment function during read operation · Automatic erase-before-write function during write operation · Page write function : 8byte (BR24C01A BR24C01A, BR24C02 BR24C02) : 16byte (BR24C04 BR24C04) A0, A1, A2 Slave Address Inputs *1 GND SDA Serial Data Input/Output SCL Serial Data Clock WP Write Protect Vcc · Inadvertent write protection function Inadvertent write protection at low voltage (Vcc Lock-out function) · Schmitt trigger circuit and noise filter are built into SCL and SDA pins · 100,000 write cycle typical Ground Power Supply *1: NC (BR24C04 BR24C04) · 10 years data retention · Operating temperature range : -40~85°C Block Diagram 1~4k bit EEPROM Array *1 A0 A1 7bit:BR24C01A BR24C01A 8bit:BR24C02 BR24C02 9bit:BR24C04 BR24C04 8bit 7bit:BR24C01A BR24C01A 8bit:BR24C02 BR24C02 9bit:BR24C04 BR24C04 Address Decoder Slave Words Address Register SCL SDA A2 START STOP Control Logic High Voltage Generation *1: NC (BR24C04 BR24C04) Data Register WP ACK Voltage Detection Serial 2 Wire (I2C BUS Type) Timing chart Byte write cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 1 W R I T E WORD ADDRESS *2 WA7 *1 0 A2 A1 A0 S T O P DATA D7 WA0 R A / C W K D0 A C K A C K Page write cycle S T A R T SDA LINE SLAVE ADDRESS 1 W R I T E WORD ADDRESS(n) *2 WA7 *1 0 1 0 A2 A1 A0 DATA(n) D7 WA0 R A / C W K S T O P *3 DATA(n+7) D0 A C K D0 A C K A C K Current read cycle S T A R T SDA LINE SLAVE ADDRESS 1 R E A D *1 0 1 0 A2 A1 A0 S T O P DATA D0 D7 R A / C W K A C K Random read cycle S T A R T SDA LINE SLAVE ADDRESS 1 W R I T E SLAVE ADDRESS WORD ADDRESS(n) *2 WA7 *1 0 1 0 A2 A1 A0 R E A D 1 WA0 R A / C W K 0 1 S T O P *3 DATA(n+7) *1 0 A2 A1 A0 D7 A C K D0 A C K A C K Sequential read cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 R E A D *1 1 0 A2 A1 A0 DATA(n+x) DATA(n) D7 R A / C W K S T O P D7 D0 A C K *1: PS (BR24C04 BR24C04) *2: Don't Care (BR24C01A BR24C01A) *3: (n+15) (BR24C04 BR24C04) Note : Single-cell types (BR24C01A/AF BR24C01A/AF, BR24C02/F BR24C02/F, BR24C04/F BR24C04/F). "-W" means double-cell type. A C K D0 A C K