Datasheet Search Results			1 - 1 of about 1 for BCRC
	BCRC	Baknor Electronics Industries Inc.	CERAMIC RESONATOR	21.38 Kb,  1 Pages.

Fulltext Datasheet Results		1 - 19 of about 19 for BCRC
	First line: CD4069UBE TC74HCU04P* TC74HCU04P (A,B,C) series CERAMIC RESONATORS 2.00 35.00 through-hole Abstract: .. BCRA BCRB BCRC. Frequency Range 2.0 ~ 5.0 MHz 5.0 ~ 13.0 MHz 13.01 ~ 35.0 MHz. Operating Temp. Range -20 °C TO +80 °C. Frequency Tolerance ±0.5% Frequency Stability ±0.3% Aging for 10 years ±0.3% Part ..  Tags: CD4069UBE TC74HCU04P*  BCRA*   datasheet abstract..	21.38 Kb	1 Pages	Original
	First line: CD4069UBE BCCR (A,B,C) series CERAMIC RESONATORS Built load capacitors External load capacitors required Stability over wide temperature range Compact, enabling high-density mounting Abstract: .. BCRA BCRB BCRC. Frequency Rang e1.8 ~ 4.91 MH z5.0 ~ 13.0 MH z13.01 ~ 50.0 MHz. Operating Temp. Range -20 °C TO +80 °C. Frequency Tolerance ±0.5% Frequency Stability ±0.3% Aging for 10 years ±0.3% Part ..  Tags: CD4069UBE BCRA  74HCU04   datasheet abstract..	24.43 Kb	1 Pages	Original
	First line: 80196 internal architecture diagram 32-bit microprocessor architecture motorola 68000 microprocessor datasheet intel 80196 FibreFAS490 Dual Port Fibre Channel Controller with Internal Transceivers Abstract: .. caching operations Data protection with buffer CRC BCRC Enhanced data streaming support. Hardware XOR function at DMA speeds. LBA seeder and checker. Programmable microcontrollers to ..  Tags: motorola 68000 microprocessor datasheet 32-bit microprocessor architecture motorola 68020  intel 80196 microcontroller  intel 80196  DRAM Refresh Control with the 80186 80188  controller intel 80196 family  80196 MEMORY INTERFACE  80196 internal architecture diagram  80196  68008 microprocessor   datasheet abstract..	41.77 Kb	5 Pages	Original
	First line: 80196 internal architecture diagram FibreFAS440 Dual Port Fibre Channel Controller with Internal Transceivers Abstract: .. , sustained 32-bit 32-bit DMA bandwidth â–  Data protection with 32-bit 32-bit buffer CRC BCRC â–  Enhanced data streaming support. â–  32-bit 32-bit , 80 MHz synchronous DRAM SDRAM support. â–  Maximum buffer size of 4 Mbytes ..  Tags: MICROPROCESSOR 68000 motorola 68020  intel 80196 microcontroller  intel 80196  FibreFAS440*  branch instruction in 80196 microcontroller instr  80196 MEMORY INTERFACE  80196 internal architecture diagram  80196  68008 microprocessor   datasheet abstract..	23.44 Kb	4 Pages	Original
	First line: TEC376/386 Triple Embedded Controller Compliance with ANSI SCSI configured automatically (SCAM) protocol Compliance with ANSI X3T10/1071D Fast-20 standard Wide, 16-bit Ultra SCSI synchronous data transfer rates Mbytes/sec asynchronous Mbytes/sec (TEC386) Narrow, eight-bit Ultra SCSI synchronous data Abstract: .. sophisticated disk caching operations â–  Data protection with buffer CRC BCRC â–  Enhanced data streaming support â–  Hardware XOR exclusive OR function at DMA speeds TEC386 TEC386 â–  Logical block ..  Tags:   datasheet abstract..	285.92 Kb	7 Pages	OCR Scan
	First line: FAS566 Fast Architecture SCSI Processor Abstract: .. buffer resource, a four-byte buffer cyclical redundancy check BCRC , Data Flow control, and automatic SDRAM refresh control. The buffer controller table search tool compares 16 or 32 bit-based ..  Tags: FAS566   FAS566	40.74 Kb	4 Pages	Original
	First line: tec485 FAS660 Fast Architecture SCSI Processor Abstract: .. buffer resource, a four-byte buffer cyclical redundancy check BCRC , Data Flow control, and automatic SDRAM refresh control. The buffer controller table search tool compares 16 or 32 bit-based ..  Tags: tec485   FAS660	41.76 Kb	4 Pages	Original
	First line: Bt8200EVM-E1 Single Board ITU-T G.761 Transcoder User Guide 100260G March 2000 Abstract: .. AFRZ ACRC BFRZ BCRC CFRZ CCRC ENCDG DECDG. P7 P8. A Line Interface Sheet 3 B Line Interface Sheet 4. Clock and PLL Generation Sheet 1. C Line Interface Sheet 5. Microprocessor. SW2. DS1. XMITA. RCVA. XMITB. RCVB ..  Tags:   Bt8200EVM-E1	352.8 Kb	25 Pages	Original
	First line: CMOS Analog Switches with Data Latches AD7590DI/AD7591DI/AD7592DI Latch-Proof Ron: SOfttyp Buff Swttch Logic Abstract: .. The Iatc:hca uc Ievd ICOIitivc mel, t.bcrc OIC. while WI if held low the: lalcbc:l are ~t uw:Ilhc: .witches iDputi are latchc:d 00 rapoDd to the I4chc:u iap'lit . The. "" ""'" .. onn:. _1aI. .,. &1 ..  Tags:   datasheet abstract..	1503.26 Kb	8 Pages	OCR Scan
	First line: Quad universal asynchronous receiver/transmitter (QUART) SC26C94 Abstract: .. 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 Reserved Power Down. 100101 Reserved ..  Tags: SC26C94  3.686400MHz  26C94   SC26C94	201.85 Kb	33 Pages	Original
	First line: Quad universal asynchronous receiver/transmitter (QUART) SC68C94 Abstract: .. 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 Reserved Power Down. 100101 Reserved ..  Tags: SCC2692   SC68C94	205.56 Kb	33 Pages	Original
	First line: 26C94 SC28C94* SC28C94 Quad universal asynchronous receiver/transmitter (QUART) Product specification 1998 Replaces SC26C94 1995 SC68C94 1995 IC17 Data Handbook Abstract: .. 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 Reserved Power Down. 100101 Reserved ..  Tags: SC28C94* 26C94   SC28C94 SC26C94 SC68C94	241.46 Kb	38 Pages	Original
	First line: SC28C94 Quad universal asynchronous receiver/transmitter (QUART) Product data sheet Supersedes data 1998 2006 Abstract: .. 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 Reserved Power Down. 100101 Reserved ..  Tags: SC28C94A1N   SC28C94	224.26 Kb	39 Pages	Original
	First line: tda 9116 SC26C94 Quad universal asynchronous receiver/transmitter (QUART) Product specification IC19 1995 PHILIPS PHILIPS Abstract: .. Bidding Control Register b BCRb 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 ..  Tags: tda 9116   datasheet abstract..	3615.64 Kb	36 Pages	OCR Scan
	First line: 1F01B tiHi SC68C94 Quad universal asynchronous receiver/ transmitter (QUART) Product specification IC19 1995 PHILIPS PHILIPS Abstract: .. Bidding Control Register b BCRb 1ÓÒÓ1Ó Bidding Control Register c BCRc Bidding Control Register c BCRc iÔÔÔHi Bidding Control Register d BCRd Bidding Control Register d BCRd 1Ã’Ã’1ÓÓ ..  Tags: 1F01B   datasheet abstract..	3648.75 Kb	36 Pages	OCR Scan
	First line: tda 9116 block diagram of mri machine 68C94-VXA C2694 transistor c2694 Philips Semiconductors Military Data Communications Quad universal asynchronous receiver/transmitter (QUART) 26C94/68C94 overhead interrupt control Four Philips industry-standard UARTs Eight byte receive FIFO eight byte transmit Abstract: .. Bidding Control Register b BCRb 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 ..  Tags: transistor c2694 C2694 68C94-VXA block diagram of mri machine tda 9116   datasheet abstract..	1661.59 Kb	32 Pages	OCR Scan
	First line: Quad universal asynchronous receiver/transmitter (QUART) SC68C94 CONFIGURATIONS A5:0 D7-0 RESET X1/CLK RDa-d Abstract: .. Bidding Control Register b BCRb 100010 Bidding Control Register c BCRc Bidding Control Register c BCRc 100011 Bidding Control Register d BCRd Bidding Control Register d BCRd 100100 ..  Tags:   datasheet abstract..	2107.77 Kb	32 Pages	OCR Scan
	First line: Chip Frontend (OCF1) SAA7110/SAA7110A chip frontend SAA7110(A) digital multistand-ard colour decoder (OCF1) basis digital TV-2 system with integrated converters, clock generation circuit (CGC) BCS- (Brightness, Contrast, Saturation) control. analog inputs (six times CVBS three times combinations) Th Abstract: .. ^Préchargé clamping capacito^ Mode 0-7 •I- without standard routine BCrc /Sett ratrS Orr nr CLAMP ACTIVE I STANDARD AUTOMATIC STATySBYTE yes ^ « «iDfM >â–  B&W50 yes=XX0XXX00 XX0XXX00 \ B&W60 yes=XXlXXX00 XXlXXX00 ..  Tags:   datasheet abstract..	4719.97 Kb	65 Pages	OCR Scan
	First line: EP9315 tx1000 controllers tx1000 controller EP9307 plasma 640x480 EP93XX Embedded Processor Family EP93xx Abstract: .. The received FCS may also be passed to the host by setting RXCtl.BCRC. E th e rn e t F ra m e /P a c k e t F o rm a t T y p e II, o n ly 1 byte up to 7 bytes 6 bytes 6 bytes. optional field. 2 bytes. LL C da ta Pad FC S. N bytes ..  Tags: plasma 640x480 EP9307 tx1000 controller tx1000 controllers vfd using pid  RHL2  RGB LED MOVING DISPLAY CIRCUITS  rgb led 8x8 matrix controller  PWSC  MRC D17  lcd photo frame video player  HVGA TFT LCD driver  HVGA TFT LCD application processor  HVGA LCD driver  EP9315   EP93XX EP93xx	7393.19 Kb	824 Pages	Original

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