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APL1431 J-STD-020C APL1431XXC APL1431XXI APL431A APL431B MIL-STD-883D-2003 - Datasheet Archive
Adjustable Precision Shunt Regulator Features General Description · · Guaranteed 0.5% or 1% Reference Voltage The
APL1431 APL1431 Adjustable Precision Shunt Regulator Features General Description · · Guaranteed 0.5% or 1% Reference Voltage The APL1431 APL1431 is a 3-terminal adjustable voltage refer- Tolerance ence with specified thermal stability over applicable Sink Current Capability , 1mA to 100mA commercial temperature ranges. Output voltage may Quick Turn-on be set to any value between VREF(2.5 V) and 20 V with Adjustable Output Voltage , VO = VREF to 20V two external resistors (see Figure 2). When used with Low Operational Cathode Current , 250µA an photocoupler, the APL1431 APL1431 is an ideal voltage ref- Typical erence in isolated feedback circuits for 2.5V to 12V 0.1 Typical Output Impedance switching-mode power supplies. This device has a typi- SOT-23 , SOT-89 and TO-92 Packages cal output impedance of 0.1. Active output circuitry Lead Free and Green Devices Available provides a very sharp turn-on characteristic, making (RoHS Compliant) the APL1431 APL1431 excellent replacements for zener diodes · · · · · · · Precise Reference Voltage to 2.500V in many applications, including on-board regulation and Applications · · · adjustable power supplies. Linear Regulators Adjustable Power Supply Pin Configuration Switching Power Supply ANODE Symbol 3 REF Anode 1 Cathode 1 2 2 3 CATHODE REF CATHODE ANODE SOT-23 (Top View) Functional Diagram REF SOT-89 (Top View) Cathode 1 REF 2 ANODE 3 CATHODE + REF _ V ref TO-92 (Top View) Anode ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 1 www.anpec.com.tw APL1431 APL1431 Ordering and Marking Information Elec. Grade A : 0.5% Reference Voltage Tolerance B : 1% Reference Voltage Tolerance Package Code A : SOT-23 D : SOT-89 E : TO-92 Y : Chip Form Temp. Range C : 0 to 70 °C I : -40 to 85 °C Handling Code TB : Tape & Box TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device APL1431 APL1431 Assembly Material Handling Code Temp. Range Package Code Elec. Grade APL1431 APL1431 A : 1431 APL1431 APL1431 D : APL1431 APL1431 XXXXX APL1431 APL1431 E : XXXXX APL 1431 XXXXX XXXXX - Date Code - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VKA IK IREF JA Rating 21 120 3 Unit V mA mA Thermal Resistance from Junction to Ambient in Free Air SOT-23 SOT-89 TO-92 Ambient Temperature Range APL1431XXC APL1431XXC APL1431XXI APL1431XXI Junction Temperature Range APL1431XXC APL1431XXC APL1431XXI APL1431XXI 416 250 250 0 to 70 -40 to 85 0 to 150 -40 to 150 °C/W TSTG Storage Temperature Range -65 to 150 °C TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C TA Tj Parameter Cathode Voltage Continuous Cathode Current Range Reference Current Range Electrical Characteristics Symbol Parameter VREF Reference Voltage VREF/T Reference Voltage Drift Over Temp. Range VREF / VKA Voltage Ratio (open loop gain) Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 °C °C TA= 25°C ( unless otherwise noted) APL1431 APL1431 Min. Typ. Max. APL431A APL431A 2.487 2.500 2.513 VKA=VREF, *1 IK=10mA APL431B APL431B 2.475 2.500 2.525 VKA=VREF, IK=10mA *1 TA= 0 to 70°C 20 *1 30 TA= -40 to 85°C *2 IK=10mA, VKA=VREF to 10V -1.5 -3 *2 IK=10mA, VKA=VREF to 20V -1.2 -2.5 Test Conditions 2 Unit V mV mV/V www.anpec.com.tw APL1431 APL1431 Electrical Characteristics (Cont.) Symbol Parameter TA= 25°C ( unless otherwise noted) APL1431 APL1431 Test Conditions Min. IREF IREF/T IK(min) IK(off) |ZKA| IK Notes : IK=10mA, *2 R1=10k, R2=open Reference Current IK=10mA, R1=10k, *2 Drift R2=open, TA= -40 to 85°C *1 Min. Cathode Current VKA=VREF Off-state Cathode *3 VKA= 20V, VREF= 0V Current VKA=VREF Dynamic Impedance *1 IK=1mA to 100mA, f 1kHz Cathode Current Reference Current Unit Typ. Max. 1.0 3 µA 0.3 1 µA 0.25 0.5 mA 0.1 1 µA 0.1 0.4 100 mA *1 : use Figure 1 *2 : use Figure 2 *3 : use Figure 3 Test figures VIN VIN Vo Vo IK(off) IK VREF Figure 1. Test Circuit for VKA=VREF , VO=VKA=VREF VIN Figure 3. Test Circuit for IK(off) Vo IK R1 IREF R2 VREF Figure 2. Test Circuit for VKA>VREF, VO= VKA= VREF× (1+R1/R2) + IREF × R1 Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 3 www.anpec.com.tw APL1431 APL1431 Application Circuits VIN RB VIN Vo Vo RB R1 R1 C1 VREF VREF R2 R2 Precision Voltage Reference Precision High-Current Series Regulator Notes for Application Circuits: 1) For the series regulator applications, add a compensation capacitor C1 between CATHODE and REF is strongly recommended to improve the stability of output voltage . 2) Set VO according to the following equation: VO = VREF(1+R1/R2)+lREF xR1 3) Choose the value for RB as follows: A) The maximum limit for RB should be such that the cathode current (l K) is greater than the minimum operating current (0.5mA) at VIN(MIN). B) The minimum limit for RB should be such that the cathode current (lK) does not exceed 100mA under all load conditions, and the instantaneous turn-on value for lK does not exceed 120mA. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 4 www.anpec.com.tw APL1431 APL1431 Typical Characteristics Reference Input Current vs. Ambient Temperature Cathode Current vs. Cathode Voltage 800 1.5 VKA=VREF TA=25oC R1=10k Reference Input Current (µA) R2= 600 IK=10mA Cathode Current (µA) 1.25 1 0.75 0.5 -50 -25 0 25 50 75 100 400 IK(min) 200 0 -200 -1 125 0 Cathode Current vs. Cathode Voltage 3 Reference Voltage vs. Ambient Temperature VKA=VREF TA=25oC 2.52 V KA=V REF IK=10mA 2.515 50 Reference Voltage (V) Cathode Current (mA) 2 Cathode Voltage (V) Ambient Temperature (°C) 100 1 0 -50 2.51 2.505 2.5 2.495 2.49 2.485 2.48 2.475 -100 -1 2.47 0 1 2 3 -50 Cathode Voltage (V) Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 -25 0 25 50 75 100 125 Ambient Temperature (°C) 5 www.anpec.com.tw APL1431 APL1431 Typical Characteristics (Cont.) 2000 Pulse Response 6 V REF=0 TA=25 o C Input and Output Voltage (V) Off State Cathode Current (µA) 2500 Off State Cathode Current vs. Cathode Voltage 1500 1000 500 0 -500 -5 0 5 10 15 20 25 Input 5 4 3 Output 2 1 0 3 30 4 5 6 7 10 11 12 13 Ratio of Delta Reference Voltage to Delta Cathode Voltage vs. Ambient Tmperature Off-State Cathode Current vs. Ambient Temperature 0 Ratio of Delta Reference Voltage to Delta Cathode Voltage (mV/V) 1 Off-State Cathode Current (µA) 9 Time (µs) Cathode Voltage (V) V KA=20V 0.9 V REF=0 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 8 -25 0 25 50 75 100 125 VKA=V REF to 20V IKA=10mA -0.5 -0.75 -1 -1.25 -1.5 -1.75 -2 -2.25 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Ambient Temperature (°C) Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 -0.25 6 www.anpec.com.tw APL1431 APL1431 Typical Characteristics (Cont.) 232 Small-Signal Voltage Amplification (dB) Small-Signal Voltage Amplification vs. Frequency VIN VO 60 15k 10uF 50 8.25k 40 30 20 Voltage Amplification Test Circuit 10 0 1 10 100 1000 Frequency (kHz) 150 VIN VO IK CL Stability Boundary Conditions 100 Cathode Current (mA) 90 80 Stability Test Circuit for V KA=VREF V KA=V REF 70 150 60 VIN 50 Stable VO IK Stable 40 30 R1 VKA=3.3V 10k CL 20 Unstable 10 0 0.01 R2 0.1 1 10 Load Capacitance (µF) Stability Test Circuit for V KA>VREF, VO= VKA= VREF x (1+R1/R2) + IREF x R1 Use the MLCC for CL Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 7 www.anpec.com.tw APL1431 APL1431 Typical Characteristics (Cont.) Reference Impedance vs. Frequency 1 Reference Impedance () IK=10mA TA=25°C 500m 300m 200m 100m 1k 2k 5k 10k 20k 50k 100k 200k Frequency (Hz) Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 8 www.anpec.com.tw APL1431 APL1431 Package Information SOT-23-3 D e E E1 SEE VIEW A c b 0.25 A L GAUGE PLANE SEATING PLANE 0 A1 A2 e1 VIEW A S Y M B O L SOT-23 INCHES MILLIMETERS MIN. MAX. A MAX. MIN. 0.057 1.45 A1 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 e 0.95 BSC e1 0.071 0.037 BSC 1.90 BSC 0.075 BSC L 0.30 0 0° 0.012 0.60 8° 0° 0.024 8° Note : Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 9 www.anpec.com.tw APL1431 APL1431 Package Information SOT-89 A C L H E E1 D D1 e e1 B B1 S Y M B O L A SOT-89 MILLIMETERS INCHES MIN. MAX. MIN. MAX. 1.40 1.60 0.055 0.063 B 0.44 0.56 0.017 0.022 B1 0.36 0.48 0.014 0.019 C 0.35 0.44 0.014 0.017 D 4.40 4.60 0.173 0.181 D1 1.62 1.83 0.064 0.072 0.102 0.090 E 2.29 2.60 0.090 E1 2.13 2.29 0.084 e 1.50 BSC 0.059 BSC e1 3.00 BSC 0.118 BSC H 3.94 4.25 0.155 0.167 L 0.89 1.20 0.035 0.047 Note : Follow JEDEC TO-243 AA. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 10 www.anpec.com.tw APL1431 APL1431 Package Information A TO-92 E S D L j e1 b e TO-92 S Y M B O L MIN. MAX. MIN. MAX. A 4.32 5.33 0.170 0.210 b 0.41 0.53 0.016 0.021 D 4.45 5.20 0.175 0.205 E 3.18 4.19 0.125 0.165 e 2.42 2.66 0.095 0.105 e1 1.15 1.39 0.045 0.055 j 3.43 4.00 0.135 0.157 L 12.70 15.00 0.500 0.591 S 2.03 2.66 0.080 0.105 MILLIMETERS INCHES Note : FollowJEDEC TO-92. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 11 www.anpec.com.tw APL1431 APL1431 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H 178.0± 2.00 50 MIN. SOT-23-3 T1 C d 8.4+2.00 13.0+0.50 1.5 MIN. -0.00 -0.20 P1 P2 4.0± 0.10 Application P0 4.0± 0.10 A H 178.0± 2.00 50 MIN. SOT-89 P0 4.0± 0.10 P1 8.0± 0.10 2.0± 0.10 D0 1.5+0.10 -0.00 D1 1.5 MIN. T1 C d 8.4+2.00 13.0+0.50 1.5 MIN. -0.00 -0.20 P2 D0 2.0± 0.10 1.5+0.10 -0.00 D1 1.5 MIN. D 20.2 MIN. W E1 8.0± 0.30 1.75± 0.10 F 3.5± 0.05 T A0 B0 K0 0.6+0.00 3.20± 0.20 3.10± 0.20 1.50± 0.20 -0.40 D W E1 F 0.30 1.75± 0.10 5.50± 0.05 20.2 MIN. 12.0± T A0 B0 K0 0.6+0.00 4.80± 0.20 4.50± 0.20 1.80± 0.20 -0.40 (mm) Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 12 www.anpec.com.tw APL1431 APL1431 Carrier Tape & Box Dimensions Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone TL to TP Ramp-up Temperature TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25°C to Peak Time Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 13 www.anpec.com.tw APL1431 APL1431 Devices Per Unit Package Type Unit Quantity SOT-23-3 Tape & Reel 3000 SOT-89 Tape & Reel 1000 TO-92 Tape & Box 2000 Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-2003 MIL-STD-883D-1005 MIL-STD-883D-1005.7 JESD-22-B JESD-22-B, A102 MIL-STD-883D-1011 MIL-STD-883D-1011.9 MIL-STD-883D-3015 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 sec 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 217°C 60-150 seconds See table 1 See table 2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2008 14 www.anpec.com.tw APL1431 APL1431 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process Package Peak Reflow Temperatures Package Thickness Volume mm3