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1 - 50 of about 10000+ for APEX |
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First line: APEX Contents March Application Notes Metastability Altera Devices Evaluating Power Altera Devices Abstract: .. AN 110 Gate Counting Methodology for APEX 20K Devices. AN 112 Integrating Product-Term Logic in APEX 20K Devices. AN 115 Using the ClockLock & ClockBoost Features in APEX Devices. AN 116 Configuring .. datasheet abstract.. |
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2 Pages 
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First line: Measured Power Consumption mW Altera APEX EP20K100 Xilinx Virtex XCV150 Power Comparison Abstract: .. The Power Comparison. Recent experiments compared the Altera APEX EP20K100 device 4,160 LEs to the Xilinx Virtex XCV150 device 3,456 LEs . Results showed that Altera APEX devices consume .. datasheet abstract.. |
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First line: Signal Processing Megafunctions Signal Processing Solutions System-on-a Programmable-Chip Designs Signal Processing Proven Abstract: .. APEX EP20K1500E. OFDM. OFDM has recently surged in popularity for wireless. systems. Broadcast applications such as terrestrial digital. video broadcast, digital audio broadcast DAB , and .. datasheet abstract.. |
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8 Pages |
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First line: Megafunctions Selector Guide System-on-a-Programmable-Chip Solutions June Contents Introduction Altera Megafunctions Digital Signal Abstract: .. are optimized for the memory structure of the FLEX 10K and APEX device families. Digital Signal Processing DSP Megafunctions. Altera DSP Solution vs. DSP Processors and ASSPs. Altera offers .. datasheet abstract.. |
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12 Pages 
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First line: Intellectual Property Selector Guide Building Blocks System-on-a-ProgrammableChip Solutions March Contents Introduction Altera Abstract: .. APEX 20K, FLEX 10K APEX 20K, FLEX 10K, FLEX 8000, FLEX 6000 APEX 20K, ACEX 1K, FLEX 10K APEX 20K APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000, FLEX 6000 APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000, FLEX 6000 APEX .. datasheet abstract.. |
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First line: Apex-ICE Universal Emulator Hardware Software Installation Guide Notice Analog Devices Inc. reserves Abstract: .. Apex-ICE Universal Emulator Hardware and Software Installation Guide. a. Apex-ICE Universal Emulator Hardware and Software 2. Notice. Analog Devices, Inc. reserves the right to make changes .. datasheet abstract.. |
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28 Pages |
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First line: Description Architecture Features H51007-2.2 Introduction HardCopy APEX devices extend flexibility high-density FPGAs Abstract: .. The migration process from an Altera® FPGA to a HardCopy APEX device offers seamless migration of a high-density system-on-a-programmable-chip SOPC design to a low-cost alternative device .. datasheet abstract.. |
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First line: APEX Integrated Address Data Match Flag APEX Integrated Content Addressable Memory CAM Abstract: .. APEX Devices: The Only PLDs with CAM. Altera’s APEXTM devices, the only programmable logic devices PLDs to offer integrated CAM, have up to one million gates 2.67 million system gates and .. datasheet abstract.. |
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First line: Introduction HardCopy APEX Devices H51006-2.2 Introduction HardCopy APEX devices enable high-density APEX Abstract: .. Altera Corporation 15–1. June 2007. 15. Introduction to HardCopy APEX Devices. Introduction HardCopy® APEXTM devices enable high-density APEX 20KE device technology to be used in high-volume .. datasheet abstract.. |
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6 Pages 
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First line: Using APEX 20KE Fast Search Applications Technical Brief August ver. Altera Corporation Abstract: .. Using APEX 20KE CAM for Fast Search Applications. Technical Brief 56 August 1999, ver. 1. M-TB-056-01. Altera Corporation 1. APEX. TM. 20KE embedded system blocks ESBs support content-addressable .. datasheet abstract.. |
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First line: Apex-ICE Apex-ICE industrys first Universal Serial USB -based emulator well first portable solution Abstract: .. The Apex-ICETM is the industry’s first Universal Serial Bus USB -based DSP emulator as well as the first portable solution designed to support ADI DSPs. The Apex-ICE emulator provides a simple .. datasheet abstract.. |
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First line: PM7326 S / UNI-APEX RELEASE NOTES PMC-991578 ISSUE S / UNI-APEX DRIVER PM7326 APEX S / UNI S / UNI-APEX Abstract: .. PM7326 S/UNI-APEX. RELEASE NOTES. PMC-991578 ISSUE 2 S/UNI-APEX DRIVER. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 1. PM7326. S/UNI -APEX. TM. S/UNI-APEX .. datasheet abstract.. |
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First line: APEX Devices High-Density Embedded Programmable Logic Devices System-Level Integration 20KC APEXaturing Coppe Abstract: .. APEX 20KC Featuring All-Layer Copper Interconnect. High-Density Embedded Programmable Logic Devices for System-Level Integration. APEX Devices. APEXTM programmable logic devices provide .. datasheet abstract.. |
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First line: Configuring SRAM-Based Devices Application Note June ver. Introduction APEX APEX Mercury ACEX Abstract: .. or universal serial bus USB hardware interface to download configuration data to APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, and FLEX 6000 devices. It supports operation with V. CC. at 5.0 V, 3 .. datasheet abstract.. |
667.82 Kb |
102 Pages 
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First line: Jitter Comparison Analysis APEX 20KE Virtex-E Technical Brief January ver. Introduction Clock Abstract: .. Jitter Comparison Analysis: APEX 20KE PLL vs. Virtex-E DLL. Technical Brief 70 January 2001, ver. 1.1. M-TB-070-01.1. Altera Corporation 1. Introduction. Clock jitter is the deviation from the ideal .. datasheet abstract.. |
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7 Pages |
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First line: Configuring SRAM-Based Devices Application Note February ver. Introduction APEX APEX Mercury ACEX Abstract: .. Introduction APEXTM II, APEX 20K, MercuryTM, ACEXTM 1K, FLEX® 10K, and FLEX 6000 devices can be configured using one of six configuration schemes. All configuration schemes use either a microprocessor .. datasheet abstract.. |
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101 Pages 
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First line: APEX 20KE Device Ordering Codes Errata Sheet April ver. Preliminary Information This Abstract: .. This errata sheet provides new ordering code information for APEX. TM. 20KE devices. Altera is developing a faster process for APEX 20KE devices that will meet the timing specification for production .. datasheet abstract.. |
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First line: Advantages APEX PLLs Over Virtex DLLs Technical Brief November ver. Altera Corporation Abstract: .. Advantages of APEX PLLs Over Virtex DLLs. Technical Brief 60 November 1999, ver. 1. M TB 060 01. Altera Corporation 1. Altera has enhanced the phase-locked loop PLL circuitry on APEX. TM. devices to .. datasheet abstract.. |
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First line: GRAPHICS PROCESSOR BACKPLANE LVDS Mbits / s SSTL -2 / 3 LVTTL HSTL LVTTL SDRAM MEMORY Abstract: .. APEX devices can help save board space and eliminate chip-to-chip delays by removing the requirement for an external transceiver. High-Bandwidth I/O Interface Standards. APEX devices support .. datasheet abstract.. |
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First line: LVDS Comparison APEX 20KE vs.Virtex-E Devices Product Information Bulletin August ver. Introduction Abstract: .. APEX 20KE vs.Virtex-E Devices. August 2000, ver. 1.0 Product Information Bulletin 29. A-PIB-029-01. Introduction. The low-voltage differential signaling LVDS input/output I/O standard .. datasheet abstract.. |
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First line: Comparison APEX 20KE Virtex-E Devices Technical Brief December ver. Introduction Content-addressable memory Abstract: .. CAM Comparison: APEX 20KE vs. Virtex-E Devices. Technical Brief 61 December 1999, ver. 1. M-TB-061-01. Altera Corporation 1. Introduction. Content-addressable memory CAM is a memory technology .. datasheet abstract.. |
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First line: Transitioning APEX Designs Stratix Stratix Devices S52012-3.0 Introduction Stratix Stratix devices Alteras Abstract: .. Altera Corporation 3–1. February 2005. 3. Transitioning APEX Designs to Stratix & Stratix GX Devices. Introduction Stratix® and Stratix GX devices are Altera’s next-generation, system-on- a .. datasheet abstract.. |
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First line: Using ClockLock ClockBoost Features APEX Devices Application Note ver. Introduction APEX devices Abstract: .. ®. Altera Corporation 1. Using the ClockLock & ClockBoost Features in APEX Devices. May 1999, ver. 1.0 Application Note 115. A-AN-115-01. Introduction. APEX. TM. 20K devices have the ClockLock. TM. and .. datasheet abstract.. |
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First line: RELEASED ERRATA PMC-1991770 ISSUE PM7326 S / UNI-APEX ATM / PACKET TRAFFIC MANGER SWITCH PM7326 S / UNI Abstract: .. RELEASED PM7326 S/UNI-APEX. ERRATA. PMC-1991770 ISSUE 1 ATM/PACKET TRAFFIC MANGER AND SWITCH. PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000. PM7326. S/UNI - APEX .. datasheet abstract.. |
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First line: Configuring APEX 20KE APEX 20KC Devices CF51005-2.2 Introduction APEX 20KE APEX 20KC Abstract: .. Altera Corporation 7–1. August 2005. 7. Configuring APEX 20KE & APEX 20KC Devices. Introduction APEXTM 20KE and APEX 20KC devices can be configured using one of four configuration schemes. All configuration .. datasheet abstract.. |
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First line: LVDS Signaling Using APEX Device Pins Application Note ver. Introduction Density increases Abstract: .. LVDS Signaling Using APEX Device I/O Pins. May 2001, ver. 1.0 Application Note 138. A-AN-138-01. Introduction. Density increases in programmable logic devices PLDs have led users to integrate .. datasheet abstract.. |
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First line: SignalTap Embedded Logic Analyzer Megafunction Data Sheet April ver. Features Provided with Abstract: .. II and APEX 20K devices including. APEX 20K, APEX 20KE, and APEX 20KC devices . Provides non-intrusive probing of ball-grid array BGA pins. . Logic analyzer controls available within the Quartus .. datasheet abstract.. |
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First line: Apex-ICE Emulator Hardware Installation Guide Notice Analog Devices reserves right make changes Abstract: .. Apex-ICE. USB Emulator Hardware Installation Guide. i. Notice. Analog Devices reserves the right to make changes to or to discontinue any product or service identified in this publication without .. datasheet abstract.. |
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First line: APEX Complete Solution April Altera introduces APEX device family highperformance high-bandwidth programmable Abstract: .. APEX II. Advanced High-Performance LVDS. 36 1-Gbps True-LVDS input and 36 1-Gbps True-LVDS. output channels. Up to 88 624-Mbps Flexible-LVDSTM input channels. and 88 624-Mbps Flexible-LVDS output .. datasheet abstract.. |
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First line: APEX Devices High-Density Embedded Programmable Logic Devices System-Level Integration August APEX Revolutionary Abstract: .. High-Density Embedded Programmable Logic Devices for System-Level Integration. APEX Devices. ̈. August 1999. Altera Corporation. APEX: A Revolutionary Embedded Architecture The Altera® APEXTM .. datasheet abstract.. |
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First line: White Paper Copper Interconnects Altera Devices Introduction Semiconductor companies constantly striving improve Abstract: .. APEX. TM. 20KC devices are all-layer copper devices that meet the high-performance requirements of complex designs. Figure 1 shows the cross section of an APEX 20KC device. Figure 1. APEX 20KC .. datasheet abstract.. |
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First line: APEX 20KE Programmable Logic Devices Errata Sheet April ver. Preliminary Information This Abstract: .. This errata sheet provides updated guidelines on APEX. TM. 20KE device. configuration and applies to currently shipping devices only future devices will not be affected . APEX 20KE devices operate .. datasheet abstract.. |
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First line: APEX 20KE Starter Development Kits Solution Brief December ver. Target Applications Applicatons Abstract: .. APEX 20KE PCI Starter & Development Kits Solution Brief 55 December 2000, ver. 1.0. Altera Corporation. A-SB-055-01 MegaCore. TM. Target Applications: All PCI Applicatons All Embedded Applications .. datasheet abstract.. |
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First line: SRAM Controller Function December ver. Application Note Overview explosive growth Internet boosted Abstract: .. APEX Interface When using QDR SRAM in a system, a memory controller generates all the signals needed for the SRAM and serves as the interface to the system. Altera APEX 20KE devices—with their speed .. datasheet abstract.. |
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First line: Integrating Product-Term Logic APEX Devices Application Note April ver. Introduction Altera APEX Abstract: .. Product-Term Logic in APEX 20K Devices. April 1999, ver. 1.0 Application Note 112. A-AN-112-01. Introduction. Altera. ®. APEX. TM. 20K devices feature the MultiCore. TM. architecture, which. combines .. datasheet abstract.. |
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First line: Gate Counting Methodology APEX Devices Application Note September ver. Introduction Alteras APEX Abstract: .. Gate Counting Methodology for APEX 20K Devices. September 1999, ver. 1.01 Application Note 110. A-AN-110-01.01. Introduction. Altera’s APEX. TM. 20K device family offers an innovative combination .. datasheet abstract.. |
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First line: Configuring APEX FLEX FLEX Devices Application Note December ver. Introduction APEX FLEX Abstract: .. Configuring APEX 20K, FLEX 10K & FLEX 6000 Devices. December 1999, ver. 1.02 Application Note 116. A-AN-116-01.02. Introduction. APEX. TM. 20K, FLEX. ®. 10K, and FLEX 6000 devices can be configured using .. datasheet abstract.. |
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First line: Using Selectable Standards APEX 20KE APEX 20KC 7000B Devices Application Note December Abstract: .. Using Selectable I/O Standards in APEX 20KE, APEX 20KC & MAX 7000B Devices. December 2001, ver. 2.2 Application Note 117. A-AN-117-2.2. Introduction High-performance, low-voltage I/O standards .. datasheet abstract.. |
989.37 Kb |
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First line: Power Consumption Comparison APEX Virtex Devices Technical Brief October ver. Introduction Many Abstract: .. Power Consumption Comparison: APEX 20K vs. Virtex Devices. Technical Brief 57 October 1999, ver. 1. M TB 057 01. Altera Corporation 1. Introduction. Many factors, such as supply voltage, current consumption .. datasheet abstract.. |
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First line: Configuring Altera FPGAs CF51001-2.1 Introduction Stratix series Cyclone series APEX APEX including Abstract: .. Introduction Stratix® series, CycloneTM series, APEXTM II, APEX 20K including APEX 20KE and APEX 20KC , MercuryTM, ACEX® 1K, FLEX® 10K including FLEX 10KE and FLEX 10KA , and FLEX 6000 devices .. datasheet abstract.. |
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First line: White Paper Using APEX APEX 20KE PLLs Quartus Software Introduction APEX devices Abstract: .. Using APEX 20K & APEX 20KE PLLs in the Quartus Software. January 2000, ver. 1.0 1. M-WP-APQUARTUS-01. Introduction. APEXTM devices support the ClockLockTM, ClockBoostTM, and ClockShiftTM clock .. datasheet abstract.. |
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First line: White Paper Using APEX APEX 20KE PLLs Quartus Software Introduction APEX devices Abstract: .. Using APEX 20K & APEX 20KE PLLs in the Quartus Software. January 2000, ver. 1.0 1. M-WP-APQUARTUS-01. Introduction. APEXTM devices support the ClockLockTM, ClockBoostTM, and ClockShiftTM clock .. datasheet abstract.. |
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First line: Using Selectable Standards APEX 20KE APEX 20KC 7000B Devices Application Note October Abstract: .. Using Selectable I/O Standards in APEX 20KE, APEX 20KC & MAX 7000B Devices. October 2001, ver. 2.1 Application Note 117. A-AN-117-2.1. Introduction High-performance, low-voltage I/O standards .. datasheet abstract.. |
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First line: APEX 20KC Programmable Logic Device Data Sheet February ver. Features.. Programmable logic Abstract: .. APEX 20KC Programmable Logic Device. February 2004 ver. 2.2 Data Sheet. DS-APEX20KC-2.2. Features.. ■ Programmable logic device PLD manufactured using a 0.15-μm all- layer copper-metal fabrication .. datasheet abstract.. |
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First line: APEX 20KC Programmable Logic Device Data Sheet April ver. Features.. Preliminary Information Abstract: .. faster design performance than APEX. TM. 20KE devices. ‐ Pin-compatible with APEX 20KE devices ‐ High-performance, low-power copper interconnect ‐ MultiCore. TM. architecture integrating look-up .. datasheet abstract.. |
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First line: APEX 20KC Programmable Logic Device Data Sheet April ver. Features.. Programmable logic Abstract: .. APEX 20KC Programmable Logic Device. April 2002 ver. 2.1 Data Sheet. DS-APEX20KC-2.1. Features.. ■ Programmable logic device PLD manufactured using a 0.15-μm all- layer copper-metal fabrication .. datasheet abstract.. |
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First line: Nios Embedded Processor Development Board March ver. Data Sheet Introduction Development Board Abstract: .. 256 KBytes of SRAM in 2 64K x 16-bit chips On-board logic for configuring APEX device from flash memory 3.3-V expansion/prototype headers access to 40 user I/Os 5-V-tolerant expansion/prototype .. datasheet abstract.. |
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First line: APEX 20KC Programmable Logic Device Data Sheet October ver. Features.. Preliminary Information Abstract: .. faster design performance than APEX. TM. 20KE devices. ‐ Pin-compatible with APEX 20KE devices ‐ High-performance, low-power copper interconnect ‐ MultiCore. TM. architecture integrating look-up .. datasheet abstract.. |
634.93 Kb |
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First line: APEX 20KC Programmable Logic Device Data Sheet February ver. Features.. Programmable logic Abstract: .. APEX 20KC Programmable Logic Device. February 2002 ver. 2.0 Data Sheet. DS-APEX20KC-2.0. Features.. ■ Programmable logic device PLD manufactured using a 0.15-μm all- layer copper-metal fabrication .. datasheet abstract.. |
564.98 Kb |
86 Pages 

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First line: Increasing Performance Using ATOM Netlist Files Technical Brief August ver. Introduction Quartus Abstract: .. tools with an unprecedented level of control over the final mapping of APEX. TM. 20K designs. Third-party. synthesis software can now synthesize VHDL and Verilog HDL design code directly to the APEX .. datasheet abstract.. |
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