AN440 001/C BTA08-600CW - Datasheet Archive

 

APPLICATION NOTE TRIAC DRIVE CIRCUIT FOR OPERATION IN QUADRANTS I AND III INTRODUCTION New triacs with high commutation and dv/dt

 

AN440 AN440 APPLICATION NOTE TRIAC DRIVE CIRCUIT FOR OPERATION IN QUADRANTS I AND III INTRODUCTION New triacs with high commutation and dv/dt performances are now available on the market. Generally these triacs are only triggerable in the 3 first quadrants (case of SNUBBERLESS and LOGIC LEVEL triacs) as shown in Figure 1. This paper describes a trigger circuit supplying a negative gate current for quadrants II and III implemented in a system using a positive power supply. Without a new design, just by adding a capacitor and a diode new W series triacs can replace conventional triac. Figure 1. The quadrants of a W series triac IA +­ + 2nd 1st 3rd 4th IG ­­ NOT TRIGGERABLE PRINCIPLE Figure 2 shows the schematic of a system with a sensor, logic and positive power supply (with respect to the anode 1 of the triac). To drive the triac in the 2nd and 3rd quadrants a discharge capacitor is used as shown in Figure 3. April 2004 Rev. D2A - 3578 1/9 AN440 AN440 APPLICATION NOTE Figure 2. Synoptical diagram of a classical system SUPPLY +VCC LOAD LINE SENSOR LOGIC TRIGGER Figure 3. Basic diagram of the trigger LOAD +VCC SNUBBERLESS TRIAC R2 R1 C R3 Tr LINE D Principle ­ The transistor is switched off, capacitor C is charged through resistance R2 and diode D. The diode is used to avoid a capacitor load current through the gate of the triac. A schottky diode could be used to improve the voltage drop level lower than the gate non trigger voltage (VGD). ­ When the triac is triggered, the transistor Tr is switched on, C is discharged through R1 and Tr and a negative current flows through the gate of the triac. The capacitor C acts as a differentiation. We have to consider different parameters to define all the components: ­ The gate trigger current of the triac (IGT). ­ The time duration of the gate current. ­ The latching current (IL) especially for small or inductive loads. 2/9 AN440 AN440 APPLICATION NOTE Review Definition of the latching current (IL): The IL of a triac is the minimum value of the main current which allows the component to remain in the conducting state after the gate current IG has been removed. That is to say the gate current has to be higher than IGT until the main current reaches the latcing current. Example: for the CW SNUBBERLESS triac: Q1 ­ Q3: ILmax = 50mA Q2: ILmax = 80mA With: gate pulse duration of 20ms at Tj = 25°C IL max is specified in the CW series triac data sheet. Statistically, for BW series triacs we can use the K ratio: K = ILmax/IGTmax K = 2,3 Two solutions are possible: ­ Triggering with a delay after zero voltage crossing such that the main current is higher than IL. ­ Triggering at zero voltage crossing with a long discharge time in order to have no problem with IL. THE CASE WITH A RESISTIVE LOAD First solution: delayed pulse current (see Figure 4) The gate pulse is shown in Figure 5. Figure 4. Triggering with delay t1 after zero crossing ANODE CURRENT 50mA/div GATE CURRENT 20mA/div 0.1ms/div 3/9 AN440 AN440 APPLICATION NOTE Figure 5. Gate pulse IG t2 t IGM 2 IGM t1 calculation: The triac has to be triggered when the main current is higher than the latching current, that is to say t1min is: I L max 1 t1 = - asin - 2 I RMS where = 2 . . IRMS: minimum RMS current in the worst case (depending on line and load dispersion). The curve given shows the minimum time versus IRMS current through the anode (figure 6). Figure 6. t1 time versus IRMS for different latching currents t1(µs) 200 180 160 140 120 100 BW SERIES 80 60 40 20 0 CW SERIES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 IT(rms)(A) The gate current calculation: IGT is the maximum gate trigger current specified in the data sheet. To ensure a good safety margin and good triggering we have chosen IG = 2.IGT with a pulse duration t2 higher than 20µs. All the components can be defined by the following formulæ: R1max = (VCC ­ VGK ­ VCE)/(2.IGT) 4/9 AN440 AN440 APPLICATION NOTE with VGK = 2 V at IG = 2.IGT Cmin = t2/(R1.log2) with t2 = 20µs R2max = 0,001/C 001/C Figure 7 gives the minimum capacitance versus supply voltage for different sensitivity. Figure 7. Capacitance value versus supply voltage for different sensitivity C(µF) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 BW SERIES 0.6 0.4 CW SERIES 0.2 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 VCC(V) In this way the RMS current is lower than the full wave current, the RMS current/full wave current ratio is: t1 2 t1 1 K = 1 ­ 2 - + - sin 4 - T T 2 The calculation gives for a 6 Amps CW triac with a 2 Amps sine current and with an IL = 80mA. t1 = 90ms K = 0,99 That means the losses are lower than 1%. Second solution: Wide current pulse at zero crossing It consists of triggering the triac at zero voltage crossing voltage as shown in Figure 8. All the components can be defined by the following formulæ: IL 1 t2min = - asin - + 20µs 2 I RMS . R1max = (VCC ­ VGK ­ VCE)/(2 IGT) Cmin = t2/(R1.log2) R2max = 0,001/C 001/C In this way the RMS current is equal to the full wave current. 5/9 AN440 AN440 APPLICATION NOTE Figure 8. Triggering at zero voltage ANODE CURRENT 50mA/div GATE CURRENT 20mA/div 0.2ms/div Note: The pulse through the transistor base is cancelled before the capacitor is fully discharged to save energy. Comparison between these two solutions The calculation of all the components is shown in the following table for 3 differents cases. Table 1. Component values for 3 differents cases. Triac used: BTA08-600CW BTA08-600CW (IGT = 35mA) IRMS = 2A VCC = 5V IRMS = 5A VCC = 10V IRMS = 5A VCC = 5V with delay at zero crossing with delay at zero crossing with delay at zero crossing t1 min (ms) 36 0 91 0 36 0 t2 min (ms) 20 56 20 111 20 56 R1 max () 105 105 34 34 34 34 C min (mF) 0.275 0.77 0.85 4.7 0.85 2.37 R2 max () 3.7 1.3 1.18 0.212 1.18 0.42 CASE OF INDUCTIVE LOAD With an inductive load another problem occurs: the problem of the phase lag between load current and load voltage. It can be solved by taking into account: ­ the maximum phase lag to define a delay time td. ­ the latching current to define the time t1 ­ the inductance to define the time t2 = V/L at the moment when the triac is fired (t2 > 20µs) to have an anode current higher than the latching current IL. The figure 10 shows the anode current and the gate current in the triac, is the case of an inductive load. 6/9 AN440 AN440 APPLICATION NOTE Figure 9. Current through an inductive load Line voltage Anode current IL t IG td t1 t2 t IGT 2.IGT If the phase lag is not constant a gate pulse train can be used, the calculation parameters are the same, except for R2: the capacitor C has to be charged between 2 pulses so the equation is: R2 = (time between 2 pulses)/(5 x C) THE CASE OF A SMALL LOAD This trigger circuit can not be effectively used to drive small loads (like valves, fan etc.) because the latching current value is not very small compared to the load current. In this case a DC gate current is needed. CONCLUSION In the case of controllers supplied by positive voltage this solution allows of the replacement of conventional triacs used in the 1st and 4th quadrants by SNUBBERLESS or LOGIC LEVEL triacs triggerable only in the 3 first quadrants without a new design but only by adding a capacitor and a diode. Two configurations are possible: First solution: Triggering after the zero voltage crossing. Advantage: capacitor value lower than 1µF. Disadvantage: the need to have a delay after the zero voltage crossing (delay system needed). Second solution: Triggering at zero voltage crossing. Advantage: 100% of the power used in the load. Disadvantage: capacitor value of a few microfarads. With inductive loads (motor, transformer, etc.) a pulse train can be used because of the phase lag between current and voltage. With small loads (valve, fan,.) a DC gate current has to be used to drive the triac because of the latching current. In case of logic or transistor failure, the capacitor C operates as an open circuit for DC current and avoids all triggering. This factor acts as a safety feature. 7/9 AN440 AN440 APPLICATION NOTE REVISION HISTORY Table 2. Revision History Date May-1992 1 First Issue 23-Apr-2004 8/9 Revision Description of Changes 2 Stylesheet update. No content change. AN440 AN440 APPLICATION NOTE Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 9/9