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Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs AN004001-Z8X0400 ZILOG WORLDWIDE HEADQUARTERS ¥ 910 E. HAMILTON
Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs AN004001-Z8X0400 AN004001-Z8X0400 ZILOG WORLDWIDE HEADQUARTERS ¥ 910 E. HAMILTON AVENUE ¥ CAMPBELL, CA 95008 TELEPHONE: 408.558.8500 ¥ FAX: 408.558.8300 ¥ WWW.ZILOG.COM Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to request copies of publications, contact: ZiLOG Worldwide Headquarters 910 E. Hamilton Avenue Campbell, CA 95008 Telephone: 408.558.8500 Fax: 408.558.8300 www.ZiLOG.com Windows is a registered trademark of Microsoft Corporation. Information Integrity The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. Any applicable source code illustrated in the document was either written by an authorized ZiLOG employee or licensed consultant. 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AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs iii Table of Contents General Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Source Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Flow Charts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Equipment Used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 General Test Setup and Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PCB Artwork . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Acknowledgements Project Lead Engineer Chip Curtis Application and Support Engineer Chip Curtis System and Code Development Chip Curtis AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 1 Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs Many applications requiring analog-to-digital conversions can be achieved with 8bit MCUs without compromising accuracy, speed, or system cost. General Overview Many embedded controller applications require that an analog voltage be measured. Depending on the application, a separate A/D converter (ADC) chip may be required because of the speed and resolution requirements. However, many designs do not require fast conversion speeds, and 8 to 11 bits of resolution is adequate. For instance, a digital thermostat samples the temperature periodically and turns the heater or air conditioner on or off when the temperature hits a trip point. Here, the measurement speed for the voltage across a thermistor is not critical, because the temperature is changing rather slowly. Conversion times on the order of milliseconds are acceptable. Capturing fast-changing signals, such as audio, requires a much faster conversion rate. If the highest audio frequency is 4 KHz coming into the ADC, the sample rate must be at least twice that frequency (8 KHz). Because of the limited processing time between samples (in this case 125 µs), the ADC must complete a conversion quickly, giving the MCU time to process the data before the next sample. Because most designs are cost-sensitive, especially in consumer electronics, there may not be the luxury of adding relatively expensive ADC chips to the design. Design engineers must look for a more integrated solution, and ZiLOG has the solution. Discussion The on-board dual analog comparators, along with one counter/timer, are used to implement the ADC routines. The analog comparators are multiplexed with the digital inputs on port pins P31, P32, and P33. Figure 1 illustrates that configuration. The analog comparators are selected via the P3M register. The comparators share a common reference pin, P33. The input range of the comparators is 0VÐ 4V. The input offset voltage is typically 10 mV with Vcc at 5.0V. The output of the comparators can be examined by a Test under Mask (TM) instruction on port P3. The outputs also generate an interrupt, based on the falling or rising edge of the comparator output. These outputs can connect to the P34 and P37 output pins under software control. The PCON register in the extended register file controls this connection (not available on C04/E04 C04/E04 and C08/E08 C08/E08). The comparators are enabled during HALT mode, but are disabled in STOP mode. Three ADC configurations are presented: AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 2 ¥ ¥ ¥ Successive Approximation ADC Duty Cycle ADC 8 bit Duty Cycle ADC The software routines are designed around the Z86E08/C08 Z86E08/C08, but can be adapted for other selected Z8 and Z8PlusTM MCUs. The ZiLOG CCP emulator (ZiLOG PN Z86CCP00ZEM Z86CCP00ZEM) was used to test the routines, and the routines also include a simple serial output to display the ADC output. Figure 1. Port 3 Configuration Theory of Operation Successive Approximation ADC For applications requiring fast conversion times, consider the successive approximation method (Figure 2). This method uses a Digital-to-Analog Converter (DAC) in its feedback loop. The DAC is comprised of an R2R ladder connected to port P2. When a binary value is output at Port 2, a DC voltage proportional to the binary value appears at pin 1 of the ladder network. The DAC completes a binary search on the input voltage. This search is achieved by first setting the most significant bit (MSB) of the DAC and testing the comparator output. If the comparator output is 0, the DAC output for this bit is set to 0. If the comparator output is 1, then the DAC output for this bit is set to 1. The bits from output port 2 are individually tested in ascending order, performing the same test. When all the bits are tested, the conversion is complete. The output from the R2R resistor network becomes the comparator's reference voltage. The analog voltage to be measured AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 3 can be connected to either P31 or P32, the non-inverting inputs of the comparators. To start the conversion, the MSB of P2 is set, resulting in a voltage of.5 Vcc at the VREF input of the comparator. If Vcc is 5V, then the voltage is 2.5V. The noninverting comparator input is tested. If High, then the analog voltage must be 2.5VÐ5.0V. The next bit, P26, is set, and the input port is tested again. If LOW, then bit P26 is reset. The process continues until all bits of P2 are tested. The resultant value at P2 is the digital representation of the analog input. With a crystal frequency of 8 MHz, the conversion time is approximately 110 µS. Even more resolution is available from 10- and 12-bit R2R networks. Of course, more resolution requires more port pins. Duty Cycle ADC When speed is not important, a Duty Cycle Analog to Digital Converter is the perfect solution. This method works by measuring the time it takes a capacitor to charge up above the input voltage and discharge below the input voltage. Because the charge time is compared to the discharge time, component tolerances have no effect on accuracy, and the reading is linear. In addition to the comparators, only one port pin is required to control the RC network, leaving the balance of the I/O free. This example performs a two-channel, 11 bit conversion. Because this method is based upon measuring time, the duty cycle ADC requires a stable time base. The stable time base is accomplished using only one interrupt for the timer and ensuring that the softwareÕs charge and discharge paths execute in the same amount of time.1 At each timer interrupt period, the capacitor is compared to the input voltage. If the capacitor is greater than the input voltage, than the capacitor is discharged and the pass counter is decremented. If the capacitor is less than the input voltage, the capacitor is charged, the reading is incremented, and the pass counter is decremented. When the pass counter reaches 0 the conversion is complete. For highest stability, the capacitor must be charged to the input voltage before measurement begins. The easiest way to charge the capacitor to the input voltage is to perform two conversions and discard the first one. Also, the total conversion time must be an even multiple of the line frequency (60Hz or 50Hz). This example is 2048 counts x 130 µ S = 266mS, approximately 16 cycles at 60 Hz, with a 1M resistor and a.1 µ F capacitor. Total conversion time for both channels is 1.06S. AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 4 8-Bit Duty Cycle The Duty Cycle conversion can be performed inline if a faster sampling rate is required. In this example, the time base is the code itself, so great care must be taken to ensure that each branch executes in the same number of clock cycles. The code contains a number of dummy instructions and balancing branches to keep all the timing consistent. Again, there can be no interrupts while the conversion is taking place. Because this routine executes faster, a different RC network is required. The value of the RC is not critical and is related to the total measurement period. On 5V systems, a good approximation for determining the time constant is RC= t/2.75, where t is the total number of counts multiplied by the time for one count. This routine takes 108 clock cycles per count, or 27 µ S on an 8MHz resonator, for an RC of 2.5 mS (a.1 µ F capacitor and a 25K resistor). This routine measures both channels in 28 mS Summary Applications requiring analog-to-digital conversions can be achieved without compromising accuracy, speed, or system cost. Design engineers can experiment with the routines for performance. Technical Support Source Code ;TimerPorts.inc ;*Timers and Ports* ;These equates are for addressing individual bits B0 B1 B2 B3 B4 B5 B6 B7 equ equ equ equ equ equ equ equ 1b 10b 100b 1000b 10000b 100000b 1000000b 10000000b ;_Port0_ _ Rint equ B0 ;Integrating resistor for Duty Cycle Tx equ B1 ;Transmit ;_Port1_ ;Not available on an 08 ;_Port2_ ;Port two is used for the succesive approximation ADC, but does AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 5 ;not require individual bit assignments ;_Port3_ Channel1 equ B1 ;Mask for channel 1 Channel2 equ B2 ;Mask for channel 2 ;_P01M_ comment^ Table 1. Init P01M Timer Control Register Bit D7 D4 D3 D2 D1 D0 R/W R/W R/W R/W R/W R/W R/W 0 Reset D5 R/W R/W D6 0 0 0 0 0 0 0 Note: R = Read, W = Write, X = Indeterminate. Bit Bit Position Field R/W Reset Value Description D7D6 P04ÐP07 Mode R/W 00 D5 External Timing R/W 0 D4D3 P10ÐP17 Mode R/W 00 D2 D1D0 Internal Stack P00ÐP03 Mode R/W R/W 0 00 P04ÐP07 Mode 00: Output 01: Input 1X: A12ÐA15 External Timing 0: Normal 1: Extended P10P17 00: Byte output 01: Byte input 10: AD0 = AD7 11: HiZ 1 Internal Stack P00P03 Mode 00: Output 01: Input AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 6 InitP01M equ 100B ;Internal stack, P0 Output ;_P3M_ comment^ Table 2. Init P3M Timer Control Register Bit D7 D4 D3 D2 D1 D0 R/W R/W R/W R/W R/W R/W R/W 0 Reset D5 R/W R/W D6 0 0 0 0 0 0 0 Note: R = Read, W = Write, X = Indeterminate. Bit Bit Position Field R/W Reset Value Description D7 Parity R/W 0 D6 P30 R/W 0 D5 P31 R/W 0 D4 -D3 P33 R/W 00 D2 P32 R/W 0 D1 P3 R/W 0 D0 P2 R/W 0 0: Parity ON 1: Parity OFF 0: P30 = Input,P37 = Output 1: P30 = Serial in, P37 = Serial out 0: P31 = Input, P36 = Output 1: P31 = DAV2/RDY2, P36 = RDY2/ DAV2 00: P33 = Input 11: P33 = DAV1/RDY1, P34 = RDY/ DAV1 01 or 10: P34 = Out, P33 = In P34 = DM 0: P32 = Input, P35 = Output 1: P32 = DAV0/RDY0, P35 = RDY0/ DAV0 0: Digital P3 input 1: Analog P3 input 0: Open drain P2 1: Push-pull P2 AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 7 InitP3M equ 00000011B 00000011B ;Analog push-pull ;_TMR_ comment^ Table 3. InitTMR Timer Control Register Bit D7 D4 D3 D2 D1 D0 R/W R/W R/W R/W R/W R/W R/W 0 Reset D5 R/W R/W D6 0 0 0 0 0 0 0 Note: R = Read, W = Write, X = Indeterminate. Bit Bit Position Field R/W Reset Value Description D7D6 TOUT R/W 00 D4D5 CLKIN R/W 00 D3 T1 R/W 0 D2 D1 T1 T0 R/W R/W 0 0 D0 T0 R/W 0 00: No T out 01: T0 out 10: T1 out 11: Internal clock out 00: External clock input 01: Gated input 10: Trigger input, no retrigger 11: Trigger input, retrigger 0: Disable T1 1: Enable T1 1: Load T1 0: Disable T0 1: Enable T0 1: Load T0 ^ AN004001-Z8X0400 AN004001-Z8X0400 Application Note Analog-to-Digital Conversion Techniques Using ZiLOG Z8 MCUs 8 InitTMR equ 00001111B 00001111B ;Load and run both timers comment^ ;_PRE0_ Table 4. InitPRE0 Timer Control Register R/W R/W R/W R/W R/W R/W R/W R/W 0 Reset R/W 0 0 0 0 0 0 0 Note: R = Read, W = Write, X = Indeterminate. Bit Bit Position Field R/W D2D7 D1 D0 R/W R/W R/W PRE1 Reserved Count Mode ^ InitPRE0 equ equ 00 0 0 1