AN-7017 AN00007017 - Datasheet Archive

 

AN-7017 Reducing Power Losses in MOSFETs by Controlling Gate Parameters Alan Elbanhawy, Fairchild Semiconductor Introduction The

 

www.fairchildsemi.com AN-7017 AN-7017 Reducing Power Losses in MOSFETs by Controlling Gate Parameters Alan Elbanhawy, Fairchild Semiconductor Introduction The gate Equivalent Series Resistance (ESR) has been recognized as a factor affecting the losses in MOSFETs for a number of years. Controlling the losses is exceedingly important as devices need to produce the highest power conversion efficiency and lowest losses to operate efficiently at the target application. From an applications standpoint, an increase in losses can lead to overheating in the actual system requiring additional components such as heat sinks and fans. Additional components add to the overall cost and size of the end application. This application note explore ways to control these losses in MOSFETs. 7 What this application note will do: 1 · Provide guidance in selecting the right MOSFET for a specific application · Optimize overall design by correct selection · Explore the three distinct effects of gate ESR 0 2.5e-09 6 5 4 3 2 3.5e-09 4.0e-09 4.5e-09 5.0e-09 5.5e-09 6.0e-09 Figure 2. Current in each of the five segments The Effect of Rg on Switching Current Distribution One of the first effects this application note will be explore is current distribution across the die during turn on and off. The gate ESR (Rg) together with the gate-source capacitance (Cgs) are distributed parameters across the MOSFET die. V1 V2 V3 V4 R R 6 5 4 3 V5 2 Id R R R 1 Vd + C C C C C 0 ­ 1 2 3 4 5 6 7 5e-09 4e-09 3e-09 2e-09 Cgs Rg Figure 1. Simplified schematic for the solution of the current distribution Figure 3. The first and last segment currents for different combinations of Rg and Cgs REV. A 9/30/05 AN-7017 AN-7017 APPLICATION NOTE The effect of Rg on the distribution of the switching current can be looked at in two ways: 1. Use the exact equations for a resistor-capacitor transmission line 2. Divide the die into several sections representing small enough areas on the die where all conditions are equal The second approach is chosen since it gives a better idea of the mechanism in terms of die segments rather than the obscure distance along the die. as compared to a moderate value of 0.3 ­ 0.7 Ohm since Rg dampens the oscillations of the gate inductance and the input capacitance of the MOSFET. With the proper layout for the gate and the gate drive circuit with minimum gate lead and PCB trace inductance we can achieve very little to no oscillations in the gate circuit as can be achieved with the BGA package from Fairchild Semiconductor. Figure 4 depicts the circuit simulation results again showing that the first segment (red) carries most of the current during switching while the last segment (green) starts carrying current after the switching is complete. 9.02A 8.00A 15.66A 6.00A 12.00A 4.00A 8.00A 2.00A 4.00A 0A ­1.39A 145.154us 145.200us I(M13:d) 145.300us I(M11:d) 145.400us 145.500us 145.600us 145.700us 0A Time ­9.51A 148.46us Figure 4. Switching current in the first (top, Red) and fifth (bottom green) segments Figure 1 shows the simplified schematic used to formulate and solve the set of equations that describe the current in each segment. The equations were solved using MapleTM and the results are in Figures 2 & 3. Figure 2 depicts all the segment currents. A close examination reveals that the current is not distributed evenly among the different segments on the same die due to the propagation delay of gate drive signal along the die caused by the transmission line effects due to the distributed Rg and Cgs. This uneven distribution results in an uneven power loss at different sections of the die making the segments farthest away from the gate pad shoulder a much lower share of the switching current and switching losses as compared to the segment closest to the gate pad. Figure 3 shows the current in the first (top curve) and the last segments as a function of both the gate ESR Rg and the gatesource capacitance Cgs midway along the switching cycle. This reveals that depending on Rg and Cgs values, the last segment starts conducting a smaller current at a much later time for moderately large values of Rg larger than 3 Ohm total in the example above but for small values of Rg say 0.5 Ohm the difference in current is much smaller and we would expect that at Rg=0 all the segment will carry identical currents. We do not recommend that MOSFETs be designed with Rg=0 since this is likely to cause a very serious ringing in the gate circuit causing much more trouble 2 I(M13:d) 148.48us I(M11:d) 148.50us 148.52us 148.54us V(M13:d, M13:s) Time Figure 5. Drain-source voltage and first and last segment current waveform and the drain-source voltage Figure 5 depicts the same segment currents as in Figure 4 with the drain-source voltage (blue) added to the traces. Again you can see that the switching losses mostly take place in the first segment while the last segment has a very little effect. The Rg effect takes place only during turn on and off. During turn off, the segments that carried the largest current on turn on will turn off first while the segments that carried the smallest current will turn off last but Spice simulation results show that this effect is much less pronounced at turn off as compared to turn on. If every segment can conduct its own current without going over the maximum safe temperature of about 150°C­175°C there should be no problems but if Rg and the switching current is large enough where the losses are concentrated in a small area of the die; there exist the possibility that some segments may overheat leading to further excessive losses due to the positive temperature coefficient of the MOSFET RDS(ON) where RDS(ON) will get to be much larger which now leads to more conduction losses and hence even higher still temperature. The gate driver source resistance does not play any part in this phenomenon since this particular effect is strictly an on die effect due to the distributed ESR and Cgs. REV. A 9/30/05 APPLICATION NOTE AN-7017 AN-7017 The effect of Rg on current rise and fall times Let us start by examining the switching currents and voltages of the control or HS MOSFET in a synchronous buck converter. As can be observed in Figure 6, when the MOSFET is switched on at t0 the gate-source voltage rises steadily till it reaches Vgth. At this point the current will start commutating at t1 from the synchronous rectifier into the control MOSFET rising to the peak current at t2. During the period t1­t2 the voltage across the control MOSFET will be approximately the input voltage plus one diode drop. Vin is the input voltage, Id is the drain current, fs is the switching frequency and tri and tfv are the current rise time and voltage fall time. We will examine the effect of the lumped Rg on the value of tri and tfv. The equation for a linear ramp of the gate drive voltage Vgp(t) is: Vp t Vgp ( t ) : = -tr Where Vp is the peak value of the gate drive signal and t is time. The equation for the gate-source voltage, Vgs(t) node is: Vp t Vgs ( t ) ­ -d tr - Vgs ( t ) + - = 0 e1 := Cgs dt Rg Gate Voltage The equation for the gate drive node is: Vp t - ­ Vgs ( t ) tr e2 := Ig ( t ) + - = 0 Rg Vp Vgth Where Ig(t) is the current delivered by the gate driver. Using MapleTM to solve the two simultaneous differential equations we have the following solutions: t0 t1 t2 Time t ­ - Cgs Rg e Vp Cgs Rg ­ Vp Cgs Rg + Vp t Vgs ( t ) = -tr Figure 6. Gate-source voltage 1 The losses = - × Vin × Id × fs × ( tri + tfv ) where, t ­ - Cgs Rg 2 e Vp Cgs Vp Cgs Ig ( t ) = - ­ -tr tr R Vgs Igs Vgp + C ­ Each of the two equations has different dependencies that are governed by the gate resistance with its two components of the MOSFET ESR and the gate driver source resistance as well as the gate-source capacitance Cgs and tr which is the rise time of the gate drive signal, MOSFET tranceconductance and drain current to name a few 2 0 Figure 7 MOSFET input equivalent circuit with lumped Rg and Cgs Iload = ( Vsegment ­ Vgth ) Gm Where Iload is the load current in the segment and Vgth is the MOSFET gate threshold voltage. Substituting in the equation above and solving for the current rise time tri we get ­ Vp Gm Cgs Rg + tr Gm Vgth + tr Gm Iload - Vp Gm Cgs Rg tri : = LambertW ­ e Vp Gm Cgs Rg + tr Gm Iload - ­ Vp Cgs Rg + Vgth tr Vp Cgs Rg Vp Cgs Rg / ( Vp Gm ) ­ Gm LambertW ­ e Where Gm is the MOSFET transconductance while the rest of the variables are the same as above. REV. A 9/30/05 3 AN-7017 AN-7017 APPLICATION NOTE Figure 8 depicts the dependence of the current rise time (z axes) on Rg and Cgs. By examining Figure 8 we can observe that the current rise time is directly dependant on Rg and Cgs. One important comment here is that the tri values calculated in Figure 7 are done in an ideal package i.e., without any parasitic inductances. By examining the tri equation it becomes very clear that the rise time is dependant on the product Rg × Cgs i.e. the smaller the product the lower the rise time and the lower the dynamic power losses. 1. The results of lab tests: The practical lab results clearly show that larger ESR will result in larger current and voltage rise and fall times as can be seen in Figures 10 and 11. In this lab test we added a simple resistor between the gate driver and the gate of the MOSFET. This resistor can be considered an addition to the total gate resistance with its two parts 1- The intrinsic gate ESR resistance Rg 2- Gate driver source resistance and to these two we can add this external resistor. The results show that the addition of 4.7 Ohm will raise the current rise time from 6.56ns to 10.75ns an increase of almost 64% representing a 64% increase in the power loss during this transition. 9e-09 8e-09 7e-09 2e-09 6e-09 Cgs 6 5 4e-09 4 3 2 1 Rg Figure 8. Effect of Rg and Cgs on Current Rise Time and a step gate drive voltage Figure 10 Rg = 0 Ohm, Current Rise time Similar equations were derived for calculating the drainsource voltage fall time but they are too long to display here. Instead, we have Figure 9 depicts the dependency of the rise time (Z axes) on Cgd and Rg. Again you can clearly see that Rg has a direct linear influence on the drain-source voltage fall time in the range of values shown in Figure 9. In general, the switching drain-source voltage rise and fall times are functions of MOSFET ESR Rg and gate-drain capacitance Cgd and the gate-source capacitance Cgs as well as the gate driver IC parameters of impedance and rise and fall times. 7e-09 Figure 11 Rg = 4.7 Ohm, Current rise time 6e-09 5e-09 Conclusion 4e-09 Controlling key parasitics in MOSFETs is pivotal to the power efficiency of the design and the overall performance of end applications. This application note demonstrates that both the MOSFET gate ESR and the MOSFET gate-source and gate-drain capacitances influence the switching losses and they all need to be optimized for optimal performance. 3e-09 2e-09 1e-09 6 5 4 Rg 1e-09 3 2e-09 2 1 4e-09 3e-09 Qgd Figure 9. Effect of Rg on drain-source Voltage fall Time 4 REV. A 9/30/05 AN-7017 AN-7017 APPLICATION NOTE References [1] Alan Elbanhawy, "Effect of Parasitic Inductance on switching performance" in Proc. PCIM Europe 2003, pp.251­255 [2] A. Elbanhawy, "Mathematical Treatment for HS MOSFET Turn-Off" in Proc. PEDS Singapore 2003 [3] A. Elbanhawy, "Pitfalls of MOSFET Paralleling" in Proc. Power Electronics Technology 2003, pp. 98­106 [4] J. Ejury, "Design Issues For DC/DC-Converters With Respect To Compact SMD MOSFET Packages" in Proc. Power Electronics Conference USA 2004 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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