AMD64 Product Data Sheet · · Compatible with Existing 32-Bit Code Base

Product Data Sheet · · Compatible with Existing 32-Bit Code Base Including support for SSE, SSE2, SSE3,

AMD AthlonTM 64 Processor Product Data Sheet · · Compatible with Existing 32-Bit Code Base Including support for SSE, SSE2, SSE3, MMXTM, 3DNow!TM technology and legacy x86 instructions (SSE3 supported by Rev E and later processors) Runs existing operating systems and drivers Local APIC on-chip Packaging 754-pin lidded micro PGA 1.27-mm pin pitch 29x29-row pin array 40mm x 40mm organic substrate Organic C4 die attach · AMD64 AMD64 Technology · AMD64 AMD64 technology instruction set extensions 64-bit integer registers, 48-bit virtual addresses, 40bit physical addresses Eight additional 64-bit integer registers (16 total) Eight additional 128-bit SSE registers (16 total) Integrated Memory Controller Low-latency, high-bandwidth 72-bit DDR SDRAM at 100, 133, 166, and 200 MHz Supports up to three unbuffered DIMMs ECC checking with double-bit detect and single-bit correct · Cache Two 64-bit operations per cycle, 3-cycle latency · 64-Kbyte 2-Way Associative Parity-Protected L1 Instruction Cache With advanced branch prediction HyperTransportTM Technology to I/O Devices One 16-bit link supporting speeds up to 800 MHz (1600 MT/s) or 3.2 Gigabytes/s in each direction · 16-Way Associative ECC-Protected L2 Cache Exclusive cache architecture-storage in addition to L1 caches 1 Mbyte, 512-Kbyte and 256-Kbyte options · Machine Check Architecture Includes hardware scrubbing of major ECC-protected arrays · Power Management Multiple low-power states System Management Mode (SMM) ACPI-compliant, including support for processor performance states · 939-Pin Package Specific Features · Refer to the AMD Functional Data Sheet, 939 Pin Package, order# 31411, for functional, electrical, and mechanical details of 939-pin package processors. · Electrical Interfaces HyperTransportTM technology: LVDS-like differential, unidirectional DDR SDRAM: SSTL_2 per JEDEC specification Clock, reset, and test signals also use DDR SDRAM-like electrical specifications · Packaging 939-pin lidded micro PGA 1.27-mm pin pitch 31x31-row pin array 40mm x 40mm organic substrate Organic C4 die attach · Integrated Memory Controller Low-latency, high-bandwidth 144-bit DDR SDRAM at 100, 133, 166, and 200 MHz Supports up to four unbuffered DIMMs ECC checking with double-bit detect and single-bit correct · HyperTransportTM Technology to I/O Devices One 16-bit link supporting speeds up to 1 GHz (2000 MT/s) or 4 Gigabytes/s in each direction 754-Pin Package Specific Features · Refer to the AMD Functional Data Sheet, 754 Pin Package, order# 31410, for functional, electrical, and mechanical details of 754-pin package processors. · Electrical Interfaces HyperTransportTM technology: LVDS-like differential, unidirectional DDR SDRAM: SSTL_2 per JEDEC specification Clock, reset, and test signals also use DDR SDRAM-like electrical specifications Publication # Issue Date: 24659 June 2006 Revision: 3.12 Advanced Micro Devices AMD AthlonTM 64 Product Data Sheet Socket AM2 Specific Features · Refer to the Socket AM2 Processor Functional Data Sheet, order# 31117, for functional and mechanical details of socket AM2 processors. · Refer to the AMD NPT 0Fh Family Processor Electrical Data Sheet, order# 31119, for electrical details of socket AM2 processors. · Electrical Interfaces HyperTransportTM technology: LVDS-like differential, unidirectional DDR2 SDRAM: SSTL_1.8 per JEDEC specification Clock, reset, and test signals also use DDR2 SDRAM-like electrical specifications · Packaging Lidded micro PGA 31x31 grid array 1.27-mm pin pitch · Integrated Memory Controller Low-latency, high-bandwidth 144-bit DDR2 SDRAM controller operating at up to 400 MHz Supports up to four unbuffered DIMMs ECC checking with double-bit detect and singlebit correct 2 24659 Rev. 3.12 June 2006 24659 Rev. 3.12 AMD AthlonTM 64 Product Data Sheet June 2006 Revision History Date Revision June 2006 3.12 Public release. · Clarified SSE3 support. · Added Socket AM2 Specific Features · Duplicated Electrical Interfaces under the 754-pin and 939-pin Specific Features. April 2005 3.10 Added revision history. Removed multi core information. Chapter Description 3 AMD AthlonTM 64 Product Data Sheet 24659 Rev. 3.12 June 2006 Trademarks AMD, the AMD Arrow logo, AMD Athlon, and combinations thereof, and 3DNow! are trademarks of Advanced Micro Devices, Inc. HyperTransport is a licensed trademark of the HyperTransport Technology Consortium. MMX is a trademark of Intel Corporation. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Disclaimer The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. The information contained herein may be of a preliminary or advance nature and is subject to change without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD's Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. © 2004 2006 Advanced Micro Devices, Inc. All rights reserved. 4