AHE281XD MIL-STD-704 28VDC MIL-PRF38534 MIL-PRF-38534 AHE2812D AHE2815D AFC461 - Datasheet Archive

 

AHE281XD Series Dual Output, Hybrid - High Reliability DC/DC Converter DESCRIPTION The AHE Series of DC/DC converters feature

 

LAMBDA ADVANCED ANALOG INC. AHE281XD AHE281XD Series Dual Output, Hybrid - High Reliability DC/DC Converter DESCRIPTION The AHE Series of DC/DC converters feature high power density and an extended temperature range for use in military and industrial applications. Designed to MIL-STD-704 MIL-STD-704 input requirements, these devices have nominal 28VDC 28VDC inputs with ±12V and ±15V dual outputs to satisfy a wide range of requirements. The circuit design incorporates a pulse width modulated push-pull topology operating in the feed-forward mode at a nominal switching frequency of 250KHz. Input to output isolation is achieved through the use of transformers in the forward and feedback circuits. The advanced feedback design provides fast loop response for superior line and load transient characteristics and offers greater reliability and radiation tolerance than devices incorporating optical feedback circuits. Manufactured in a facility fully qualified to MIL-PRF38534 MIL-PRF38534, these converters are available in four screening grades to satisfy a wide range of requirements. The CH grade is fully compliant to the requirements of MIL-PRF-38534 MIL-PRF-38534 for class H. The HB grade is processed and screened to the class H requirement, but may not necessarily meet all of the other MIL-PRF-38534 MIL-PRF-38534 requirements, e.g., element evaluation and Periodic Inspection (P.I.) not required. Both grades are tested to meet the complete group "A" test specification over the full military temperature range without output power deration. Two grades with more limited screening are also available for use in less demanding applications. Variations in electrical, mechanical and screening can be accommodated. Contact Lambda Advanced Analog for special requirements. FEATURES n 17 To 40 Volt Input Range (28VDC 28VDC Nominal) n ± 12 and ± 15 Volt Outputs Available n Indefinite Short Circuit and Overload Protection n 3 12.9W/in Power Density n 15 Watts Output Power n Fast Loop Response For Superior Transient Characteristics n Operating Temperature Range From -55°C to +125°C Available n Popular Industry Standard Pin-Out n Resistance Seam Welded Case For Superior Long Term Hermeticity n Efficiencies Up to 82% n Shutdown From External Signal n Military Screening n 314,000 Hour MTBF at 85°C, AUC SPECIFICATIONS AHE2812D AHE2812D ABSOLUTE MAXIMUM RATINGS Input Voltage Soldering Temperature Case Temperature -0.5V to 50V 300°C for 10 seconds Operating-55°C to +125°C Storage -65°C to +135°C TABLE I. Electrical Performance Characteristics Test Symbol Conditions -55°C TC +125°C VIN = 28 V dc ±5%, CL = 0 unless otherwise specified Group A subgroups Device types Limits Min Output voltage VOUT IOUT = 0 1 All Unit Max Output current 9/ 11/ IOUT VIN = 17, 28, and 40 V dc 1,2,3 All Output ripple voltage 8/ 9/ VRIP VIN = 17, 28, and 40 V dc B.W. = dc to 2 mHz 1,2,3 POUT VIN = 17, 28, and 40 V dc 1,2,3 All Line 9/ regulation 10/ VRLINE VIN = 17, 28, and 40 V dc IOUT = 0, ±313, and ±625 mA 1 ±12.24 0.0 ±625 All Output power 4/ 9/ 11/ ±12.12 ±11.76 2,3 ±11.88 All 60 15 mA mV p-p W 30 2,3 V mV 60 Load regulation 9/ VRLOAD VIN = 17, 28, and 40 V dc IOUT = 0, ±313, and ±625 mA 1,2,3 All 120 mV Input current IIN IOUT = 0, inhibit (pin 2) tied to input return (pin 10) 1,2,3 All 18 mA IOUT = 0, inhibit (pin 2) = open Input ripple current 8/ IRIP IOUT = ±625 mA B.W. = dc to 2 MHz Efficiency EFF Isolation 40 1,2,3 All IOUT = ±625 mA, TC = +25°C 1 All 80 ISO Input to output or any pin to case (except pin 8) at 500 V dc, TC = +25°C 1 All 100 Capacitive load 6/ 12/ CL No effect on dc performance, TC = +25°C 4 All 200 µF Power dissipation load fault PD Overload, TC = +25°C 1 All 6 W 3/ 50 % M 6 Short circuit, TC = +25°C See footnotes at end of table 2 mA p-p AHE2812D AHE2812D TABLE I. Electrical Performance Characteristics - Continued Test Symbol Conditions -55°C TC +125°C VIN = 28 V dc ±5%, CL = 0 unless otherwise specified Group A Subgroups Device Type Limits Min Switching frequency 9/ FS 50 percent load to/from 100 percent load 4 01 225 275 225 245 03 VOTLOAD 4,5,6 Max 02 Output response to step transient load changes 7/ IOUT = ±625 mA Unit 250 275 All -300 +300 -450 +450 -500 +500 -750 +750 5,6 No load to/from 50 percent load 4 All 5,6 Recovery time step transient load changes 1/ 7/ TTLOAD 50 percent load to/from 100 percent load 4 All 5,6 70 KHz mV pk µs 100 No load to 50 percent load Turn on delay 2/ 9/ Load fault recovery 12/ All 5 Input step 17 TO 40 V dc 4,5,6 All 1200 4,5,6 All -1500 Input step 17 TO 40 V dc 4,5,6 All 4 4,5,6 All 4 VTonOS IOUT = 0 and ±625 mA 4,5,6 All 600 TonD 9/ 4,5,6 Input step 40 TO 17 V dc Turn on overshoot 1500 Input step 40 TO 17 V dc Recovery time transient step line changes 1/ 5/ 12/ All 50 percent load to no load Output response to transient step line changes 5/ 12/ 4,5,6 IOUT = 0 and ±625 mA 4,5,6 All 10 ms 4,5,6 All 10 ms VOTLINE TTLINE TrLF ms mV pk ms mV pk Notes: 1/ Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load. 2/ Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 3/ An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 4/ Total power at both outputs. For operation at 16 V dc input, derate output power by 33 percent. 5/ Input step transition time between 2 and 10 microseconds. 6/ Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on. 7/ Load step transition time between 2 and 10 microseconds. 8/ Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz. 9/ Tested at each output. 10/ When operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation. 11/ Parameter guaranteed by line and load regulation tests. 12/ Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified in Table I. 3 SPECIFICATIONS AHE2815D AHE2815D ABSOLUTE MAXIMUM RATINGS Input Voltage Soldering Temperature Case Temperature -0.5V to 50V 300°C for 10 seconds Operating-55°C to +125°C Storage -65°C to +135°C TABLE II. Electrical Performance Characteristics Test Symbol Conditions -55°C TC +125°C VIN = 28 V dc ±5%, CL = 0 unless otherwise specified Group A subgroups Device types Limits Min Output voltage VOUT IOUT = 0 1 All Max Output current 9/ 11/ IOUT VIN = 17, 28, and 40 V dc 1,2,3 All Output ripple 8/ voltage 9/ VRIP VIN = 17, 28, and 40 V dc B.W. = dc to 2 mHz 1,2,3 VIN = 17, 28, and 40 V dc 1,2,3 All VRLINE VIN = 17, 28, and 40 V dc IOUT = 0, ±250, and ±500 mA 1 ±15.15 ±15.30 0.0 ±500 All POUT ±14.85 ±14.70 2,3 All Output power 4/ Line 9/ regulation 10/ 9/ 11/ Unit 60 15 mA mV p-p W 35 2,3 V mV 75 Load regulation 9/ VRLOAD VIN = 17, 28, and 40 V dc IOUT = 0, ±250, and ±500 mA 1,2,3 All 150 mV Input current IIN IOUT = 0, inhibit (pin 2) tied to input return (pin 10) 1,2,3 All 18 ma IOUT = 0, inhibit (pin 2) = open Input ripple 8/ current IRIP IOUT = ±500 mA B.W. = dc to 2 MHz Efficiency EFF Isolation 40 1,2,3 All IOUT = ±500 mA, TC = +25°C 1 All 80 ISO Input to output or any pin to case (except pin 8) at 500 V dc, TC = +25°C 1 All 100 Capacitive load 6/ 12/ CL No effect on dc performance, TC = +25°C 4 All 200 µF Power dissipation load fault PD Overload, TC = +25°C 1 All 6 W 3/ 4 50 mA p-p % M AHE2815D AHE2815D TABLE II. Electrical Performance Characteristics - Continued. Test Symbol Conditions -55°C TC +125°C VIN = 28 V dc ±5%, CL = 0 unless otherwise specified Group A Subgroups Device Type Limits Min Switching frequency 9/ VOTLOAD 4,5,6 50 percent load to/from 100 percent load 225 275 225 245 250 275 All 4 01 03 step transient IOUT = ±500 mA Max 02 Output response to load changes 7/ FS Unit -300 +300 -450 +450 -500 +500 -750 +750 5,6 No load to/from 50 percent load 4 All 5,6 Recovery time step transient load changes transient load changes 1/ 7/ TTLOAD 50 percent load to/from 100 percent load 4 All 5,6 70 KHz mV pk µs 100 No load to 50 percent load Turn on delay 2/ 9/ Load fault recovery 12/ All 5 Input step 17 to 40 V dc 4,5,6 All 1500 4,5,6 All -1500 Input step 17 to 40 V dc 4,5,6 All 4 4,5,6 All 4 VTonOS IOUT = 0 and ±500 mA 4,5,6 All 600 TonD 9/ 4,5,6 Input step 40 to 17 V dc Turn on overshoot 1500 Input step 40 to 17 V dc Recovery time transient step line changes 1/ 5/ 12/ All 50 percent load to no load Output response to transient step line changes 5/ 12/ 4,5,6 IOUT = 0 and ±500 mA 4,5,6 All 10 ms 4,5,6 All 10 ms VOTLINE TTLINE TrLF ms mV pk ms mV pk Notes: 1/ 2/ 3/ 4/ 5/ 6/ Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load. Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. Total power at both outputs. For operation at 16 V dc input, derate output power by 33 percent. Input step transition time between 2 and 10 microseconds. Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on. 7/ Load step transition time between 2 and 10 microseconds. 8/ Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz. 9/ Tested at each output. 10/ When operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation. 11/ Parameter guaranteed by line and load regulation tests. 12/ Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified in Table II. 5 BLOCK DIAGRAM (Single Output) 1 INPUT FILTER OUTPUT FILTER 3 REGULATOR & OUTPUT FILTER 5 2 CONTROLLER 9 ERROR AMP & REF 10 4 APPLICATION INFORMATION designer must assign one of the converters as the master. Then, by definition, the remaining converters become slaves and will operate at the masters' switching frequency. The user should be aware that the synchronozation system is fail-safe; that is, the slaves will continue operating should the master frequency be interrupted for any reason. The layout must be such that the synchronozation output (Pin 9) of the master device is connected to the synchronozation input (Pin 9) of each slave device. It is advisable to keep this run short to minimize the possibilty of radiating the 250KHz switching frequency. Inhibit Function Connecting the inhibit input (Pin 2) to input common (Pin 10) will cause the converter to shut down. It is recommended that the inhibit pin be driven by an open collector device capable of sinking at least 400µA of current. The open circuit voltage of the inhibit input is 11.5 +1 VDC. EMI Filter An optional EMI filter (AFC461 AFC461) will reduce the input ripple current to levels below the limits imposed by MIL-STD-461 MIL-STD-461 CEO3. Device Synchronization Whenever multiple DC/DC converters are utilized in a single system, significant low frequency noise may be generated due to slight difference in the switching frequencies of the converters (beat frequency noise). Because of the low frequency nature of this noise (typically less than 10 KHz), it is difficult to filter out and may interfere with proper operation of sensitive systems (communications, radar or telemetry). Lambda Advanced Analog offers an option which provides synchronization of multiple AHE/ATW converters, thus eliminating this type of noise. To take advantage of this capability, the system The appropriate parts must be ordered to utilize this feature. After selecting the converters required for the system, an `MSTR' suffix is added for the master converter part number and an `SLV' suffix is added for slave part number. 6 5 10 1 10 AHE2815D/ES-SLV AHE2815D/ES-SLV SLAVE +5V COMM +15V 4 COMM 5 -15V 5 AHE2805S/ES-MSTR AHE2805S/ES-MSTR MASTER 4 3 1 FILTER +12V 4 COMM SYSTEM BUS 1 10 AHE2812S/ES-SLV AHE2812S/ES-SLV SLAVE Typical Synchronization Connection Diagram HB Screening Process PIN DESIGNATION Per MIL-PRF-38534 MIL-PRF-38534 AHE2812D AHE2812D AHE2815D AHE2815D Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Positive input Inhibit input Positive output Output common Negative output Test Inspection Pin 10 Pin 9 Pin 8 Pin 7 Pin 6 Pre-Seal Internal Visual Stabilization Bake Temperature Cycling Constant Acceleration Burn-in Final Electrical Test Gross Leak Fine Leak External Visual Input common N/C or sync. Case ground N/C N/C Method 2017 1008 1010 2001 1015 1014 1014 2009 Conditlon C C A, Y1 direction TC = +125°C Tc = -55,+25,+125°C C A ES Screening Process Same as HB screening except as follows: Test Inspection Constant Acceleration Burn-in Final Electrical PART NUMBER AHF 28 xx D x / x - xxx Model Input Voltage Output Voltage 12­12 VDC 15­15 VDC Dual Output Synchronization Option MSTR-Master SLV-Slave Temperature Range Omit for -55°C to +85°C ES- -55°C to +105°C HB- -55°C to +125°C Package Option F-Flange Omit for standard 7 Method 2001, 500g's 1015, 96hrs. 25°C only MECHANICAL OUTLINE .090R max. .090R max. 0.800 (20.320) 1.120 max. (28.194) Pin 1 0.040D x 0.260L (1.016) (6.604) 2.120 max. (53.594) Input Common 0.495 max. (12.573) 10 1 N/C or synchronization Inhibit Input Case Ground 4 x 0.400 = 1.600 (10.160) (40.640) Pos. Output Bottom View 6 2.880 max. (73.152) .090R max. 1.110 (28.194) 0.800 (20.320) Pin 1 2.550±.010 (64.770) 0.162D 2 places (4.115) 2.120 max. (53.594) 0.495 max. (12.573) 4 x 0.400 = 1.600 (10.160) (40.640) 0.040D x 0.260L (1.016) (6.604) Weight Standard-55 grams max. Flange-58 grams max. 8 Pos. Input 5 Output Common Neg. Output STANDARDIZED MILITARY DRAWING CROSS REFERENCE AHE2815D AHE2815D EFFICIENCY Vendor CAGE number Vendor similar PIN 5962-9157501HXX 5962-9157501HXX 52467 AHE2815D/CH AHE2815D/CH 5962-9157501HZX 5962-9157501HZX 52467 AHE2815DF/CH AHE2815DF/CH 5962-9157502HXX 5962-9157502HXX 52467 AHE2815D/CH-SLV AHE2815D/CH-SLV 5962-9157502HZX 5962-9157502HZX 52467 AHE2815DF/CH-SLV AHE2815DF/CH-SLV 5962-9157503HXX 5962-9157503HXX 52467 AHE2815D/CH-MSTR AHE2815D/CH-MSTR 5962-9157503HZX 5962-9157503HZX 52467 AHE2815DF/CH-MSTR AHE2815DF/CH-MSTR Standardized military drawing PIN Vendor CAGE number 5962-9204001HXX 5962-9204001HXX 52467 AHE2812D/CH AHE2812D/CH 5962-9204001HZX 5962-9204001HZX 52467 AHE2812DF/CH AHE2812DF/CH 5962-9204002HXX 5962-9204002HXX 52467 AHE2812D/CH-SLV AHE2812D/CH-SLV 5962-9204002HZX 5962-9204002HZX 52467 AHE2812DF/CH-SLV AHE2812DF/CH-SLV 5962-9204003HXX 5962-9204003HXX 52467 AHE2812D/CH-MSTR AHE2812D/CH-MSTR 5962-9204003HZX 5962-9204003HZX 52467 AHE2812DF/CH-MSTR AHE2812DF/CH-MSTR Efficiency (%) Standardized military drawing PIN Output Power (Watts) Vendor similar PIN Efficiency (%) AHE2812D AHE2812D EFFICIENCY Output Power (Watts) © Lambda Advanced Analog The information in this data sheet has been carefully checked and is believed to be accurate, however, no responsibility is assumed for possible errors. The specifications are subject to change without notice. 9849 2270 Martin Avenue MIL-PRF-38534 MIL-PRF-38534 Certified Santa Clara CA 95050-2781 ISO9001 ISO9001 Rgstrd(408) 988-4930 FAX (408) 988-2702